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  1. /*
  2. * armboot - Startup Code for ARM926EJS CPU-core
  3. *
  4. * Copyright (c) 2003 Texas Instruments
  5. *
  6. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  7. *
  8. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  9. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  10. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  11. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  12. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <asm-offsets.h>
  33. #include <config.h>
  34. #include <version.h>
  35. /*
  36. *************************************************************************
  37. *
  38. * Jump vector table as in table 3.1 in [1]
  39. *
  40. *************************************************************************
  41. */
  42. .globl _start
  43. _start:
  44. b reset
  45. ldr pc, _undefined_instruction
  46. ldr pc, _software_interrupt
  47. ldr pc, _prefetch_abort
  48. ldr pc, _data_abort
  49. ldr pc, _not_used
  50. ldr pc, _irq
  51. ldr pc, _fiq
  52. _undefined_instruction:
  53. .word undefined_instruction
  54. _software_interrupt:
  55. .word software_interrupt
  56. _prefetch_abort:
  57. .word prefetch_abort
  58. _data_abort:
  59. .word data_abort
  60. _not_used:
  61. .word not_used
  62. _irq:
  63. .word irq
  64. _fiq:
  65. .word fiq
  66. .balignl 16,0xdeadbeef
  67. /*
  68. *************************************************************************
  69. *
  70. * Startup Code (reset vector)
  71. *
  72. * do important init only if we don't start from memory!
  73. * setup Memory and board specific bits prior to relocation.
  74. * relocate armboot to ram
  75. * setup stack
  76. *
  77. *************************************************************************
  78. */
  79. .globl _TEXT_BASE
  80. _TEXT_BASE:
  81. .word CONFIG_SYS_TEXT_BASE
  82. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  83. .globl _armboot_start
  84. _armboot_start:
  85. .word _start
  86. #endif
  87. /*
  88. * These are defined in the board-specific linker script.
  89. */
  90. .globl _bss_start
  91. _bss_start:
  92. .word __bss_start
  93. .globl _bss_end
  94. _bss_end:
  95. .word _end
  96. #ifdef CONFIG_USE_IRQ
  97. /* IRQ stack memory (calculated at run-time) */
  98. .globl IRQ_STACK_START
  99. IRQ_STACK_START:
  100. .word 0x0badc0de
  101. /* IRQ stack memory (calculated at run-time) */
  102. .globl FIQ_STACK_START
  103. FIQ_STACK_START:
  104. .word 0x0badc0de
  105. #endif
  106. #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  107. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  108. .globl IRQ_STACK_START_IN
  109. IRQ_STACK_START_IN:
  110. .word 0x0badc0de
  111. .globl _datarel_start
  112. _datarel_start:
  113. .word __datarel_start
  114. .globl _datarelrolocal_start
  115. _datarelrolocal_start:
  116. .word __datarelrolocal_start
  117. .globl _datarellocal_start
  118. _datarellocal_start:
  119. .word __datarellocal_start
  120. .globl _datarelro_start
  121. _datarelro_start:
  122. .word __datarelro_start
  123. .globl _got_start
  124. _got_start:
  125. .word __got_start
  126. .globl _got_end
  127. _got_end:
  128. .word __got_end
  129. /*
  130. * the actual reset code
  131. */
  132. reset:
  133. /*
  134. * set the cpu to SVC32 mode
  135. */
  136. mrs r0,cpsr
  137. bic r0,r0,#0x1f
  138. orr r0,r0,#0xd3
  139. msr cpsr,r0
  140. /*
  141. * we do sys-critical inits only at reboot,
  142. * not when booting from ram!
  143. */
  144. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  145. bl cpu_init_crit
  146. #endif
  147. /* Set stackpointer in internal RAM to call board_init_f */
  148. call_board_init_f:
  149. ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  150. ldr r0,=0x00000000
  151. bl board_init_f
  152. /*------------------------------------------------------------------------------*/
  153. /*
  154. * void relocate_code (addr_sp, gd, addr_moni)
  155. *
  156. * This "function" does not return, instead it continues in RAM
  157. * after relocating the monitor code.
  158. *
  159. */
  160. .globl relocate_code
  161. relocate_code:
  162. mov r4, r0 /* save addr_sp */
  163. mov r5, r1 /* save addr of gd */
  164. mov r6, r2 /* save addr of destination */
  165. mov r7, r2 /* save addr of destination */
  166. /* Set up the stack */
  167. stack_setup:
  168. mov sp, r4
  169. adr r0, _start
  170. ldr r2, _TEXT_BASE
  171. ldr r3, _bss_start
  172. sub r2, r3, r2 /* r2 <- size of armboot */
  173. add r2, r0, r2 /* r2 <- source end address */
  174. cmp r0, r6
  175. beq clear_bss
  176. #ifndef CONFIG_SKIP_RELOCATE_UBOOT
  177. copy_loop:
  178. ldmia r0!, {r9-r10} /* copy from source address [r0] */
  179. stmia r6!, {r9-r10} /* copy to target address [r1] */
  180. cmp r0, r2 /* until source end address [r2] */
  181. blo copy_loop
  182. #ifndef CONFIG_PRELOADER
  183. /* fix got entries */
  184. ldr r1, _TEXT_BASE /* Text base */
  185. mov r0, r7 /* reloc addr */
  186. ldr r2, _got_start /* addr in Flash */
  187. ldr r3, _got_end /* addr in Flash */
  188. sub r3, r3, r1
  189. add r3, r3, r0
  190. sub r2, r2, r1
  191. add r2, r2, r0
  192. fixloop:
  193. ldr r4, [r2]
  194. sub r4, r4, r1
  195. add r4, r4, r0
  196. str r4, [r2]
  197. add r2, r2, #4
  198. cmp r2, r3
  199. bne fixloop
  200. #endif
  201. #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
  202. clear_bss:
  203. #ifndef CONFIG_PRELOADER
  204. ldr r0, _bss_start
  205. ldr r1, _bss_end
  206. ldr r3, _TEXT_BASE /* Text base */
  207. mov r4, r7 /* reloc addr */
  208. sub r0, r0, r3
  209. add r0, r0, r4
  210. sub r1, r1, r3
  211. add r1, r1, r4
  212. mov r2, #0x00000000 /* clear */
  213. clbss_l:str r2, [r0] /* clear loop... */
  214. add r0, r0, #4
  215. cmp r0, r1
  216. bne clbss_l
  217. #endif
  218. /*
  219. * We are done. Do not return, instead branch to second part of board
  220. * initialization, now running from RAM.
  221. */
  222. #ifdef CONFIG_NAND_SPL
  223. ldr pc, _nand_boot
  224. _nand_boot: .word nand_boot
  225. #else
  226. ldr r0, _TEXT_BASE
  227. ldr r2, _board_init_r
  228. sub r2, r2, r0
  229. add r2, r2, r7 /* position from board_init_r in RAM */
  230. /* setup parameters for board_init_r */
  231. mov r0, r5 /* gd_t */
  232. mov r1, r7 /* dest_addr */
  233. /* jump to it ... */
  234. mov lr, r2
  235. mov pc, lr
  236. _board_init_r: .word board_init_r
  237. #endif
  238. #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  239. /*
  240. * the actual reset code
  241. */
  242. reset:
  243. /*
  244. * set the cpu to SVC32 mode
  245. */
  246. mrs r0,cpsr
  247. bic r0,r0,#0x1f
  248. orr r0,r0,#0xd3
  249. msr cpsr,r0
  250. /*
  251. * we do sys-critical inits only at reboot,
  252. * not when booting from ram!
  253. */
  254. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  255. bl cpu_init_crit
  256. #endif
  257. relocate: /* relocate U-Boot to RAM */
  258. adr r0, _start /* r0 <- current position of code */
  259. ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
  260. cmp r0, r1 /* don't reloc during debug */
  261. beq stack_setup
  262. ldr r2, _armboot_start
  263. ldr r3, _bss_start
  264. sub r2, r3, r2 /* r2 <- size of armboot */
  265. add r2, r0, r2 /* r2 <- source end address */
  266. copy_loop:
  267. ldmia r0!, {r3-r10} /* copy from source address [r0] */
  268. stmia r1!, {r3-r10} /* copy to target address [r1] */
  269. cmp r0, r2 /* until source end address [r2] */
  270. blo copy_loop
  271. /* Set up the stack */
  272. stack_setup:
  273. ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
  274. sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
  275. sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
  276. #ifdef CONFIG_USE_IRQ
  277. sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
  278. #endif
  279. sub sp, r0, #12 /* leave 3 words for abort-stack */
  280. bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  281. clear_bss:
  282. ldr r0, _bss_start /* find start of bss segment */
  283. ldr r1, _bss_end /* stop here */
  284. mov r2, #0x00000000 /* clear */
  285. clbss_l:str r2, [r0] /* clear loop... */
  286. add r0, r0, #4
  287. cmp r0, r1
  288. bne clbss_l
  289. ldr pc, _start_armboot
  290. _start_armboot:
  291. .word start_armboot
  292. #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  293. /*
  294. *************************************************************************
  295. *
  296. * CPU_init_critical registers
  297. *
  298. * setup important registers
  299. * setup memory timing
  300. *
  301. *************************************************************************
  302. */
  303. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  304. cpu_init_crit:
  305. /*
  306. * flush v4 I/D caches
  307. */
  308. mov r0, #0
  309. mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
  310. mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
  311. /*
  312. * disable MMU stuff and caches
  313. */
  314. mrc p15, 0, r0, c1, c0, 0
  315. bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
  316. bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
  317. orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
  318. orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
  319. mcr p15, 0, r0, c1, c0, 0
  320. /*
  321. * Go setup Memory and board specific bits prior to relocation.
  322. */
  323. mov ip, lr /* perserve link reg across call */
  324. bl lowlevel_init /* go setup memory */
  325. mov lr, ip /* restore link */
  326. mov pc, lr /* back to my caller */
  327. #endif
  328. /*
  329. *************************************************************************
  330. *
  331. * Interrupt handling
  332. *
  333. *************************************************************************
  334. */
  335. @
  336. @ IRQ stack frame.
  337. @
  338. #define S_FRAME_SIZE 72
  339. #define S_OLD_R0 68
  340. #define S_PSR 64
  341. #define S_PC 60
  342. #define S_LR 56
  343. #define S_SP 52
  344. #define S_IP 48
  345. #define S_FP 44
  346. #define S_R10 40
  347. #define S_R9 36
  348. #define S_R8 32
  349. #define S_R7 28
  350. #define S_R6 24
  351. #define S_R5 20
  352. #define S_R4 16
  353. #define S_R3 12
  354. #define S_R2 8
  355. #define S_R1 4
  356. #define S_R0 0
  357. #define MODE_SVC 0x13
  358. #define I_BIT 0x80
  359. /*
  360. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  361. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  362. */
  363. .macro bad_save_user_regs
  364. @ carve out a frame on current user stack
  365. sub sp, sp, #S_FRAME_SIZE
  366. stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
  367. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  368. ldr r2, _armboot_start
  369. sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  370. sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
  371. #else
  372. ldr r2, IRQ_STACK_START_IN
  373. #endif
  374. @ get values for "aborted" pc and cpsr (into parm regs)
  375. ldmia r2, {r2 - r3}
  376. add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
  377. add r5, sp, #S_SP
  378. mov r1, lr
  379. stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
  380. mov r0, sp @ save current stack into r0 (param register)
  381. .endm
  382. .macro irq_save_user_regs
  383. sub sp, sp, #S_FRAME_SIZE
  384. stmia sp, {r0 - r12} @ Calling r0-r12
  385. @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
  386. add r8, sp, #S_PC
  387. stmdb r8, {sp, lr}^ @ Calling SP, LR
  388. str lr, [r8, #0] @ Save calling PC
  389. mrs r6, spsr
  390. str r6, [r8, #4] @ Save CPSR
  391. str r0, [r8, #8] @ Save OLD_R0
  392. mov r0, sp
  393. .endm
  394. .macro irq_restore_user_regs
  395. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  396. mov r0, r0
  397. ldr lr, [sp, #S_PC] @ Get PC
  398. add sp, sp, #S_FRAME_SIZE
  399. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  400. .endm
  401. .macro get_bad_stack
  402. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  403. ldr r13, _armboot_start @ setup our mode stack
  404. sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  405. sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
  406. #else
  407. ldr r13, IRQ_STACK_START_IN @ setup our mode stack
  408. #endif
  409. str lr, [r13] @ save caller lr in position 0 of saved stack
  410. mrs lr, spsr @ get the spsr
  411. str lr, [r13, #4] @ save spsr in position 1 of saved stack
  412. mov r13, #MODE_SVC @ prepare SVC-Mode
  413. @ msr spsr_c, r13
  414. msr spsr, r13 @ switch modes, make sure moves will execute
  415. mov lr, pc @ capture return pc
  416. movs pc, lr @ jump to next instruction & switch modes.
  417. .endm
  418. .macro get_irq_stack @ setup IRQ stack
  419. ldr sp, IRQ_STACK_START
  420. .endm
  421. .macro get_fiq_stack @ setup FIQ stack
  422. ldr sp, FIQ_STACK_START
  423. .endm
  424. /*
  425. * exception handlers
  426. */
  427. .align 5
  428. undefined_instruction:
  429. get_bad_stack
  430. bad_save_user_regs
  431. bl do_undefined_instruction
  432. .align 5
  433. software_interrupt:
  434. get_bad_stack
  435. bad_save_user_regs
  436. bl do_software_interrupt
  437. .align 5
  438. prefetch_abort:
  439. get_bad_stack
  440. bad_save_user_regs
  441. bl do_prefetch_abort
  442. .align 5
  443. data_abort:
  444. get_bad_stack
  445. bad_save_user_regs
  446. bl do_data_abort
  447. .align 5
  448. not_used:
  449. get_bad_stack
  450. bad_save_user_regs
  451. bl do_not_used
  452. #ifdef CONFIG_USE_IRQ
  453. .align 5
  454. irq:
  455. get_irq_stack
  456. irq_save_user_regs
  457. bl do_irq
  458. irq_restore_user_regs
  459. .align 5
  460. fiq:
  461. get_fiq_stack
  462. /* someone ought to write a more effiction fiq_save_user_regs */
  463. irq_save_user_regs
  464. bl do_fiq
  465. irq_restore_user_regs
  466. #else
  467. .align 5
  468. irq:
  469. get_bad_stack
  470. bad_save_user_regs
  471. bl do_irq
  472. .align 5
  473. fiq:
  474. get_bad_stack
  475. bad_save_user_regs
  476. bl do_fiq
  477. #endif
  478. # ifdef CONFIG_INTEGRATOR
  479. /* Satisfied by general board level routine */
  480. #else
  481. .align 5
  482. .globl reset_cpu
  483. reset_cpu:
  484. ldr r1, rstctl1 /* get clkm1 reset ctl */
  485. mov r3, #0x0
  486. strh r3, [r1] /* clear it */
  487. mov r3, #0x8
  488. strh r3, [r1] /* force dsp+arm reset */
  489. _loop_forever:
  490. b _loop_forever
  491. rstctl1:
  492. .word 0xfffece10
  493. #endif /* #ifdef CONFIG_INTEGRATOR */