arm64-common.c 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Stefan Roese <sr@denx.de>
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <fdtdec.h>
  8. #include <init.h>
  9. #include <asm/cache.h>
  10. #include <asm/ptrace.h>
  11. #include <linux/libfdt.h>
  12. #include <linux/sizes.h>
  13. #include <pci.h>
  14. #include <asm/io.h>
  15. #include <asm/system.h>
  16. #include <asm/arch/cpu.h>
  17. #include <asm/arch/soc.h>
  18. #include <asm/armv8/mmu.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. /*
  21. * Not all memory is mapped in the MMU. So we need to restrict the
  22. * memory size so that U-Boot does not try to access it. Also, the
  23. * internal registers are located at 0xf000.0000 - 0xffff.ffff.
  24. * Currently only 2GiB are mapped for system memory. This is what
  25. * we pass to the U-Boot subsystem here.
  26. */
  27. #define USABLE_RAM_SIZE 0x80000000
  28. ulong board_get_usable_ram_top(ulong total_size)
  29. {
  30. if (gd->ram_size > USABLE_RAM_SIZE)
  31. return USABLE_RAM_SIZE;
  32. return gd->ram_size;
  33. }
  34. /*
  35. * On ARMv8, MBus is not configured in U-Boot. To enable compilation
  36. * of the already implemented drivers, lets add a dummy version of
  37. * this function so that linking does not fail.
  38. */
  39. const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
  40. {
  41. return NULL;
  42. }
  43. __weak int dram_init_banksize(void)
  44. {
  45. if (CONFIG_IS_ENABLED(ARMADA_8K))
  46. return a8k_dram_init_banksize();
  47. else if (CONFIG_IS_ENABLED(ARMADA_3700))
  48. return a3700_dram_init_banksize();
  49. else
  50. return fdtdec_setup_memory_banksize();
  51. }
  52. __weak int dram_init(void)
  53. {
  54. if (CONFIG_IS_ENABLED(ARMADA_8K)) {
  55. gd->ram_size = a8k_dram_scan_ap_sz();
  56. if (gd->ram_size != 0)
  57. return 0;
  58. }
  59. if (CONFIG_IS_ENABLED(ARMADA_3700))
  60. return a3700_dram_init();
  61. if (fdtdec_setup_mem_size_base() != 0)
  62. return -EINVAL;
  63. return 0;
  64. }
  65. int arch_cpu_init(void)
  66. {
  67. /* Nothing to do (yet) */
  68. return 0;
  69. }
  70. int arch_early_init_r(void)
  71. {
  72. struct udevice *dev;
  73. int ret;
  74. int i;
  75. /*
  76. * Loop over all MISC uclass drivers to call the comphy code
  77. * and init all CP110 devices enabled in the DT
  78. */
  79. i = 0;
  80. while (1) {
  81. /* Call the comphy code via the MISC uclass driver */
  82. ret = uclass_get_device(UCLASS_MISC, i++, &dev);
  83. /* We're done, once no further CP110 device is found */
  84. if (ret)
  85. break;
  86. }
  87. /* Cause the SATA device to do its early init */
  88. uclass_first_device(UCLASS_AHCI, &dev);
  89. #ifdef CONFIG_DM_PCI
  90. /* Trigger PCIe devices detection */
  91. pci_init();
  92. #endif
  93. return 0;
  94. }