serial_meson.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <fdtdec.h>
  9. #include <linux/bitops.h>
  10. #include <linux/compiler.h>
  11. #include <serial.h>
  12. struct meson_uart {
  13. u32 wfifo;
  14. u32 rfifo;
  15. u32 control;
  16. u32 status;
  17. u32 misc;
  18. };
  19. struct meson_serial_platdata {
  20. struct meson_uart *reg;
  21. };
  22. /* AML_UART_STATUS bits */
  23. #define AML_UART_PARITY_ERR BIT(16)
  24. #define AML_UART_FRAME_ERR BIT(17)
  25. #define AML_UART_TX_FIFO_WERR BIT(18)
  26. #define AML_UART_RX_EMPTY BIT(20)
  27. #define AML_UART_TX_FULL BIT(21)
  28. #define AML_UART_TX_EMPTY BIT(22)
  29. #define AML_UART_XMIT_BUSY BIT(25)
  30. #define AML_UART_ERR (AML_UART_PARITY_ERR | \
  31. AML_UART_FRAME_ERR | \
  32. AML_UART_TX_FIFO_WERR)
  33. /* AML_UART_CONTROL bits */
  34. #define AML_UART_TX_EN BIT(12)
  35. #define AML_UART_RX_EN BIT(13)
  36. #define AML_UART_TX_RST BIT(22)
  37. #define AML_UART_RX_RST BIT(23)
  38. #define AML_UART_CLR_ERR BIT(24)
  39. static void meson_serial_init(struct meson_uart *uart)
  40. {
  41. u32 val;
  42. val = readl(&uart->control);
  43. val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
  44. writel(val, &uart->control);
  45. val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
  46. writel(val, &uart->control);
  47. val |= (AML_UART_RX_EN | AML_UART_TX_EN);
  48. writel(val, &uart->control);
  49. }
  50. static int meson_serial_probe(struct udevice *dev)
  51. {
  52. struct meson_serial_platdata *plat = dev->platdata;
  53. struct meson_uart *const uart = plat->reg;
  54. meson_serial_init(uart);
  55. return 0;
  56. }
  57. static int meson_serial_getc(struct udevice *dev)
  58. {
  59. struct meson_serial_platdata *plat = dev->platdata;
  60. struct meson_uart *const uart = plat->reg;
  61. if (readl(&uart->status) & AML_UART_RX_EMPTY)
  62. return -EAGAIN;
  63. return readl(&uart->rfifo) & 0xff;
  64. }
  65. static int meson_serial_putc(struct udevice *dev, const char ch)
  66. {
  67. struct meson_serial_platdata *plat = dev->platdata;
  68. struct meson_uart *const uart = plat->reg;
  69. if (readl(&uart->status) & AML_UART_TX_FULL)
  70. return -EAGAIN;
  71. writel(ch, &uart->wfifo);
  72. return 0;
  73. }
  74. static int meson_serial_pending(struct udevice *dev, bool input)
  75. {
  76. struct meson_serial_platdata *plat = dev->platdata;
  77. struct meson_uart *const uart = plat->reg;
  78. uint32_t status = readl(&uart->status);
  79. if (input)
  80. return !(status & AML_UART_RX_EMPTY);
  81. else
  82. return !(status & AML_UART_TX_FULL);
  83. }
  84. static int meson_serial_ofdata_to_platdata(struct udevice *dev)
  85. {
  86. struct meson_serial_platdata *plat = dev->platdata;
  87. fdt_addr_t addr;
  88. addr = dev_read_addr(dev);
  89. if (addr == FDT_ADDR_T_NONE)
  90. return -EINVAL;
  91. plat->reg = (struct meson_uart *)addr;
  92. return 0;
  93. }
  94. static const struct dm_serial_ops meson_serial_ops = {
  95. .putc = meson_serial_putc,
  96. .pending = meson_serial_pending,
  97. .getc = meson_serial_getc,
  98. };
  99. static const struct udevice_id meson_serial_ids[] = {
  100. { .compatible = "amlogic,meson-uart" },
  101. { .compatible = "amlogic,meson-gx-uart" },
  102. { }
  103. };
  104. U_BOOT_DRIVER(serial_meson) = {
  105. .name = "serial_meson",
  106. .id = UCLASS_SERIAL,
  107. .of_match = meson_serial_ids,
  108. .probe = meson_serial_probe,
  109. .ops = &meson_serial_ops,
  110. .ofdata_to_platdata = meson_serial_ofdata_to_platdata,
  111. .platdata_auto_alloc_size = sizeof(struct meson_serial_platdata),
  112. };
  113. #ifdef CONFIG_DEBUG_UART_MESON
  114. #include <debug_uart.h>
  115. static inline void _debug_uart_init(void)
  116. {
  117. }
  118. static inline void _debug_uart_putc(int ch)
  119. {
  120. struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE;
  121. while (readl(&regs->status) & AML_UART_TX_FULL)
  122. ;
  123. writel(ch, &regs->wfifo);
  124. }
  125. DEBUG_UART_FUNCS
  126. #endif