test.dts 16 KB

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  1. /dts-v1/;
  2. / {
  3. model = "sandbox";
  4. compatible = "sandbox";
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. aliases {
  8. console = &uart0;
  9. eth0 = "/eth@10002000";
  10. eth3 = &eth_3;
  11. eth5 = &eth_5;
  12. gpio1 = &gpio_a;
  13. gpio2 = &gpio_b;
  14. i2c0 = "/i2c@0";
  15. mmc0 = "/mmc0";
  16. mmc1 = "/mmc1";
  17. pci0 = &pci0;
  18. pci1 = &pci1;
  19. pci2 = &pci2;
  20. remoteproc1 = &rproc_1;
  21. remoteproc2 = &rproc_2;
  22. rtc0 = &rtc_0;
  23. rtc1 = &rtc_1;
  24. spi0 = "/spi@0";
  25. testfdt6 = "/e-test";
  26. testbus3 = "/some-bus";
  27. testfdt0 = "/some-bus/c-test@0";
  28. testfdt1 = "/some-bus/c-test@1";
  29. testfdt3 = "/b-test";
  30. testfdt5 = "/some-bus/c-test@5";
  31. testfdt8 = "/a-test";
  32. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  33. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  34. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  35. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  36. usb0 = &usb_0;
  37. usb1 = &usb_1;
  38. usb2 = &usb_2;
  39. axi0 = &axi;
  40. osd0 = "/osd";
  41. };
  42. audio: audio-codec {
  43. compatible = "sandbox,audio-codec";
  44. #sound-dai-cells = <1>;
  45. };
  46. cros_ec: cros-ec {
  47. reg = <0 0>;
  48. compatible = "google,cros-ec-sandbox";
  49. /*
  50. * This describes the flash memory within the EC. Note
  51. * that the STM32L flash erases to 0, not 0xff.
  52. */
  53. flash {
  54. image-pos = <0x08000000>;
  55. size = <0x20000>;
  56. erase-value = <0>;
  57. /* Information for sandbox */
  58. ro {
  59. image-pos = <0>;
  60. size = <0xf000>;
  61. };
  62. wp-ro {
  63. image-pos = <0xf000>;
  64. size = <0x1000>;
  65. };
  66. rw {
  67. image-pos = <0x10000>;
  68. size = <0x10000>;
  69. };
  70. };
  71. };
  72. dsi_host: dsi_host {
  73. compatible = "sandbox,dsi-host";
  74. };
  75. a-test {
  76. reg = <0 1>;
  77. compatible = "denx,u-boot-fdt-test";
  78. ping-expect = <0>;
  79. ping-add = <0>;
  80. u-boot,dm-pre-reloc;
  81. test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
  82. <0>, <&gpio_a 12>;
  83. test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
  84. <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
  85. <&gpio_b 9 0xc 3 2 1>;
  86. int-value = <1234>;
  87. uint-value = <(-1234)>;
  88. };
  89. junk {
  90. reg = <1 1>;
  91. compatible = "not,compatible";
  92. };
  93. no-compatible {
  94. reg = <2 1>;
  95. };
  96. backlight: backlight {
  97. compatible = "pwm-backlight";
  98. enable-gpios = <&gpio_a 1>;
  99. power-supply = <&ldo_1>;
  100. pwms = <&pwm 0 1000>;
  101. default-brightness-level = <5>;
  102. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  103. };
  104. bind-test {
  105. bind-test-child1 {
  106. compatible = "sandbox,phy";
  107. #phy-cells = <1>;
  108. };
  109. bind-test-child2 {
  110. compatible = "simple-bus";
  111. };
  112. };
  113. b-test {
  114. reg = <3 1>;
  115. compatible = "denx,u-boot-fdt-test";
  116. ping-expect = <3>;
  117. ping-add = <3>;
  118. };
  119. phy_provider0: gen_phy@0 {
  120. compatible = "sandbox,phy";
  121. #phy-cells = <1>;
  122. };
  123. phy_provider1: gen_phy@1 {
  124. compatible = "sandbox,phy";
  125. #phy-cells = <0>;
  126. broken;
  127. };
  128. gen_phy_user: gen_phy_user {
  129. compatible = "simple-bus";
  130. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  131. phy-names = "phy1", "phy2", "phy3";
  132. };
  133. some-bus {
  134. #address-cells = <1>;
  135. #size-cells = <0>;
  136. compatible = "denx,u-boot-test-bus";
  137. reg = <3 1>;
  138. ping-expect = <4>;
  139. ping-add = <4>;
  140. c-test@5 {
  141. compatible = "denx,u-boot-fdt-test";
  142. reg = <5>;
  143. ping-expect = <5>;
  144. ping-add = <5>;
  145. };
  146. c-test@0 {
  147. compatible = "denx,u-boot-fdt-test";
  148. reg = <0>;
  149. ping-expect = <6>;
  150. ping-add = <6>;
  151. };
  152. c-test@1 {
  153. compatible = "denx,u-boot-fdt-test";
  154. reg = <1>;
  155. ping-expect = <7>;
  156. ping-add = <7>;
  157. };
  158. };
  159. d-test {
  160. reg = <3 1>;
  161. ping-expect = <6>;
  162. ping-add = <6>;
  163. compatible = "google,another-fdt-test";
  164. };
  165. e-test {
  166. reg = <3 1>;
  167. ping-expect = <6>;
  168. ping-add = <6>;
  169. compatible = "google,another-fdt-test";
  170. };
  171. f-test {
  172. compatible = "denx,u-boot-fdt-test";
  173. };
  174. g-test {
  175. compatible = "denx,u-boot-fdt-test";
  176. };
  177. h-test {
  178. compatible = "denx,u-boot-fdt-test1";
  179. };
  180. clocks {
  181. clk_fixed: clk-fixed {
  182. compatible = "fixed-clock";
  183. #clock-cells = <0>;
  184. clock-frequency = <1234>;
  185. };
  186. clk_fixed_factor: clk-fixed-factor {
  187. compatible = "fixed-factor-clock";
  188. #clock-cells = <0>;
  189. clock-div = <3>;
  190. clock-mult = <2>;
  191. clocks = <&clk_fixed>;
  192. };
  193. osc {
  194. compatible = "fixed-clock";
  195. #clock-cells = <0>;
  196. clock-frequency = <20000000>;
  197. };
  198. };
  199. clk_sandbox: clk-sbox {
  200. compatible = "sandbox,clk";
  201. #clock-cells = <1>;
  202. };
  203. clk-test {
  204. compatible = "sandbox,clk-test";
  205. clocks = <&clk_fixed>,
  206. <&clk_sandbox 1>,
  207. <&clk_sandbox 0>;
  208. clock-names = "fixed", "i2c", "spi";
  209. };
  210. ccf: clk-ccf {
  211. compatible = "sandbox,clk-ccf";
  212. };
  213. eth@10002000 {
  214. compatible = "sandbox,eth";
  215. reg = <0x10002000 0x1000>;
  216. fake-host-hwaddr = [00 00 66 44 22 00];
  217. };
  218. eth_5: eth@10003000 {
  219. compatible = "sandbox,eth";
  220. reg = <0x10003000 0x1000>;
  221. fake-host-hwaddr = [00 00 66 44 22 11];
  222. };
  223. eth_3: sbe5 {
  224. compatible = "sandbox,eth";
  225. reg = <0x10005000 0x1000>;
  226. fake-host-hwaddr = [00 00 66 44 22 33];
  227. };
  228. eth@10004000 {
  229. compatible = "sandbox,eth";
  230. reg = <0x10004000 0x1000>;
  231. fake-host-hwaddr = [00 00 66 44 22 22];
  232. };
  233. firmware {
  234. sandbox_firmware: sandbox-firmware {
  235. compatible = "sandbox,firmware";
  236. };
  237. };
  238. gpio_a: base-gpios {
  239. compatible = "sandbox,gpio";
  240. gpio-controller;
  241. #gpio-cells = <1>;
  242. gpio-bank-name = "a";
  243. sandbox,gpio-count = <20>;
  244. };
  245. gpio_b: extra-gpios {
  246. compatible = "sandbox,gpio";
  247. gpio-controller;
  248. #gpio-cells = <5>;
  249. gpio-bank-name = "b";
  250. sandbox,gpio-count = <10>;
  251. };
  252. i2c@0 {
  253. #address-cells = <1>;
  254. #size-cells = <0>;
  255. reg = <0 1>;
  256. compatible = "sandbox,i2c";
  257. clock-frequency = <100000>;
  258. eeprom@2c {
  259. reg = <0x2c>;
  260. compatible = "i2c-eeprom";
  261. sandbox,emul = <&emul_eeprom>;
  262. };
  263. rtc_0: rtc@43 {
  264. reg = <0x43>;
  265. compatible = "sandbox-rtc";
  266. sandbox,emul = <&emul0>;
  267. };
  268. rtc_1: rtc@61 {
  269. reg = <0x61>;
  270. compatible = "sandbox-rtc";
  271. sandbox,emul = <&emul1>;
  272. };
  273. i2c_emul: emul {
  274. reg = <0xff>;
  275. compatible = "sandbox,i2c-emul-parent";
  276. emul_eeprom: emul-eeprom {
  277. compatible = "sandbox,i2c-eeprom";
  278. sandbox,filename = "i2c.bin";
  279. sandbox,size = <256>;
  280. };
  281. emul0: emul0 {
  282. compatible = "sandbox,i2c-rtc";
  283. };
  284. emul1: emull {
  285. compatible = "sandbox,i2c-rtc";
  286. };
  287. };
  288. sandbox_pmic: sandbox_pmic {
  289. reg = <0x40>;
  290. sandbox,emul = <&emul_pmic0>;
  291. };
  292. mc34708: pmic@41 {
  293. reg = <0x41>;
  294. sandbox,emul = <&emul_pmic1>;
  295. };
  296. };
  297. bootcount@0 {
  298. compatible = "u-boot,bootcount-rtc";
  299. rtc = <&rtc_1>;
  300. offset = <0x13>;
  301. };
  302. adc@0 {
  303. compatible = "sandbox,adc";
  304. vdd-supply = <&buck2>;
  305. vss-microvolts = <0>;
  306. };
  307. lcd {
  308. u-boot,dm-pre-reloc;
  309. compatible = "sandbox,lcd-sdl";
  310. xres = <1366>;
  311. yres = <768>;
  312. };
  313. leds {
  314. compatible = "gpio-leds";
  315. iracibble {
  316. gpios = <&gpio_a 1 0>;
  317. label = "sandbox:red";
  318. };
  319. martinet {
  320. gpios = <&gpio_a 2 0>;
  321. label = "sandbox:green";
  322. };
  323. default_on {
  324. gpios = <&gpio_a 5 0>;
  325. label = "sandbox:default_on";
  326. default-state = "on";
  327. };
  328. default_off {
  329. gpios = <&gpio_a 6 0>;
  330. label = "sandbox:default_off";
  331. default-state = "off";
  332. };
  333. };
  334. mbox: mbox {
  335. compatible = "sandbox,mbox";
  336. #mbox-cells = <1>;
  337. };
  338. mbox-test {
  339. compatible = "sandbox,mbox-test";
  340. mboxes = <&mbox 100>, <&mbox 1>;
  341. mbox-names = "other", "test";
  342. };
  343. cpu-test1 {
  344. compatible = "sandbox,cpu_sandbox";
  345. u-boot,dm-pre-reloc;
  346. };
  347. cpu-test2 {
  348. compatible = "sandbox,cpu_sandbox";
  349. u-boot,dm-pre-reloc;
  350. };
  351. cpu-test3 {
  352. compatible = "sandbox,cpu_sandbox";
  353. u-boot,dm-pre-reloc;
  354. };
  355. i2s: i2s {
  356. compatible = "sandbox,i2s";
  357. #sound-dai-cells = <1>;
  358. sandbox,silent; /* Don't emit sounds while testing */
  359. };
  360. nop-test_0 {
  361. compatible = "sandbox,nop_sandbox1";
  362. nop-test_1 {
  363. compatible = "sandbox,nop_sandbox2";
  364. bind = "True";
  365. };
  366. nop-test_2 {
  367. compatible = "sandbox,nop_sandbox2";
  368. bind = "False";
  369. };
  370. };
  371. misc-test {
  372. compatible = "sandbox,misc_sandbox";
  373. };
  374. mmc2 {
  375. compatible = "sandbox,mmc";
  376. };
  377. mmc1 {
  378. compatible = "sandbox,mmc";
  379. };
  380. mmc0 {
  381. compatible = "sandbox,mmc";
  382. };
  383. pch {
  384. compatible = "sandbox,pch";
  385. };
  386. pci0: pci-controller0 {
  387. compatible = "sandbox,pci";
  388. device_type = "pci";
  389. #address-cells = <3>;
  390. #size-cells = <2>;
  391. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  392. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  393. pci@0,0 {
  394. compatible = "pci-generic";
  395. reg = <0x0000 0 0 0 0>;
  396. sandbox,emul = <&swap_case_emul0_0>;
  397. };
  398. pci@1,0 {
  399. compatible = "pci-generic";
  400. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  401. reg = <0x02000814 0 0 0 0
  402. 0x01000810 0 0 0 0>;
  403. sandbox,emul = <&swap_case_emul0_1>;
  404. };
  405. pci@1f,0 {
  406. compatible = "pci-generic";
  407. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  408. reg = <0x0100f810 0 0 0 0>;
  409. sandbox,emul = <&swap_case_emul0_1f>;
  410. };
  411. };
  412. pci-emul0 {
  413. compatible = "sandbox,pci-emul-parent";
  414. swap_case_emul0_0: emul0@0,0 {
  415. compatible = "sandbox,swap-case";
  416. };
  417. swap_case_emul0_1: emul0@1,0 {
  418. compatible = "sandbox,swap-case";
  419. use-ea;
  420. };
  421. swap_case_emul0_1f: emul0@1f,0 {
  422. compatible = "sandbox,swap-case";
  423. };
  424. };
  425. pci1: pci-controller1 {
  426. compatible = "sandbox,pci";
  427. device_type = "pci";
  428. #address-cells = <3>;
  429. #size-cells = <2>;
  430. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
  431. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  432. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  433. 0x0c 0x00 0x1234 0x5678
  434. 0x10 0x00 0x1234 0x5678>;
  435. pci@10,0 {
  436. reg = <0x8000 0 0 0 0>;
  437. };
  438. };
  439. pci2: pci-controller2 {
  440. compatible = "sandbox,pci";
  441. device_type = "pci";
  442. #address-cells = <3>;
  443. #size-cells = <2>;
  444. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  445. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  446. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  447. pci@1f,0 {
  448. compatible = "pci-generic";
  449. reg = <0xf800 0 0 0 0>;
  450. sandbox,emul = <&swap_case_emul2_1f>;
  451. };
  452. };
  453. pci-emul2 {
  454. compatible = "sandbox,pci-emul-parent";
  455. swap_case_emul2_1f: emul2@1f,0 {
  456. compatible = "sandbox,swap-case";
  457. };
  458. };
  459. pci_ep: pci_ep {
  460. compatible = "sandbox,pci_ep";
  461. };
  462. probing {
  463. compatible = "simple-bus";
  464. test1 {
  465. compatible = "denx,u-boot-probe-test";
  466. };
  467. test2 {
  468. compatible = "denx,u-boot-probe-test";
  469. };
  470. test3 {
  471. compatible = "denx,u-boot-probe-test";
  472. };
  473. test4 {
  474. compatible = "denx,u-boot-probe-test";
  475. first-syscon = <&syscon0>;
  476. second-sys-ctrl = <&another_system_controller>;
  477. third-syscon = <&syscon2>;
  478. };
  479. };
  480. pwrdom: power-domain {
  481. compatible = "sandbox,power-domain";
  482. #power-domain-cells = <1>;
  483. };
  484. power-domain-test {
  485. compatible = "sandbox,power-domain-test";
  486. power-domains = <&pwrdom 2>;
  487. };
  488. pwm: pwm {
  489. compatible = "sandbox,pwm";
  490. #pwm-cells = <2>;
  491. };
  492. pwm2 {
  493. compatible = "sandbox,pwm";
  494. #pwm-cells = <2>;
  495. };
  496. ram {
  497. compatible = "sandbox,ram";
  498. };
  499. reset@0 {
  500. compatible = "sandbox,warm-reset";
  501. };
  502. reset@1 {
  503. compatible = "sandbox,reset";
  504. };
  505. resetc: reset-ctl {
  506. compatible = "sandbox,reset-ctl";
  507. #reset-cells = <1>;
  508. };
  509. reset-ctl-test {
  510. compatible = "sandbox,reset-ctl-test";
  511. resets = <&resetc 100>, <&resetc 2>;
  512. reset-names = "other", "test";
  513. };
  514. rproc_1: rproc@1 {
  515. compatible = "sandbox,test-processor";
  516. remoteproc-name = "remoteproc-test-dev1";
  517. };
  518. rproc_2: rproc@2 {
  519. compatible = "sandbox,test-processor";
  520. internal-memory-mapped;
  521. remoteproc-name = "remoteproc-test-dev2";
  522. };
  523. panel {
  524. compatible = "simple-panel";
  525. backlight = <&backlight 0 100>;
  526. };
  527. smem@0 {
  528. compatible = "sandbox,smem";
  529. };
  530. sound {
  531. compatible = "sandbox,sound";
  532. cpu {
  533. sound-dai = <&i2s 0>;
  534. };
  535. codec {
  536. sound-dai = <&audio 0>;
  537. };
  538. };
  539. spi@0 {
  540. #address-cells = <1>;
  541. #size-cells = <0>;
  542. reg = <0 1>;
  543. compatible = "sandbox,spi";
  544. cs-gpios = <0>, <&gpio_a 0>;
  545. spi.bin@0 {
  546. reg = <0>;
  547. compatible = "spansion,m25p16", "jedec,spi-nor";
  548. spi-max-frequency = <40000000>;
  549. sandbox,filename = "spi.bin";
  550. };
  551. };
  552. syscon0: syscon@0 {
  553. compatible = "sandbox,syscon0";
  554. reg = <0x10 16>;
  555. };
  556. another_system_controller: syscon@1 {
  557. compatible = "sandbox,syscon1";
  558. reg = <0x20 5
  559. 0x28 6
  560. 0x30 7
  561. 0x38 8>;
  562. };
  563. syscon2: syscon@2 {
  564. compatible = "simple-mfd", "syscon";
  565. reg = <0x40 5
  566. 0x48 6
  567. 0x50 7
  568. 0x58 8>;
  569. };
  570. timer {
  571. compatible = "sandbox,timer";
  572. clock-frequency = <1000000>;
  573. };
  574. tpm2 {
  575. compatible = "sandbox,tpm2";
  576. };
  577. uart0: serial {
  578. compatible = "sandbox,serial";
  579. u-boot,dm-pre-reloc;
  580. };
  581. usb_0: usb@0 {
  582. compatible = "sandbox,usb";
  583. status = "disabled";
  584. hub {
  585. compatible = "sandbox,usb-hub";
  586. #address-cells = <1>;
  587. #size-cells = <0>;
  588. flash-stick {
  589. reg = <0>;
  590. compatible = "sandbox,usb-flash";
  591. };
  592. };
  593. };
  594. usb_1: usb@1 {
  595. compatible = "sandbox,usb";
  596. hub {
  597. compatible = "usb-hub";
  598. usb,device-class = <9>;
  599. hub-emul {
  600. compatible = "sandbox,usb-hub";
  601. #address-cells = <1>;
  602. #size-cells = <0>;
  603. flash-stick@0 {
  604. reg = <0>;
  605. compatible = "sandbox,usb-flash";
  606. sandbox,filepath = "testflash.bin";
  607. };
  608. flash-stick@1 {
  609. reg = <1>;
  610. compatible = "sandbox,usb-flash";
  611. sandbox,filepath = "testflash1.bin";
  612. };
  613. flash-stick@2 {
  614. reg = <2>;
  615. compatible = "sandbox,usb-flash";
  616. sandbox,filepath = "testflash2.bin";
  617. };
  618. keyb@3 {
  619. reg = <3>;
  620. compatible = "sandbox,usb-keyb";
  621. };
  622. };
  623. };
  624. };
  625. usb_2: usb@2 {
  626. compatible = "sandbox,usb";
  627. status = "disabled";
  628. };
  629. spmi: spmi@0 {
  630. compatible = "sandbox,spmi";
  631. #address-cells = <0x1>;
  632. #size-cells = <0x1>;
  633. ranges;
  634. pm8916@0 {
  635. compatible = "qcom,spmi-pmic";
  636. reg = <0x0 0x1>;
  637. #address-cells = <0x1>;
  638. #size-cells = <0x1>;
  639. ranges;
  640. spmi_gpios: gpios@c000 {
  641. compatible = "qcom,pm8916-gpio";
  642. reg = <0xc000 0x400>;
  643. gpio-controller;
  644. gpio-count = <4>;
  645. #gpio-cells = <2>;
  646. gpio-bank-name="spmi";
  647. };
  648. };
  649. };
  650. wdt0: wdt@0 {
  651. compatible = "sandbox,wdt";
  652. };
  653. axi: axi@0 {
  654. compatible = "sandbox,axi";
  655. #address-cells = <0x1>;
  656. #size-cells = <0x1>;
  657. store@0 {
  658. compatible = "sandbox,sandbox_store";
  659. reg = <0x0 0x400>;
  660. };
  661. };
  662. chosen {
  663. #address-cells = <1>;
  664. #size-cells = <1>;
  665. chosen-test {
  666. compatible = "denx,u-boot-fdt-test";
  667. reg = <9 1>;
  668. };
  669. };
  670. translation-test@8000 {
  671. compatible = "simple-bus";
  672. reg = <0x8000 0x4000>;
  673. #address-cells = <0x2>;
  674. #size-cells = <0x1>;
  675. ranges = <0 0x0 0x8000 0x1000
  676. 1 0x100 0x9000 0x1000
  677. 2 0x200 0xA000 0x1000
  678. 3 0x300 0xB000 0x1000
  679. >;
  680. dma-ranges = <0 0x000 0x10000000 0x1000
  681. 1 0x100 0x20000000 0x1000
  682. >;
  683. dev@0,0 {
  684. compatible = "denx,u-boot-fdt-dummy";
  685. reg = <0 0x0 0x1000>;
  686. reg-names = "sandbox-dummy-0";
  687. };
  688. dev@1,100 {
  689. compatible = "denx,u-boot-fdt-dummy";
  690. reg = <1 0x100 0x1000>;
  691. };
  692. dev@2,200 {
  693. compatible = "denx,u-boot-fdt-dummy";
  694. reg = <2 0x200 0x1000>;
  695. };
  696. noxlatebus@3,300 {
  697. compatible = "simple-bus";
  698. reg = <3 0x300 0x1000>;
  699. #address-cells = <0x1>;
  700. #size-cells = <0x0>;
  701. dev@42 {
  702. compatible = "denx,u-boot-fdt-dummy";
  703. reg = <0x42>;
  704. };
  705. };
  706. };
  707. osd {
  708. compatible = "sandbox,sandbox_osd";
  709. };
  710. board {
  711. compatible = "sandbox,board_sandbox";
  712. };
  713. sandbox_tee {
  714. compatible = "sandbox,tee";
  715. };
  716. sandbox_virtio1 {
  717. compatible = "sandbox,virtio1";
  718. };
  719. sandbox_virtio2 {
  720. compatible = "sandbox,virtio2";
  721. };
  722. pinctrl {
  723. compatible = "sandbox,pinctrl";
  724. };
  725. hwspinlock@0 {
  726. compatible = "sandbox,hwspinlock";
  727. };
  728. dma: dma {
  729. compatible = "sandbox,dma";
  730. #dma-cells = <1>;
  731. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  732. dma-names = "m2m", "tx0", "rx0";
  733. };
  734. /*
  735. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  736. * end of the test. If parent mdio is removed first, clean-up of the
  737. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  738. * active at the end of the test. That it turn doesn't allow the mdio
  739. * class to be destroyed, triggering an error.
  740. */
  741. mdio-mux-test {
  742. compatible = "sandbox,mdio-mux";
  743. #address-cells = <1>;
  744. #size-cells = <0>;
  745. mdio-parent-bus = <&mdio>;
  746. mdio-ch-test@0 {
  747. reg = <0>;
  748. };
  749. mdio-ch-test@1 {
  750. reg = <1>;
  751. };
  752. };
  753. mdio: mdio-test {
  754. compatible = "sandbox,mdio";
  755. };
  756. };
  757. #include "sandbox_pmic.dtsi"