Makefile.build 15 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. src := $(obj)
  5. PHONY := __build
  6. __build:
  7. # Init all relevant variables used in kbuild files so
  8. # 1) they have correct type
  9. # 2) they do not inherit any value from the environment
  10. obj-y :=
  11. obj-m :=
  12. lib-y :=
  13. lib-m :=
  14. always :=
  15. targets :=
  16. subdir-y :=
  17. subdir-m :=
  18. EXTRA_AFLAGS :=
  19. EXTRA_CFLAGS :=
  20. EXTRA_CPPFLAGS :=
  21. EXTRA_LDFLAGS :=
  22. asflags-y :=
  23. ccflags-y :=
  24. cppflags-y :=
  25. ldflags-y :=
  26. subdir-asflags-y :=
  27. subdir-ccflags-y :=
  28. # Read auto.conf if it exists, otherwise ignore
  29. -include include/config/auto.conf
  30. include scripts/Kbuild.include
  31. # For backward compatibility check that these variables do not change
  32. save-cflags := $(CFLAGS)
  33. # The filename Kbuild has precedence over Makefile
  34. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  35. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  36. include $(kbuild-file)
  37. # If the save-* variables changed error out
  38. ifeq ($(KBUILD_NOPEDANTIC),)
  39. ifneq ("$(save-cflags)","$(CFLAGS)")
  40. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  41. endif
  42. endif
  43. #
  44. # make W=... settings
  45. #
  46. # W=1 - warnings that may be relevant and does not occur too often
  47. # W=2 - warnings that occur quite often but may still be relevant
  48. # W=3 - the more obscure warnings, can most likely be ignored
  49. #
  50. # $(call cc-option, -W...) handles gcc -W.. options which
  51. # are not supported by all versions of the compiler
  52. ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
  53. warning- := $(empty)
  54. warning-1 := -Wextra -Wunused -Wno-unused-parameter
  55. warning-1 += -Wmissing-declarations
  56. warning-1 += -Wmissing-format-attribute
  57. warning-1 += -Wmissing-prototypes
  58. warning-1 += -Wold-style-definition
  59. warning-1 += $(call cc-option, -Wmissing-include-dirs)
  60. warning-1 += $(call cc-option, -Wunused-but-set-variable)
  61. warning-1 += $(call cc-disable-warning, missing-field-initializers)
  62. warning-2 := -Waggregate-return
  63. warning-2 += -Wcast-align
  64. warning-2 += -Wdisabled-optimization
  65. warning-2 += -Wnested-externs
  66. warning-2 += -Wshadow
  67. warning-2 += $(call cc-option, -Wlogical-op)
  68. warning-2 += $(call cc-option, -Wmissing-field-initializers)
  69. warning-3 := -Wbad-function-cast
  70. warning-3 += -Wcast-qual
  71. warning-3 += -Wconversion
  72. warning-3 += -Wpacked
  73. warning-3 += -Wpadded
  74. warning-3 += -Wpointer-arith
  75. warning-3 += -Wredundant-decls
  76. warning-3 += -Wswitch-default
  77. warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
  78. warning-3 += $(call cc-option, -Wvla)
  79. warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  80. warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  81. warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  82. ifeq ("$(strip $(warning))","")
  83. $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
  84. endif
  85. KBUILD_CFLAGS += $(warning)
  86. endif
  87. include scripts/Makefile.lib
  88. ifdef host-progs
  89. ifneq ($(hostprogs-y),$(host-progs))
  90. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  91. hostprogs-y += $(host-progs)
  92. endif
  93. endif
  94. # Do not include host rules unless needed
  95. ifneq ($(hostprogs-y)$(hostprogs-m),)
  96. include scripts/Makefile.host
  97. endif
  98. ifneq ($(KBUILD_SRC),)
  99. # Create output directory if not already present
  100. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  101. # Create directories for object files if directory does not exist
  102. # Needed when obj-y := dir/file.o syntax is used
  103. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  104. endif
  105. ifndef obj
  106. $(warning kbuild: Makefile.build is included improperly)
  107. endif
  108. # ===========================================================================
  109. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  110. lib-target := $(obj)/lib.a
  111. endif
  112. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
  113. builtin-target := $(obj)/built-in.o
  114. endif
  115. modorder-target := $(obj)/modules.order
  116. # We keep a list of all modules in $(MODVERDIR)
  117. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  118. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  119. $(subdir-ym) $(always)
  120. @:
  121. # Linus' kernel sanity checking tool
  122. ifneq ($(KBUILD_CHECKSRC),0)
  123. ifeq ($(KBUILD_CHECKSRC),2)
  124. quiet_cmd_force_checksrc = CHECK $<
  125. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  126. else
  127. quiet_cmd_checksrc = CHECK $<
  128. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  129. endif
  130. endif
  131. # Do section mismatch analysis for each module/built-in.o
  132. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  133. cmd_secanalysis = ; scripts/mod/modpost $@
  134. endif
  135. # Compile C sources (.c)
  136. # ---------------------------------------------------------------------------
  137. # Default is built-in, unless we know otherwise
  138. modkern_cflags = \
  139. $(if $(part-of-module), \
  140. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  141. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  142. quiet_modtag := $(empty) $(empty)
  143. $(real-objs-m) : part-of-module := y
  144. $(real-objs-m:.o=.i) : part-of-module := y
  145. $(real-objs-m:.o=.s) : part-of-module := y
  146. $(real-objs-m:.o=.lst): part-of-module := y
  147. $(real-objs-m) : quiet_modtag := [M]
  148. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  149. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  150. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  151. $(obj-m) : quiet_modtag := [M]
  152. # Default for not multi-part modules
  153. modname = $(basetarget)
  154. $(multi-objs-m) : modname = $(modname-multi)
  155. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  156. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  157. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  158. $(multi-objs-y) : modname = $(modname-multi)
  159. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  160. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  161. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  162. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  163. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  164. $(obj)/%.s: $(src)/%.c FORCE
  165. $(call if_changed_dep,cc_s_c)
  166. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  167. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  168. $(obj)/%.i: $(src)/%.c FORCE
  169. $(call if_changed_dep,cc_i_c)
  170. cmd_gensymtypes = \
  171. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  172. $(GENKSYMS) $(if $(1), -T $(2)) \
  173. $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
  174. $(if $(KBUILD_PRESERVE),-p) \
  175. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  176. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  177. cmd_cc_symtypes_c = \
  178. set -e; \
  179. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  180. test -s $@ || rm -f $@
  181. $(obj)/%.symtypes : $(src)/%.c FORCE
  182. $(call cmd,cc_symtypes_c)
  183. # C (.c) files
  184. # The C file is compiled and updated dependency information is generated.
  185. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  186. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  187. ifndef CONFIG_MODVERSIONS
  188. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  189. else
  190. # When module versioning is enabled the following steps are executed:
  191. # o compile a .tmp_<file>.o from <file>.c
  192. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  193. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  194. # are done.
  195. # o otherwise, we calculate symbol versions using the good old
  196. # genksyms on the preprocessed source and postprocess them in a way
  197. # that they are usable as a linker script
  198. # o generate <file>.o from .tmp_<file>.o using the linker to
  199. # replace the unresolved symbols __crc_exported_symbol with
  200. # the actual value of the checksum generated by genksyms
  201. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  202. cmd_modversions = \
  203. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  204. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  205. > $(@D)/.tmp_$(@F:.o=.ver); \
  206. \
  207. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  208. -T $(@D)/.tmp_$(@F:.o=.ver); \
  209. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  210. else \
  211. mv -f $(@D)/.tmp_$(@F) $@; \
  212. fi;
  213. endif
  214. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  215. ifdef BUILD_C_RECORDMCOUNT
  216. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  217. RECORDMCOUNT_FLAGS = -w
  218. endif
  219. # Due to recursion, we must skip empty.o.
  220. # The empty.o file is created in the make process in order to determine
  221. # the target endianness and word size. It is made before all other C
  222. # files, including recordmcount.
  223. sub_cmd_record_mcount = \
  224. if [ $(@) != "scripts/mod/empty.o" ]; then \
  225. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  226. fi;
  227. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  228. $(srctree)/scripts/recordmcount.h
  229. else
  230. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  231. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  232. "$(if $(CONFIG_64BIT),64,32)" \
  233. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  234. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  235. "$(if $(part-of-module),1,0)" "$(@)";
  236. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  237. endif
  238. cmd_record_mcount = \
  239. if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
  240. $(sub_cmd_record_mcount) \
  241. fi;
  242. endif
  243. define rule_cc_o_c
  244. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  245. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  246. $(cmd_modversions) \
  247. $(call echo-cmd,record_mcount) \
  248. $(cmd_record_mcount) \
  249. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  250. $(dot-target).tmp; \
  251. rm -f $(depfile); \
  252. mv -f $(dot-target).tmp $(dot-target).cmd
  253. endef
  254. # Built-in and composite module parts
  255. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  256. $(call cmd,force_checksrc)
  257. $(call if_changed_rule,cc_o_c)
  258. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  259. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  260. $(call cmd,force_checksrc)
  261. $(call if_changed_rule,cc_o_c)
  262. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  263. quiet_cmd_cc_lst_c = MKLST $@
  264. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  265. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  266. System.map $(OBJDUMP) > $@
  267. $(obj)/%.lst: $(src)/%.c FORCE
  268. $(call if_changed_dep,cc_lst_c)
  269. # Compile assembler sources (.S)
  270. # ---------------------------------------------------------------------------
  271. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  272. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  273. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  274. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  275. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  276. $(obj)/%.s: $(src)/%.S FORCE
  277. $(call if_changed_dep,as_s_S)
  278. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  279. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  280. $(obj)/%.o: $(src)/%.S FORCE
  281. $(call if_changed_dep,as_o_S)
  282. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  283. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  284. # Linker scripts preprocessor (.lds.S -> .lds)
  285. # ---------------------------------------------------------------------------
  286. quiet_cmd_cpp_lds_S = LDS $@
  287. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  288. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  289. $(obj)/%.lds: $(src)/%.lds.S FORCE
  290. $(call if_changed_dep,cpp_lds_S)
  291. # ASN.1 grammar
  292. # ---------------------------------------------------------------------------
  293. quiet_cmd_asn1_compiler = ASN.1 $@
  294. cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
  295. $(subst .h,.c,$@) $(subst .c,.h,$@)
  296. .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
  297. $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
  298. $(call cmd,asn1_compiler)
  299. # Build the compiled-in targets
  300. # ---------------------------------------------------------------------------
  301. # To build objects in subdirs, we need to descend into the directories
  302. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  303. #
  304. # Rule to compile a set of .o files into one .o file
  305. #
  306. ifdef builtin-target
  307. quiet_cmd_link_o_target = LD $@
  308. # If the list of objects to link is empty, just create an empty built-in.o
  309. cmd_link_o_target = $(if $(strip $(obj-y)),\
  310. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  311. $(cmd_secanalysis),\
  312. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  313. $(builtin-target): $(obj-y) FORCE
  314. $(call if_changed,link_o_target)
  315. targets += $(builtin-target)
  316. endif # builtin-target
  317. #
  318. # Rule to create modules.order file
  319. #
  320. # Create commands to either record .ko file or cat modules.order from
  321. # a subdirectory
  322. modorder-cmds = \
  323. $(foreach m, $(modorder), \
  324. $(if $(filter %/modules.order, $m), \
  325. cat $m;, echo kernel/$m;))
  326. $(modorder-target): $(subdir-ym) FORCE
  327. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  328. #
  329. # Rule to compile a set of .o files into one .a file
  330. #
  331. ifdef lib-target
  332. quiet_cmd_link_l_target = AR $@
  333. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  334. $(lib-target): $(lib-y) FORCE
  335. $(call if_changed,link_l_target)
  336. targets += $(lib-target)
  337. endif
  338. #
  339. # Rule to link composite objects
  340. #
  341. # Composite objects are specified in kbuild makefile as follows:
  342. # <composite-object>-objs := <list of .o files>
  343. # or
  344. # <composite-object>-y := <list of .o files>
  345. link_multi_deps = \
  346. $(filter $(addprefix $(obj)/, \
  347. $($(subst $(obj)/,,$(@:.o=-objs))) \
  348. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  349. quiet_cmd_link_multi-y = LD $@
  350. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  351. quiet_cmd_link_multi-m = LD [M] $@
  352. cmd_link_multi-m = $(cmd_link_multi-y)
  353. # We would rather have a list of rules like
  354. # foo.o: $(foo-objs)
  355. # but that's not so easy, so we rather make all composite objects depend
  356. # on the set of all their parts
  357. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  358. $(call if_changed,link_multi-y)
  359. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  360. $(call if_changed,link_multi-m)
  361. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  362. targets += $(multi-used-y) $(multi-used-m)
  363. # Descending
  364. # ---------------------------------------------------------------------------
  365. PHONY += $(subdir-ym)
  366. $(subdir-ym):
  367. $(Q)$(MAKE) $(build)=$@
  368. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  369. # ---------------------------------------------------------------------------
  370. PHONY += FORCE
  371. FORCE:
  372. # Read all saved command lines and dependencies for the $(targets) we
  373. # may be building above, using $(if_changed{,_dep}). As an
  374. # optimization, we don't need to read them if the target does not
  375. # exist, we will rebuild anyway in that case.
  376. targets := $(wildcard $(sort $(targets)))
  377. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  378. ifneq ($(cmd_files),)
  379. include $(cmd_files)
  380. endif
  381. # Declare the contents of the .PHONY variable as phony. We keep that
  382. # information in a variable se we can use it in if_changed and friends.
  383. .PHONY: $(PHONY)