meson-sm1.dtsi 13 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2019 BayLibre, SAS
  4. * Author: Neil Armstrong <narmstrong@baylibre.com>
  5. */
  6. #include "meson-g12-common.dtsi"
  7. #include <dt-bindings/clock/axg-audio-clkc.h>
  8. #include <dt-bindings/power/meson-sm1-power.h>
  9. #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
  10. #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
  11. / {
  12. compatible = "amlogic,sm1";
  13. tdmif_a: audio-controller-0 {
  14. compatible = "amlogic,axg-tdm-iface";
  15. #sound-dai-cells = <0>;
  16. sound-name-prefix = "TDM_A";
  17. clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
  18. <&clkc_audio AUD_CLKID_MST_A_SCLK>,
  19. <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
  20. clock-names = "mclk", "sclk", "lrclk";
  21. status = "disabled";
  22. };
  23. tdmif_b: audio-controller-1 {
  24. compatible = "amlogic,axg-tdm-iface";
  25. #sound-dai-cells = <0>;
  26. sound-name-prefix = "TDM_B";
  27. clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
  28. <&clkc_audio AUD_CLKID_MST_B_SCLK>,
  29. <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
  30. clock-names = "mclk", "sclk", "lrclk";
  31. status = "disabled";
  32. };
  33. tdmif_c: audio-controller-2 {
  34. compatible = "amlogic,axg-tdm-iface";
  35. #sound-dai-cells = <0>;
  36. sound-name-prefix = "TDM_C";
  37. clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
  38. <&clkc_audio AUD_CLKID_MST_C_SCLK>,
  39. <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
  40. clock-names = "mclk", "sclk", "lrclk";
  41. status = "disabled";
  42. };
  43. cpus {
  44. #address-cells = <0x2>;
  45. #size-cells = <0x0>;
  46. cpu0: cpu@0 {
  47. device_type = "cpu";
  48. compatible = "arm,cortex-a55";
  49. reg = <0x0 0x0>;
  50. enable-method = "psci";
  51. next-level-cache = <&l2>;
  52. };
  53. cpu1: cpu@1 {
  54. device_type = "cpu";
  55. compatible = "arm,cortex-a55";
  56. reg = <0x0 0x1>;
  57. enable-method = "psci";
  58. next-level-cache = <&l2>;
  59. };
  60. cpu2: cpu@2 {
  61. device_type = "cpu";
  62. compatible = "arm,cortex-a55";
  63. reg = <0x0 0x2>;
  64. enable-method = "psci";
  65. next-level-cache = <&l2>;
  66. };
  67. cpu3: cpu@3 {
  68. device_type = "cpu";
  69. compatible = "arm,cortex-a55";
  70. reg = <0x0 0x3>;
  71. enable-method = "psci";
  72. next-level-cache = <&l2>;
  73. };
  74. l2: l2-cache0 {
  75. compatible = "cache";
  76. };
  77. };
  78. cpu_opp_table: opp-table {
  79. compatible = "operating-points-v2";
  80. opp-shared;
  81. opp-100000000 {
  82. opp-hz = /bits/ 64 <100000000>;
  83. opp-microvolt = <730000>;
  84. };
  85. opp-250000000 {
  86. opp-hz = /bits/ 64 <250000000>;
  87. opp-microvolt = <730000>;
  88. };
  89. opp-500000000 {
  90. opp-hz = /bits/ 64 <500000000>;
  91. opp-microvolt = <730000>;
  92. };
  93. opp-667000000 {
  94. opp-hz = /bits/ 64 <666666666>;
  95. opp-microvolt = <750000>;
  96. };
  97. opp-1000000000 {
  98. opp-hz = /bits/ 64 <1000000000>;
  99. opp-microvolt = <770000>;
  100. };
  101. opp-1200000000 {
  102. opp-hz = /bits/ 64 <1200000000>;
  103. opp-microvolt = <780000>;
  104. };
  105. opp-1404000000 {
  106. opp-hz = /bits/ 64 <1404000000>;
  107. opp-microvolt = <790000>;
  108. };
  109. opp-1512000000 {
  110. opp-hz = /bits/ 64 <1500000000>;
  111. opp-microvolt = <800000>;
  112. };
  113. opp-1608000000 {
  114. opp-hz = /bits/ 64 <1608000000>;
  115. opp-microvolt = <810000>;
  116. };
  117. opp-1704000000 {
  118. opp-hz = /bits/ 64 <1704000000>;
  119. opp-microvolt = <850000>;
  120. };
  121. opp-1800000000 {
  122. opp-hz = /bits/ 64 <1800000000>;
  123. opp-microvolt = <900000>;
  124. };
  125. opp-1908000000 {
  126. opp-hz = /bits/ 64 <1908000000>;
  127. opp-microvolt = <950000>;
  128. };
  129. };
  130. };
  131. &apb {
  132. audio: bus@60000 {
  133. compatible = "simple-bus";
  134. reg = <0x0 0x60000 0x0 0x1000>;
  135. #address-cells = <2>;
  136. #size-cells = <2>;
  137. ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
  138. clkc_audio: clock-controller@0 {
  139. status = "disabled";
  140. compatible = "amlogic,sm1-audio-clkc";
  141. reg = <0x0 0x0 0x0 0xb4>;
  142. #clock-cells = <1>;
  143. #reset-cells = <1>;
  144. clocks = <&clkc CLKID_AUDIO>,
  145. <&clkc CLKID_MPLL0>,
  146. <&clkc CLKID_MPLL1>,
  147. <&clkc CLKID_MPLL2>,
  148. <&clkc CLKID_MPLL3>,
  149. <&clkc CLKID_HIFI_PLL>,
  150. <&clkc CLKID_FCLK_DIV3>,
  151. <&clkc CLKID_FCLK_DIV4>,
  152. <&clkc CLKID_FCLK_DIV5>;
  153. clock-names = "pclk",
  154. "mst_in0",
  155. "mst_in1",
  156. "mst_in2",
  157. "mst_in3",
  158. "mst_in4",
  159. "mst_in5",
  160. "mst_in6",
  161. "mst_in7";
  162. resets = <&reset RESET_AUDIO>;
  163. };
  164. toddr_a: audio-controller@100 {
  165. compatible = "amlogic,sm1-toddr",
  166. "amlogic,axg-toddr";
  167. reg = <0x0 0x100 0x0 0x2c>;
  168. #sound-dai-cells = <0>;
  169. sound-name-prefix = "TODDR_A";
  170. interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
  171. clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
  172. resets = <&arb AXG_ARB_TODDR_A>,
  173. <&clkc_audio AUD_RESET_TODDR_A>;
  174. reset-names = "arb", "rst";
  175. amlogic,fifo-depth = <8192>;
  176. status = "disabled";
  177. };
  178. toddr_b: audio-controller@140 {
  179. compatible = "amlogic,sm1-toddr",
  180. "amlogic,axg-toddr";
  181. reg = <0x0 0x140 0x0 0x2c>;
  182. #sound-dai-cells = <0>;
  183. sound-name-prefix = "TODDR_B";
  184. interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
  185. clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
  186. resets = <&arb AXG_ARB_TODDR_B>,
  187. <&clkc_audio AUD_RESET_TODDR_B>;
  188. reset-names = "arb", "rst";
  189. amlogic,fifo-depth = <256>;
  190. status = "disabled";
  191. };
  192. toddr_c: audio-controller@180 {
  193. compatible = "amlogic,sm1-toddr",
  194. "amlogic,axg-toddr";
  195. reg = <0x0 0x180 0x0 0x2c>;
  196. #sound-dai-cells = <0>;
  197. sound-name-prefix = "TODDR_C";
  198. interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
  199. clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
  200. resets = <&arb AXG_ARB_TODDR_C>,
  201. <&clkc_audio AUD_RESET_TODDR_C>;
  202. reset-names = "arb", "rst";
  203. amlogic,fifo-depth = <256>;
  204. status = "disabled";
  205. };
  206. frddr_a: audio-controller@1c0 {
  207. compatible = "amlogic,sm1-frddr",
  208. "amlogic,axg-frddr";
  209. reg = <0x0 0x1c0 0x0 0x2c>;
  210. #sound-dai-cells = <0>;
  211. sound-name-prefix = "FRDDR_A";
  212. interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  213. clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
  214. resets = <&arb AXG_ARB_FRDDR_A>,
  215. <&clkc_audio AUD_RESET_FRDDR_A>;
  216. reset-names = "arb", "rst";
  217. amlogic,fifo-depth = <512>;
  218. status = "disabled";
  219. };
  220. frddr_b: audio-controller@200 {
  221. compatible = "amlogic,sm1-frddr",
  222. "amlogic,axg-frddr";
  223. reg = <0x0 0x200 0x0 0x2c>;
  224. #sound-dai-cells = <0>;
  225. sound-name-prefix = "FRDDR_B";
  226. interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
  227. clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
  228. resets = <&arb AXG_ARB_FRDDR_B>,
  229. <&clkc_audio AUD_RESET_FRDDR_B>;
  230. reset-names = "arb", "rst";
  231. amlogic,fifo-depth = <256>;
  232. status = "disabled";
  233. };
  234. frddr_c: audio-controller@240 {
  235. compatible = "amlogic,sm1-frddr",
  236. "amlogic,axg-frddr";
  237. reg = <0x0 0x240 0x0 0x2c>;
  238. #sound-dai-cells = <0>;
  239. sound-name-prefix = "FRDDR_C";
  240. interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
  241. clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
  242. resets = <&arb AXG_ARB_FRDDR_C>,
  243. <&clkc_audio AUD_RESET_FRDDR_C>;
  244. reset-names = "arb", "rst";
  245. amlogic,fifo-depth = <256>;
  246. status = "disabled";
  247. };
  248. arb: reset-controller@280 {
  249. status = "disabled";
  250. compatible = "amlogic,meson-sm1-audio-arb";
  251. reg = <0x0 0x280 0x0 0x4>;
  252. #reset-cells = <1>;
  253. clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
  254. };
  255. tdmin_a: audio-controller@300 {
  256. compatible = "amlogic,sm1-tdmin",
  257. "amlogic,axg-tdmin";
  258. reg = <0x0 0x300 0x0 0x40>;
  259. sound-name-prefix = "TDMIN_A";
  260. resets = <&clkc_audio AUD_RESET_TDMIN_A>;
  261. clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
  262. <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
  263. <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
  264. <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
  265. <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
  266. clock-names = "pclk", "sclk", "sclk_sel",
  267. "lrclk", "lrclk_sel";
  268. status = "disabled";
  269. };
  270. tdmin_b: audio-controller@340 {
  271. compatible = "amlogic,sm1-tdmin",
  272. "amlogic,axg-tdmin";
  273. reg = <0x0 0x340 0x0 0x40>;
  274. sound-name-prefix = "TDMIN_B";
  275. resets = <&clkc_audio AUD_RESET_TDMIN_B>;
  276. clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
  277. <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
  278. <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
  279. <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
  280. <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
  281. clock-names = "pclk", "sclk", "sclk_sel",
  282. "lrclk", "lrclk_sel";
  283. status = "disabled";
  284. };
  285. tdmin_c: audio-controller@380 {
  286. compatible = "amlogic,sm1-tdmin",
  287. "amlogic,axg-tdmin";
  288. reg = <0x0 0x380 0x0 0x40>;
  289. sound-name-prefix = "TDMIN_C";
  290. resets = <&clkc_audio AUD_RESET_TDMIN_C>;
  291. clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
  292. <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
  293. <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
  294. <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
  295. <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
  296. clock-names = "pclk", "sclk", "sclk_sel",
  297. "lrclk", "lrclk_sel";
  298. status = "disabled";
  299. };
  300. tdmin_lb: audio-controller@3c0 {
  301. compatible = "amlogic,sm1-tdmin",
  302. "amlogic,axg-tdmin";
  303. reg = <0x0 0x3c0 0x0 0x40>;
  304. sound-name-prefix = "TDMIN_LB";
  305. resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
  306. clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
  307. <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
  308. <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
  309. <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
  310. <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
  311. clock-names = "pclk", "sclk", "sclk_sel",
  312. "lrclk", "lrclk_sel";
  313. status = "disabled";
  314. };
  315. tdmout_a: audio-controller@500 {
  316. compatible = "amlogic,sm1-tdmout";
  317. reg = <0x0 0x500 0x0 0x40>;
  318. sound-name-prefix = "TDMOUT_A";
  319. resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
  320. clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
  321. <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
  322. <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
  323. <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
  324. <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
  325. clock-names = "pclk", "sclk", "sclk_sel",
  326. "lrclk", "lrclk_sel";
  327. status = "disabled";
  328. };
  329. tdmout_b: audio-controller@540 {
  330. compatible = "amlogic,sm1-tdmout";
  331. reg = <0x0 0x540 0x0 0x40>;
  332. sound-name-prefix = "TDMOUT_B";
  333. resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
  334. clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
  335. <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
  336. <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
  337. <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
  338. <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
  339. clock-names = "pclk", "sclk", "sclk_sel",
  340. "lrclk", "lrclk_sel";
  341. status = "disabled";
  342. };
  343. tdmout_c: audio-controller@580 {
  344. compatible = "amlogic,sm1-tdmout";
  345. reg = <0x0 0x580 0x0 0x40>;
  346. sound-name-prefix = "TDMOUT_C";
  347. resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
  348. clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
  349. <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
  350. <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
  351. <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
  352. <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
  353. clock-names = "pclk", "sclk", "sclk_sel",
  354. "lrclk", "lrclk_sel";
  355. status = "disabled";
  356. };
  357. tohdmitx: audio-controller@744 {
  358. compatible = "amlogic,sm1-tohdmitx",
  359. "amlogic,g12a-tohdmitx";
  360. reg = <0x0 0x744 0x0 0x4>;
  361. #sound-dai-cells = <1>;
  362. sound-name-prefix = "TOHDMITX";
  363. resets = <&clkc_audio AUD_RESET_TOHDMITX>;
  364. status = "disabled";
  365. };
  366. toddr_d: audio-controller@840 {
  367. compatible = "amlogic,sm1-toddr",
  368. "amlogic,axg-toddr";
  369. reg = <0x0 0x840 0x0 0x2c>;
  370. #sound-dai-cells = <0>;
  371. sound-name-prefix = "TODDR_D";
  372. interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
  373. clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
  374. resets = <&arb AXG_ARB_TODDR_D>,
  375. <&clkc_audio AUD_RESET_TODDR_D>;
  376. reset-names = "arb", "rst";
  377. amlogic,fifo-depth = <256>;
  378. status = "disabled";
  379. };
  380. frddr_d: audio-controller@880 {
  381. compatible = "amlogic,sm1-frddr",
  382. "amlogic,axg-frddr";
  383. reg = <0x0 0x880 0x0 0x2c>;
  384. #sound-dai-cells = <0>;
  385. sound-name-prefix = "FRDDR_D";
  386. interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
  387. clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
  388. resets = <&arb AXG_ARB_FRDDR_D>,
  389. <&clkc_audio AUD_RESET_FRDDR_D>;
  390. reset-names = "arb", "rst";
  391. amlogic,fifo-depth = <256>;
  392. status = "disabled";
  393. };
  394. };
  395. pdm: audio-controller@61000 {
  396. compatible = "amlogic,sm1-pdm",
  397. "amlogic,axg-pdm";
  398. reg = <0x0 0x61000 0x0 0x34>;
  399. #sound-dai-cells = <0>;
  400. sound-name-prefix = "PDM";
  401. clocks = <&clkc_audio AUD_CLKID_PDM>,
  402. <&clkc_audio AUD_CLKID_PDM_DCLK>,
  403. <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
  404. clock-names = "pclk", "dclk", "sysclk";
  405. resets = <&clkc_audio AUD_RESET_PDM>;
  406. status = "disabled";
  407. };
  408. };
  409. &cecb_AO {
  410. compatible = "amlogic,meson-sm1-ao-cec";
  411. };
  412. &clk_msr {
  413. compatible = "amlogic,meson-sm1-clk-measure";
  414. };
  415. &clkc {
  416. compatible = "amlogic,sm1-clkc";
  417. };
  418. &ethmac {
  419. power-domains = <&pwrc PWRC_SM1_ETH_ID>;
  420. };
  421. &gpio_intc {
  422. compatible = "amlogic,meson-sm1-gpio-intc",
  423. "amlogic,meson-gpio-intc";
  424. };
  425. &pcie {
  426. power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
  427. };
  428. &pwrc {
  429. compatible = "amlogic,meson-sm1-pwrc";
  430. };
  431. &simplefb_cvbs {
  432. power-domains = <&pwrc PWRC_SM1_VPU_ID>;
  433. };
  434. &simplefb_hdmi {
  435. power-domains = <&pwrc PWRC_SM1_VPU_ID>;
  436. };
  437. &vdec {
  438. compatible = "amlogic,sm1-vdec";
  439. };
  440. &vpu {
  441. power-domains = <&pwrc PWRC_SM1_VPU_ID>;
  442. };
  443. &usb {
  444. power-domains = <&pwrc PWRC_SM1_USB_ID>;
  445. };