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- // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- /*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
- #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
- / {
- model = "Khadas VIM3";
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- vin-supply = <&dc_in>;
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8030DEC Regulator.
- */
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- vin-supply = <&vsys_3v3>;
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "G12B-KHADAS-VIM3";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
- };
- &arb {
- status = "okay";
- };
- &clkc_audio {
- status = "okay";
- };
- &cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
- };
- &cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
- };
- &cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
- };
- &cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
- };
- &cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
- };
- &cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
- };
- &frddr_b {
- status = "okay";
- };
- &frddr_c {
- status = "okay";
- };
- &pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
- };
- &pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
- };
- &tdmif_b {
- status = "okay";
- };
- &tdmout_b {
- status = "okay";
- };
- &tohdmitx {
- status = "okay";
- };
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