meson-g12a.dtsi 2.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
  4. */
  5. #include "meson-g12.dtsi"
  6. / {
  7. compatible = "amlogic,g12a";
  8. cpus {
  9. #address-cells = <0x2>;
  10. #size-cells = <0x0>;
  11. cpu0: cpu@0 {
  12. device_type = "cpu";
  13. compatible = "arm,cortex-a53";
  14. reg = <0x0 0x0>;
  15. enable-method = "psci";
  16. next-level-cache = <&l2>;
  17. #cooling-cells = <2>;
  18. };
  19. cpu1: cpu@1 {
  20. device_type = "cpu";
  21. compatible = "arm,cortex-a53";
  22. reg = <0x0 0x1>;
  23. enable-method = "psci";
  24. next-level-cache = <&l2>;
  25. #cooling-cells = <2>;
  26. };
  27. cpu2: cpu@2 {
  28. device_type = "cpu";
  29. compatible = "arm,cortex-a53";
  30. reg = <0x0 0x2>;
  31. enable-method = "psci";
  32. next-level-cache = <&l2>;
  33. #cooling-cells = <2>;
  34. };
  35. cpu3: cpu@3 {
  36. device_type = "cpu";
  37. compatible = "arm,cortex-a53";
  38. reg = <0x0 0x3>;
  39. enable-method = "psci";
  40. next-level-cache = <&l2>;
  41. #cooling-cells = <2>;
  42. };
  43. l2: l2-cache0 {
  44. compatible = "cache";
  45. };
  46. };
  47. cpu_opp_table: opp-table {
  48. compatible = "operating-points-v2";
  49. opp-shared;
  50. opp-100000000 {
  51. opp-hz = /bits/ 64 <100000000>;
  52. opp-microvolt = <731000>;
  53. };
  54. opp-250000000 {
  55. opp-hz = /bits/ 64 <250000000>;
  56. opp-microvolt = <731000>;
  57. };
  58. opp-500000000 {
  59. opp-hz = /bits/ 64 <500000000>;
  60. opp-microvolt = <731000>;
  61. };
  62. opp-667000000 {
  63. opp-hz = /bits/ 64 <666666666>;
  64. opp-microvolt = <731000>;
  65. };
  66. opp-1000000000 {
  67. opp-hz = /bits/ 64 <1000000000>;
  68. opp-microvolt = <731000>;
  69. };
  70. opp-1200000000 {
  71. opp-hz = /bits/ 64 <1200000000>;
  72. opp-microvolt = <731000>;
  73. };
  74. opp-1398000000 {
  75. opp-hz = /bits/ 64 <1398000000>;
  76. opp-microvolt = <761000>;
  77. };
  78. opp-1512000000 {
  79. opp-hz = /bits/ 64 <1512000000>;
  80. opp-microvolt = <791000>;
  81. };
  82. opp-1608000000 {
  83. opp-hz = /bits/ 64 <1608000000>;
  84. opp-microvolt = <831000>;
  85. };
  86. opp-1704000000 {
  87. opp-hz = /bits/ 64 <1704000000>;
  88. opp-microvolt = <861000>;
  89. };
  90. opp-1800000000 {
  91. opp-hz = /bits/ 64 <1800000000>;
  92. opp-microvolt = <981000>;
  93. };
  94. };
  95. };
  96. &cpu_thermal {
  97. cooling-maps {
  98. map0 {
  99. trip = <&cpu_passive>;
  100. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  101. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  102. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  103. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  104. };
  105. map1 {
  106. trip = <&cpu_hot>;
  107. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  108. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  109. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  110. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  111. };
  112. };
  113. };