stm32-vrefbuf.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
  5. *
  6. * Originally based on the Linux kernel v4.16 drivers/regulator/stm32-vrefbuf.c
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <dm.h>
  11. #include <asm/io.h>
  12. #include <dm/device_compat.h>
  13. #include <linux/bitops.h>
  14. #include <linux/iopoll.h>
  15. #include <linux/kernel.h>
  16. #include <power/regulator.h>
  17. /* STM32 VREFBUF registers */
  18. #define STM32_VREFBUF_CSR 0x00
  19. /* STM32 VREFBUF CSR bitfields */
  20. #define STM32_VRS GENMASK(6, 4)
  21. #define STM32_VRS_SHIFT 4
  22. #define STM32_VRR BIT(3)
  23. #define STM32_HIZ BIT(1)
  24. #define STM32_ENVR BIT(0)
  25. struct stm32_vrefbuf {
  26. void __iomem *base;
  27. struct clk clk;
  28. struct udevice *vdda_supply;
  29. };
  30. static const int stm32_vrefbuf_voltages[] = {
  31. /* Matches resp. VRS = 000b, 001b, 010b, 011b */
  32. 2500000, 2048000, 1800000, 1500000,
  33. };
  34. static int stm32_vrefbuf_set_enable(struct udevice *dev, bool enable)
  35. {
  36. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  37. u32 val;
  38. int ret;
  39. if (enable && !(readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR)) {
  40. /*
  41. * There maybe an overshoot:
  42. * - when disabling, then re-enabling vrefbuf too quickly
  43. * - or upon platform reset as external capacitor maybe slow
  44. * discharging (VREFBUF is HiZ at reset by default).
  45. * So force active discharge (HiZ=0) for 1ms before enabling.
  46. */
  47. clrbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ);
  48. udelay(1000);
  49. }
  50. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
  51. enable ? STM32_ENVR : 0);
  52. if (!enable)
  53. return 0;
  54. /*
  55. * Vrefbuf startup time depends on external capacitor: wait here for
  56. * VRR to be set. That means output has reached expected value.
  57. * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
  58. * arbitrary timeout.
  59. */
  60. ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
  61. val & STM32_VRR, 10000);
  62. if (ret < 0) {
  63. dev_err(dev, "stm32 vrefbuf timed out: %d\n", ret);
  64. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
  65. STM32_HIZ);
  66. return ret;
  67. }
  68. return 0;
  69. }
  70. static int stm32_vrefbuf_get_enable(struct udevice *dev)
  71. {
  72. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  73. return readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
  74. }
  75. static int stm32_vrefbuf_set_value(struct udevice *dev, int uV)
  76. {
  77. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  78. unsigned int i;
  79. for (i = 0; i < ARRAY_SIZE(stm32_vrefbuf_voltages); i++) {
  80. if (uV == stm32_vrefbuf_voltages[i]) {
  81. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR,
  82. STM32_VRS, i << STM32_VRS_SHIFT);
  83. return 0;
  84. }
  85. }
  86. return -EINVAL;
  87. }
  88. static int stm32_vrefbuf_get_value(struct udevice *dev)
  89. {
  90. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  91. u32 val;
  92. val = readl(priv->base + STM32_VREFBUF_CSR) & STM32_VRS;
  93. val >>= STM32_VRS_SHIFT;
  94. return stm32_vrefbuf_voltages[val];
  95. }
  96. static const struct dm_regulator_ops stm32_vrefbuf_ops = {
  97. .get_value = stm32_vrefbuf_get_value,
  98. .set_value = stm32_vrefbuf_set_value,
  99. .get_enable = stm32_vrefbuf_get_enable,
  100. .set_enable = stm32_vrefbuf_set_enable,
  101. };
  102. static int stm32_vrefbuf_probe(struct udevice *dev)
  103. {
  104. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  105. int ret;
  106. priv->base = dev_read_addr_ptr(dev);
  107. ret = clk_get_by_index(dev, 0, &priv->clk);
  108. if (ret) {
  109. dev_err(dev, "Can't get clock: %d\n", ret);
  110. return ret;
  111. }
  112. ret = clk_enable(&priv->clk);
  113. if (ret) {
  114. dev_err(dev, "Can't enable clock: %d\n", ret);
  115. return ret;
  116. }
  117. ret = device_get_supply_regulator(dev, "vdda-supply",
  118. &priv->vdda_supply);
  119. if (ret) {
  120. dev_dbg(dev, "No vdda-supply: %d\n", ret);
  121. return 0;
  122. }
  123. ret = regulator_set_enable(priv->vdda_supply, true);
  124. if (ret) {
  125. dev_err(dev, "Can't enable vdda-supply: %d\n", ret);
  126. clk_disable(&priv->clk);
  127. }
  128. return ret;
  129. }
  130. static const struct udevice_id stm32_vrefbuf_ids[] = {
  131. { .compatible = "st,stm32-vrefbuf" },
  132. { }
  133. };
  134. U_BOOT_DRIVER(stm32_vrefbuf) = {
  135. .name = "stm32-vrefbuf",
  136. .id = UCLASS_REGULATOR,
  137. .of_match = stm32_vrefbuf_ids,
  138. .probe = stm32_vrefbuf_probe,
  139. .ops = &stm32_vrefbuf_ops,
  140. .priv_auto_alloc_size = sizeof(struct stm32_vrefbuf),
  141. };