at91sam9m10g45_devices.c 4.6 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <asm/arch/at91_common.h>
  10. #include <asm/arch/at91_pmc.h>
  11. #include <asm/arch/gpio.h>
  12. #include <asm/io.h>
  13. /*
  14. * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  15. * peripheral pins. Good to have if hardware is soldered optionally
  16. * or in case of SPI no slave is selected. Avoid lines to float
  17. * needlessly. Use a short local PUP define.
  18. *
  19. * Due to errata "TXD floats when CTS is inactive" pullups are always
  20. * on for TXD pins.
  21. */
  22. #ifdef CONFIG_AT91_GPIO_PULLUP
  23. # define PUP CONFIG_AT91_GPIO_PULLUP
  24. #else
  25. # define PUP 0
  26. #endif
  27. void at91_serial0_hw_init(void)
  28. {
  29. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  30. at91_set_a_periph(AT91_PIO_PORTB, 19, 1); /* TXD0 */
  31. at91_set_a_periph(AT91_PIO_PORTB, 18, PUP); /* RXD0 */
  32. writel(1 << ATMEL_ID_USART0, &pmc->pcer);
  33. }
  34. void at91_serial1_hw_init(void)
  35. {
  36. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  37. at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD1 */
  38. at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD1 */
  39. writel(1 << ATMEL_ID_USART1, &pmc->pcer);
  40. }
  41. void at91_serial2_hw_init(void)
  42. {
  43. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  44. at91_set_a_periph(AT91_PIO_PORTD, 6, 1); /* TXD2 */
  45. at91_set_a_periph(AT91_PIO_PORTD, 7, PUP); /* RXD2 */
  46. writel(1 << ATMEL_ID_USART2, &pmc->pcer);
  47. }
  48. void at91_seriald_hw_init(void)
  49. {
  50. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  51. at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* DRXD */
  52. at91_set_a_periph(AT91_PIO_PORTB, 13, 1); /* DTXD */
  53. writel(1 << ATMEL_ID_SYS, &pmc->pcer);
  54. }
  55. #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  56. void at91_spi0_hw_init(unsigned long cs_mask)
  57. {
  58. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  59. at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI0_MISO */
  60. at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI0_MOSI */
  61. at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI0_SPCK */
  62. /* Enable clock */
  63. writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
  64. if (cs_mask & (1 << 0)) {
  65. at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
  66. }
  67. if (cs_mask & (1 << 1)) {
  68. at91_set_b_periph(AT91_PIO_PORTB, 18, 1);
  69. }
  70. if (cs_mask & (1 << 2)) {
  71. at91_set_b_periph(AT91_PIO_PORTB, 19, 1);
  72. }
  73. if (cs_mask & (1 << 3)) {
  74. at91_set_b_periph(AT91_PIO_PORTD, 27, 1);
  75. }
  76. if (cs_mask & (1 << 4)) {
  77. at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
  78. }
  79. if (cs_mask & (1 << 5)) {
  80. at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
  81. }
  82. if (cs_mask & (1 << 6)) {
  83. at91_set_pio_output(AT91_PIO_PORTB, 19, 1);
  84. }
  85. if (cs_mask & (1 << 7)) {
  86. at91_set_pio_output(AT91_PIO_PORTD, 27, 1);
  87. }
  88. }
  89. void at91_spi1_hw_init(unsigned long cs_mask)
  90. {
  91. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  92. at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_MISO */
  93. at91_set_a_periph(AT91_PIO_PORTB, 15, PUP); /* SPI1_MOSI */
  94. at91_set_a_periph(AT91_PIO_PORTB, 16, PUP); /* SPI1_SPCK */
  95. /* Enable clock */
  96. writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
  97. if (cs_mask & (1 << 0)) {
  98. at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
  99. }
  100. if (cs_mask & (1 << 1)) {
  101. at91_set_b_periph(AT91_PIO_PORTD, 28, 1);
  102. }
  103. if (cs_mask & (1 << 2)) {
  104. at91_set_a_periph(AT91_PIO_PORTD, 18, 1);
  105. }
  106. if (cs_mask & (1 << 3)) {
  107. at91_set_a_periph(AT91_PIO_PORTD, 19, 1);
  108. }
  109. if (cs_mask & (1 << 4)) {
  110. at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
  111. }
  112. if (cs_mask & (1 << 5)) {
  113. at91_set_pio_output(AT91_PIO_PORTD, 28, 1);
  114. }
  115. if (cs_mask & (1 << 6)) {
  116. at91_set_pio_output(AT91_PIO_PORTD, 18, 1);
  117. }
  118. if (cs_mask & (1 << 7)) {
  119. at91_set_pio_output(AT91_PIO_PORTD, 19, 1);
  120. }
  121. }
  122. #endif
  123. #ifdef CONFIG_MACB
  124. void at91_macb_hw_init(void)
  125. {
  126. at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* ETXCK_EREFCK */
  127. at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* ERXDV */
  128. at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* ERX0 */
  129. at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* ERX1 */
  130. at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* ERXER */
  131. at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* ETXEN */
  132. at91_set_a_periph(AT91_PIO_PORTA, 10, 0); /* ETX0 */
  133. at91_set_a_periph(AT91_PIO_PORTA, 11, 0); /* ETX1 */
  134. at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* EMDIO */
  135. at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* EMDC */
  136. #ifndef CONFIG_RMII
  137. at91_set_b_periph(AT91_PIO_PORTA, 29, 0); /* ECRS */
  138. at91_set_b_periph(AT91_PIO_PORTA, 30, 0); /* ECOL */
  139. at91_set_b_periph(AT91_PIO_PORTA, 8, 0); /* ERX2 */
  140. at91_set_b_periph(AT91_PIO_PORTA, 9, 0); /* ERX3 */
  141. at91_set_b_periph(AT91_PIO_PORTA, 28, 0); /* ERXCK */
  142. at91_set_b_periph(AT91_PIO_PORTA, 6, 0); /* ETX2 */
  143. at91_set_b_periph(AT91_PIO_PORTA, 7, 0); /* ETX3 */
  144. at91_set_b_periph(AT91_PIO_PORTA, 27, 0); /* ETXER */
  145. #endif
  146. }
  147. #endif