at91sam9263_devices.c 5.2 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian@popies.net>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2009-2011
  7. * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
  8. * esd electronic system design gmbh <www.esd.eu>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <asm/io.h>
  14. #include <asm/arch/at91_common.h>
  15. #include <asm/arch/at91_pmc.h>
  16. #include <asm/arch/gpio.h>
  17. /*
  18. * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
  19. * peripheral pins. Good to have if hardware is soldered optionally
  20. * or in case of SPI no slave is selected. Avoid lines to float
  21. * needlessly. Use a short local PUP define.
  22. *
  23. * Due to errata "TXD floats when CTS is inactive" pullups are always
  24. * on for TXD pins.
  25. */
  26. #ifdef CONFIG_AT91_GPIO_PULLUP
  27. # define PUP CONFIG_AT91_GPIO_PULLUP
  28. #else
  29. # define PUP 0
  30. #endif
  31. void at91_serial0_hw_init(void)
  32. {
  33. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  34. at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
  35. at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* RXD0 */
  36. writel(1 << ATMEL_ID_USART0, &pmc->pcer);
  37. }
  38. void at91_serial1_hw_init(void)
  39. {
  40. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  41. at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
  42. at91_set_a_periph(AT91_PIO_PORTD, 1, PUP); /* RXD1 */
  43. writel(1 << ATMEL_ID_USART1, &pmc->pcer);
  44. }
  45. void at91_serial2_hw_init(void)
  46. {
  47. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  48. at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
  49. at91_set_a_periph(AT91_PIO_PORTD, 3, PUP); /* RXD2 */
  50. writel(1 << ATMEL_ID_USART2, &pmc->pcer);
  51. }
  52. void at91_seriald_hw_init(void)
  53. {
  54. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  55. at91_set_a_periph(AT91_PIO_PORTC, 30, PUP); /* DRXD */
  56. at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
  57. writel(1 << ATMEL_ID_SYS, &pmc->pcer);
  58. }
  59. #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
  60. void at91_spi0_hw_init(unsigned long cs_mask)
  61. {
  62. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  63. at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
  64. at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
  65. at91_set_b_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
  66. /* Enable clock */
  67. writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
  68. if (cs_mask & (1 << 0)) {
  69. at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
  70. }
  71. if (cs_mask & (1 << 1)) {
  72. at91_set_b_periph(AT91_PIO_PORTA, 3, 1);
  73. }
  74. if (cs_mask & (1 << 2)) {
  75. at91_set_b_periph(AT91_PIO_PORTA, 4, 1);
  76. }
  77. if (cs_mask & (1 << 3)) {
  78. at91_set_b_periph(AT91_PIO_PORTB, 11, 1);
  79. }
  80. if (cs_mask & (1 << 4)) {
  81. at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
  82. }
  83. if (cs_mask & (1 << 5)) {
  84. at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
  85. }
  86. if (cs_mask & (1 << 6)) {
  87. at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
  88. }
  89. if (cs_mask & (1 << 7)) {
  90. at91_set_pio_output(AT91_PIO_PORTB, 11, 1);
  91. }
  92. }
  93. void at91_spi1_hw_init(unsigned long cs_mask)
  94. {
  95. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  96. at91_set_a_periph(AT91_PIO_PORTB, 12, PUP); /* SPI1_MISO */
  97. at91_set_a_periph(AT91_PIO_PORTB, 13, PUP); /* SPI1_MOSI */
  98. at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* SPI1_SPCK */
  99. /* Enable clock */
  100. writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
  101. if (cs_mask & (1 << 0)) {
  102. at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
  103. }
  104. if (cs_mask & (1 << 1)) {
  105. at91_set_a_periph(AT91_PIO_PORTB, 16, 1);
  106. }
  107. if (cs_mask & (1 << 2)) {
  108. at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
  109. }
  110. if (cs_mask & (1 << 3)) {
  111. at91_set_a_periph(AT91_PIO_PORTB, 18, 1);
  112. }
  113. if (cs_mask & (1 << 4)) {
  114. at91_set_pio_output(AT91_PIO_PORTB, 15, 1);
  115. }
  116. if (cs_mask & (1 << 5)) {
  117. at91_set_pio_output(AT91_PIO_PORTB, 16, 1);
  118. }
  119. if (cs_mask & (1 << 6)) {
  120. at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
  121. }
  122. if (cs_mask & (1 << 7)) {
  123. at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
  124. }
  125. }
  126. #endif
  127. #ifdef CONFIG_MACB
  128. void at91_macb_hw_init(void)
  129. {
  130. at91_set_a_periph(AT91_PIO_PORTE, 21, 0); /* ETXCK_EREFCK */
  131. at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ERXDV */
  132. at91_set_a_periph(AT91_PIO_PORTE, 25, 0); /* ERX0 */
  133. at91_set_a_periph(AT91_PIO_PORTE, 26, 0); /* ERX1 */
  134. at91_set_a_periph(AT91_PIO_PORTE, 27, 0); /* ERXER */
  135. at91_set_a_periph(AT91_PIO_PORTE, 28, 0); /* ETXEN */
  136. at91_set_a_periph(AT91_PIO_PORTE, 23, 0); /* ETX0 */
  137. at91_set_a_periph(AT91_PIO_PORTE, 24, 0); /* ETX1 */
  138. at91_set_a_periph(AT91_PIO_PORTE, 30, 0); /* EMDIO */
  139. at91_set_a_periph(AT91_PIO_PORTE, 29, 0); /* EMDC */
  140. #ifndef CONFIG_RMII
  141. at91_set_a_periph(AT91_PIO_PORTE, 22, 0); /* ECRS */
  142. at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */
  143. at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */
  144. at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */
  145. at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */
  146. at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */
  147. at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */
  148. at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */
  149. #endif
  150. }
  151. #endif
  152. #ifdef CONFIG_USB_OHCI_NEW
  153. void at91_uhp_hw_init(void)
  154. {
  155. /* Enable VBus on UHP ports */
  156. at91_set_pio_output(AT91_PIO_PORTA, 21, 0);
  157. at91_set_pio_output(AT91_PIO_PORTA, 24, 0);
  158. }
  159. #endif
  160. #ifdef CONFIG_AT91_CAN
  161. void at91_can_hw_init(void)
  162. {
  163. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  164. at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
  165. at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
  166. /* Enable clock */
  167. writel(1 << ATMEL_ID_CAN, &pmc->pcer);
  168. }
  169. #endif