phy.h 15 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <dm.h>
  11. #include <linux/errno.h>
  12. #include <linux/list.h>
  13. #include <linux/mii.h>
  14. #include <linux/ethtool.h>
  15. #include <linux/mdio.h>
  16. #include <log.h>
  17. #include <phy_interface.h>
  18. #define PHY_FIXED_ID 0xa5a55a5a
  19. #define PHY_NCSI_ID 0xbeefcafe
  20. /*
  21. * There is no actual id for this.
  22. * This is just a dummy id for gmii2rgmmi converter.
  23. */
  24. #define PHY_GMII2RGMII_ID 0x5a5a5a5a
  25. #define PHY_MAX_ADDR 32
  26. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  27. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  28. SUPPORTED_TP | \
  29. SUPPORTED_MII)
  30. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  31. SUPPORTED_10baseT_Full)
  32. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  33. SUPPORTED_100baseT_Full)
  34. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  35. SUPPORTED_1000baseT_Full)
  36. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  37. PHY_100BT_FEATURES | \
  38. PHY_DEFAULT_FEATURES)
  39. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  40. PHY_1000BT_FEATURES)
  41. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  42. SUPPORTED_10000baseT_Full)
  43. #ifndef PHY_ANEG_TIMEOUT
  44. #define PHY_ANEG_TIMEOUT 4000
  45. #endif
  46. struct phy_device;
  47. #define MDIO_NAME_LEN 32
  48. struct mii_dev {
  49. struct list_head link;
  50. char name[MDIO_NAME_LEN];
  51. void *priv;
  52. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  53. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  54. u16 val);
  55. int (*reset)(struct mii_dev *bus);
  56. struct phy_device *phymap[PHY_MAX_ADDR];
  57. u32 phy_mask;
  58. };
  59. /* struct phy_driver: a structure which defines PHY behavior
  60. *
  61. * uid will contain a number which represents the PHY. During
  62. * startup, the driver will poll the PHY to find out what its
  63. * UID--as defined by registers 2 and 3--is. The 32-bit result
  64. * gotten from the PHY will be masked to
  65. * discard any bits which may change based on revision numbers
  66. * unimportant to functionality
  67. *
  68. */
  69. struct phy_driver {
  70. char *name;
  71. unsigned int uid;
  72. unsigned int mask;
  73. unsigned int mmds;
  74. u32 features;
  75. /* Called to do any driver startup necessities */
  76. /* Will be called during phy_connect */
  77. int (*probe)(struct phy_device *phydev);
  78. /* Called to configure the PHY, and modify the controller
  79. * based on the results. Should be called after phy_connect */
  80. int (*config)(struct phy_device *phydev);
  81. /* Called when starting up the controller */
  82. int (*startup)(struct phy_device *phydev);
  83. /* Called when bringing down the controller */
  84. int (*shutdown)(struct phy_device *phydev);
  85. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  86. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  87. u16 val);
  88. /* Phy specific driver override for reading a MMD register */
  89. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  90. /* Phy specific driver override for writing a MMD register */
  91. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  92. u16 val);
  93. struct list_head list;
  94. /* driver private data */
  95. ulong data;
  96. };
  97. struct phy_device {
  98. /* Information about the PHY type */
  99. /* And management functions */
  100. struct mii_dev *bus;
  101. struct phy_driver *drv;
  102. void *priv;
  103. #ifdef CONFIG_DM_ETH
  104. struct udevice *dev;
  105. ofnode node;
  106. #else
  107. struct eth_device *dev;
  108. #endif
  109. /* forced speed & duplex (no autoneg)
  110. * partner speed & duplex & pause (autoneg)
  111. */
  112. int speed;
  113. int duplex;
  114. /* The most recently read link state */
  115. int link;
  116. int port;
  117. phy_interface_t interface;
  118. u32 advertising;
  119. u32 supported;
  120. u32 mmds;
  121. int autoneg;
  122. int addr;
  123. int pause;
  124. int asym_pause;
  125. u32 phy_id;
  126. bool is_c45;
  127. u32 flags;
  128. };
  129. struct fixed_link {
  130. int phy_id;
  131. int duplex;
  132. int link_speed;
  133. int pause;
  134. int asym_pause;
  135. };
  136. /**
  137. * phy_read - Convenience function for reading a given PHY register
  138. * @phydev: the phy_device struct
  139. * @devad: The MMD to read from
  140. * @regnum: register number to read
  141. * @return: value for success or negative errno for failure
  142. */
  143. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  144. {
  145. struct mii_dev *bus = phydev->bus;
  146. if (!bus || !bus->read) {
  147. debug("%s: No bus configured\n", __func__);
  148. return -1;
  149. }
  150. return bus->read(bus, phydev->addr, devad, regnum);
  151. }
  152. /**
  153. * phy_write - Convenience function for writing a given PHY register
  154. * @phydev: the phy_device struct
  155. * @devad: The MMD to read from
  156. * @regnum: register number to write
  157. * @val: value to write to @regnum
  158. * @return: 0 for success or negative errno for failure
  159. */
  160. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  161. u16 val)
  162. {
  163. struct mii_dev *bus = phydev->bus;
  164. if (!bus || !bus->read) {
  165. debug("%s: No bus configured\n", __func__);
  166. return -1;
  167. }
  168. return bus->write(bus, phydev->addr, devad, regnum, val);
  169. }
  170. /**
  171. * phy_mmd_start_indirect - Convenience function for writing MMD registers
  172. * @phydev: the phy_device struct
  173. * @devad: The MMD to read from
  174. * @regnum: register number to write
  175. * @return: None
  176. */
  177. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  178. int regnum)
  179. {
  180. /* Write the desired MMD Devad */
  181. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  182. /* Write the desired MMD register address */
  183. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  184. /* Select the Function : DATA with no post increment */
  185. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  186. (devad | MII_MMD_CTRL_NOINCR));
  187. }
  188. /**
  189. * phy_read_mmd - Convenience function for reading a register
  190. * from an MMD on a given PHY.
  191. * @phydev: The phy_device struct
  192. * @devad: The MMD to read from
  193. * @regnum: The register on the MMD to read
  194. * @return: Value for success or negative errno for failure
  195. */
  196. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  197. int regnum)
  198. {
  199. struct phy_driver *drv = phydev->drv;
  200. if (regnum > (u16)~0 || devad > 32)
  201. return -EINVAL;
  202. /* driver-specific access */
  203. if (drv->read_mmd)
  204. return drv->read_mmd(phydev, devad, regnum);
  205. /* direct C45 / C22 access */
  206. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  207. devad == MDIO_DEVAD_NONE || !devad)
  208. return phy_read(phydev, devad, regnum);
  209. /* indirect C22 access */
  210. phy_mmd_start_indirect(phydev, devad, regnum);
  211. /* Read the content of the MMD's selected register */
  212. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  213. }
  214. /**
  215. * phy_write_mmd - Convenience function for writing a register
  216. * on an MMD on a given PHY.
  217. * @phydev: The phy_device struct
  218. * @devad: The MMD to read from
  219. * @regnum: The register on the MMD to read
  220. * @val: value to write to @regnum
  221. * @return: 0 for success or negative errno for failure
  222. */
  223. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  224. int regnum, u16 val)
  225. {
  226. struct phy_driver *drv = phydev->drv;
  227. if (regnum > (u16)~0 || devad > 32)
  228. return -EINVAL;
  229. /* driver-specific access */
  230. if (drv->write_mmd)
  231. return drv->write_mmd(phydev, devad, regnum, val);
  232. /* direct C45 / C22 access */
  233. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  234. devad == MDIO_DEVAD_NONE || !devad)
  235. return phy_write(phydev, devad, regnum, val);
  236. /* indirect C22 access */
  237. phy_mmd_start_indirect(phydev, devad, regnum);
  238. /* Write the data into MMD's selected register */
  239. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  240. }
  241. /**
  242. * phy_set_bits_mmd - Convenience function for setting bits in a register
  243. * on MMD
  244. * @phydev: the phy_device struct
  245. * @devad: the MMD containing register to modify
  246. * @regnum: register number to modify
  247. * @val: bits to set
  248. * @return: 0 for success or negative errno for failure
  249. */
  250. static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
  251. u32 regnum, u16 val)
  252. {
  253. int value, ret;
  254. value = phy_read_mmd(phydev, devad, regnum);
  255. if (value < 0)
  256. return value;
  257. value |= val;
  258. ret = phy_write_mmd(phydev, devad, regnum, value);
  259. if (ret < 0)
  260. return ret;
  261. return 0;
  262. }
  263. /**
  264. * phy_clear_bits_mmd - Convenience function for clearing bits in a register
  265. * on MMD
  266. * @phydev: the phy_device struct
  267. * @devad: the MMD containing register to modify
  268. * @regnum: register number to modify
  269. * @val: bits to clear
  270. * @return: 0 for success or negative errno for failure
  271. */
  272. static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
  273. u32 regnum, u16 val)
  274. {
  275. int value, ret;
  276. value = phy_read_mmd(phydev, devad, regnum);
  277. if (value < 0)
  278. return value;
  279. value &= ~val;
  280. ret = phy_write_mmd(phydev, devad, regnum, value);
  281. if (ret < 0)
  282. return ret;
  283. return 0;
  284. }
  285. #ifdef CONFIG_PHYLIB_10G
  286. extern struct phy_driver gen10g_driver;
  287. /*
  288. * List all 10G interfaces here, the assumption being that PHYs on these
  289. * interfaces are C45
  290. */
  291. static inline int is_10g_interface(phy_interface_t interface)
  292. {
  293. return interface == PHY_INTERFACE_MODE_XGMII ||
  294. interface == PHY_INTERFACE_MODE_USXGMII ||
  295. interface == PHY_INTERFACE_MODE_XFI;
  296. }
  297. #endif
  298. /**
  299. * phy_init() - Initializes the PHY drivers
  300. * This function registers all available PHY drivers
  301. *
  302. * @return: 0 if OK, -ve on error
  303. */
  304. int phy_init(void);
  305. /**
  306. * phy_reset() - Resets the specified PHY
  307. * Issues a reset of the PHY and waits for it to complete
  308. *
  309. * @phydev: PHY to reset
  310. * @return: 0 if OK, -ve on error
  311. */
  312. int phy_reset(struct phy_device *phydev);
  313. /**
  314. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  315. * The function checks the PHY addresses flagged in phy_mask and returns a
  316. * phy_device pointer if it detects a PHY.
  317. * This function should only be called if just one PHY is expected to be present
  318. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  319. * it is undefined which of these PHYs is returned.
  320. *
  321. * @bus: MII/MDIO bus to scan
  322. * @phy_mask: bitmap of PYH addresses to scan
  323. * @interface: type of MAC-PHY interface
  324. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  325. */
  326. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  327. phy_interface_t interface);
  328. #ifdef CONFIG_DM_ETH
  329. /**
  330. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  331. * @phydev: PHY device
  332. * @dev: Ethernet device
  333. */
  334. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  335. /**
  336. * phy_connect() - Creates a PHY device for the Ethernet interface
  337. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  338. * already, and associates it with the Ethernet device.
  339. * The function may be called with addr <= 0, in this case addr value is ignored
  340. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  341. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  342. * which PHY is returned.
  343. *
  344. * @bus: MII/MDIO bus that hosts the PHY
  345. * @addr: PHY address on MDIO bus
  346. * @dev: Ethernet device to associate to the PHY
  347. * @interface: type of MAC-PHY interface
  348. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  349. */
  350. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  351. struct udevice *dev,
  352. phy_interface_t interface);
  353. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  354. {
  355. if (ofnode_valid(phydev->node))
  356. return phydev->node;
  357. else
  358. return dev_ofnode(phydev->dev);
  359. }
  360. #else
  361. /**
  362. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  363. * @phydev: PHY device
  364. * @dev: Ethernet device
  365. */
  366. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  367. /**
  368. * phy_connect() - Creates a PHY device for the Ethernet interface
  369. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  370. * already, and associates it with the Ethernet device.
  371. * The function may be called with addr <= 0, in this case addr value is ignored
  372. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  373. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  374. * which PHY is returned.
  375. *
  376. * @bus: MII/MDIO bus that hosts the PHY
  377. * @addr: PHY address on MDIO bus
  378. * @dev: Ethernet device to associate to the PHY
  379. * @interface: type of MAC-PHY interface
  380. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  381. */
  382. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  383. struct eth_device *dev,
  384. phy_interface_t interface);
  385. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  386. {
  387. return ofnode_null();
  388. }
  389. #endif
  390. int phy_startup(struct phy_device *phydev);
  391. int phy_config(struct phy_device *phydev);
  392. int phy_shutdown(struct phy_device *phydev);
  393. int phy_register(struct phy_driver *drv);
  394. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  395. int genphy_config_aneg(struct phy_device *phydev);
  396. int genphy_restart_aneg(struct phy_device *phydev);
  397. int genphy_update_link(struct phy_device *phydev);
  398. int genphy_parse_link(struct phy_device *phydev);
  399. int genphy_config(struct phy_device *phydev);
  400. int genphy_startup(struct phy_device *phydev);
  401. int genphy_shutdown(struct phy_device *phydev);
  402. int gen10g_config(struct phy_device *phydev);
  403. int gen10g_startup(struct phy_device *phydev);
  404. int gen10g_shutdown(struct phy_device *phydev);
  405. int gen10g_discover_mmds(struct phy_device *phydev);
  406. int phy_b53_init(void);
  407. int phy_mv88e61xx_init(void);
  408. int phy_aquantia_init(void);
  409. int phy_atheros_init(void);
  410. int phy_broadcom_init(void);
  411. int phy_cortina_init(void);
  412. int phy_davicom_init(void);
  413. int phy_et1011c_init(void);
  414. int phy_lxt_init(void);
  415. int phy_marvell_init(void);
  416. int phy_micrel_ksz8xxx_init(void);
  417. int phy_micrel_ksz90x1_init(void);
  418. int phy_meson_gxl_init(void);
  419. int phy_natsemi_init(void);
  420. int phy_realtek_init(void);
  421. int phy_smsc_init(void);
  422. int phy_teranetics_init(void);
  423. int phy_ti_init(void);
  424. int phy_vitesse_init(void);
  425. int phy_xilinx_init(void);
  426. int phy_mscc_init(void);
  427. int phy_fixed_init(void);
  428. int phy_ncsi_init(void);
  429. int phy_xilinx_gmii2rgmii_init(void);
  430. int board_phy_config(struct phy_device *phydev);
  431. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  432. /**
  433. * phy_get_interface_by_name() - Look up a PHY interface name
  434. *
  435. * @str: PHY interface name, e.g. "mii"
  436. * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
  437. */
  438. int phy_get_interface_by_name(const char *str);
  439. /**
  440. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  441. * is RGMII (all variants)
  442. * @phydev: the phy_device struct
  443. * @return: true if MII bus is RGMII or false if it is not
  444. */
  445. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  446. {
  447. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  448. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  449. }
  450. /**
  451. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  452. * is SGMII (all variants)
  453. * @phydev: the phy_device struct
  454. * @return: true if MII bus is SGMII or false if it is not
  455. */
  456. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  457. {
  458. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  459. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  460. }
  461. /* PHY UIDs for various PHYs that are referenced in external code */
  462. #define PHY_UID_CS4340 0x13e51002
  463. #define PHY_UID_CS4223 0x03e57003
  464. #define PHY_UID_TN2020 0x00a19410
  465. #define PHY_UID_IN112525_S03 0x02107440
  466. #endif