tam3517-common.h 12 KB

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  1. /*
  2. * Copyright (C) 2011
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  4. *
  5. * Copyright (C) 2009 TechNexion Ltd.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __TAM3517_H
  10. #define __TAM3517_H
  11. /*
  12. * High Level Configuration Options
  13. */
  14. #define CONFIG_OMAP /* in a TI OMAP core */
  15. #define CONFIG_OMAP_GPIO
  16. #define CONFIG_OMAP_COMMON
  17. /* Common ARM Erratas */
  18. #define CONFIG_ARM_ERRATA_454179
  19. #define CONFIG_ARM_ERRATA_430973
  20. #define CONFIG_ARM_ERRATA_621766
  21. #define CONFIG_SYS_TEXT_BASE 0x80008000
  22. #define CONFIG_SYS_CACHELINE_SIZE 64
  23. #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
  24. #include <asm/arch/cpu.h> /* get chip and board defs */
  25. #include <asm/arch/omap.h>
  26. /*
  27. * Display CPU and Board information
  28. */
  29. #define CONFIG_DISPLAY_CPUINFO
  30. #define CONFIG_DISPLAY_BOARDINFO
  31. /* Clock Defines */
  32. #define V_OSCK 26000000 /* Clock output from T2 */
  33. #define V_SCLK (V_OSCK >> 1)
  34. #define CONFIG_MISC_INIT_R
  35. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  36. #define CONFIG_SETUP_MEMORY_TAGS
  37. #define CONFIG_INITRD_TAG
  38. #define CONFIG_REVISION_TAG
  39. /*
  40. * Size of malloc() pool
  41. */
  42. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
  43. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
  44. 2 * 1024 * 1024)
  45. /*
  46. * DDR related
  47. */
  48. #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
  49. #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
  50. /*
  51. * Hardware drivers
  52. */
  53. /*
  54. * NS16550 Configuration
  55. */
  56. #define CONFIG_SYS_NS16550_SERIAL
  57. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  58. #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  59. /*
  60. * select serial console configuration
  61. */
  62. #define CONFIG_CONS_INDEX 1
  63. #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
  64. #define CONFIG_SERIAL1 /* UART1 */
  65. /* allow to overwrite serial and ethaddr */
  66. #define CONFIG_ENV_OVERWRITE
  67. #define CONFIG_BAUDRATE 115200
  68. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  69. 115200}
  70. #define CONFIG_MMC
  71. #define CONFIG_OMAP_HSMMC
  72. #define CONFIG_GENERIC_MMC
  73. #define CONFIG_DOS_PARTITION
  74. /* EHCI */
  75. #define CONFIG_OMAP3_GPIO_5
  76. #define CONFIG_USB_EHCI
  77. #define CONFIG_USB_EHCI_OMAP
  78. #define CONFIG_USB_ULPI
  79. #define CONFIG_USB_ULPI_VIEWPORT_OMAP
  80. #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
  81. #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  82. #define CONFIG_USB_STORAGE
  83. /* commands to include */
  84. #define CONFIG_CMD_CACHE
  85. #define CONFIG_CMD_DHCP
  86. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  87. #define CONFIG_CMD_FAT /* FAT support */
  88. #define CONFIG_CMD_I2C /* I2C serial bus support */
  89. #define CONFIG_CMD_MII
  90. #define CONFIG_CMD_MMC /* MMC support */
  91. #define CONFIG_CMD_NAND /* NAND support */
  92. #define CONFIG_CMD_PING
  93. #define CONFIG_CMD_USB
  94. #define CONFIG_CMD_EEPROM
  95. #define CONFIG_SYS_NO_FLASH
  96. #define CONFIG_SYS_I2C
  97. #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
  98. #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  99. #define CONFIG_SYS_I2C_OMAP34XX
  100. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
  101. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
  102. #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
  103. /*
  104. * Board NAND Info.
  105. */
  106. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  107. /* to access */
  108. /* nand at CS0 */
  109. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
  110. /* NAND devices */
  111. #define CONFIG_AUTO_COMPLETE
  112. /*
  113. * Miscellaneous configurable options
  114. */
  115. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  116. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  117. #define CONFIG_CMDLINE_EDITING
  118. #define CONFIG_AUTO_COMPLETE
  119. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  120. /* Print Buffer Size */
  121. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  122. sizeof(CONFIG_SYS_PROMPT) + 16)
  123. #define CONFIG_SYS_MAXARGS 32 /* max number of command */
  124. /* args */
  125. /* Boot Argument Buffer Size */
  126. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  127. /* memtest works on */
  128. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
  129. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  130. 0x01F00000) /* 31MB */
  131. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
  132. /* address */
  133. /*
  134. * AM3517 has 12 GP timers, they can be driven by the system clock
  135. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  136. * This rate is divided by a local divisor.
  137. */
  138. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  139. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  140. /*
  141. * Physical Memory Map
  142. */
  143. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  144. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  145. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  146. /*
  147. * FLASH and environment organization
  148. */
  149. /* **** PISMO SUPPORT *** */
  150. #define CONFIG_NAND
  151. #define CONFIG_NAND_OMAP_GPMC
  152. #define CONFIG_ENV_IS_IN_NAND
  153. #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
  154. /* Redundant Environment */
  155. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  156. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  157. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  158. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
  159. 2 * CONFIG_SYS_ENV_SECT_SIZE)
  160. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  161. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  162. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  163. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  164. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  165. CONFIG_SYS_INIT_RAM_SIZE - \
  166. GENERATED_GBL_DATA_SIZE)
  167. /*
  168. * ethernet support, EMAC
  169. *
  170. */
  171. #define CONFIG_DRIVER_TI_EMAC
  172. #define CONFIG_DRIVER_TI_EMAC_USE_RMII
  173. #define CONFIG_MII
  174. #define CONFIG_EMAC_MDIO_PHY_NUM 0
  175. #define CONFIG_BOOTP_DNS
  176. #define CONFIG_BOOTP_DNS2
  177. #define CONFIG_BOOTP_SEND_HOSTNAME
  178. #define CONFIG_NET_RETRY_COUNT 10
  179. /* Defines for SPL */
  180. #define CONFIG_SPL_FRAMEWORK
  181. #define CONFIG_SPL_BOARD_INIT
  182. #define CONFIG_SPL_CONSOLE
  183. #define CONFIG_SPL_NAND_SIMPLE
  184. #define CONFIG_SPL_NAND_SOFTECC
  185. #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
  186. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  187. #define CONFIG_SPL_LIBDISK_SUPPORT
  188. #define CONFIG_SPL_I2C_SUPPORT
  189. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  190. #define CONFIG_SPL_SERIAL_SUPPORT
  191. #define CONFIG_SPL_GPIO_SUPPORT
  192. #define CONFIG_SPL_POWER_SUPPORT
  193. #define CONFIG_SPL_NAND_SUPPORT
  194. #define CONFIG_SPL_NAND_BASE
  195. #define CONFIG_SPL_NAND_DRIVERS
  196. #define CONFIG_SPL_NAND_ECC
  197. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  198. #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
  199. #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
  200. #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
  201. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  202. #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
  203. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  204. /* NAND boot config */
  205. #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
  206. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  207. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  208. #define CONFIG_SYS_NAND_OOBSIZE 64
  209. #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
  210. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  211. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
  212. #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
  213. 48, 49, 50, 51, 52, 53, 54, 55,\
  214. 56, 57, 58, 59, 60, 61, 62, 63}
  215. #define CONFIG_SYS_NAND_ECCSIZE 256
  216. #define CONFIG_SYS_NAND_ECCBYTES 3
  217. #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
  218. #define CONFIG_NAND_OMAP_GPMC_PREFETCH
  219. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  220. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
  221. #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
  222. #define CONFIG_OF_LIBFDT
  223. #define CONFIG_FIT
  224. #define CONFIG_CMD_UBI
  225. #define CONFIG_CMD_UBIFS
  226. #define CONFIG_RBTREE
  227. #define CONFIG_LZO
  228. #define CONFIG_MTD_PARTITIONS
  229. #define CONFIG_MTD_DEVICE
  230. #define CONFIG_CMD_MTDPARTS
  231. /* Setup MTD for NAND on the SOM */
  232. #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
  233. #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
  234. "1m(u-boot),256k(env1)," \
  235. "256k(env2),6m(kernel),-(rootfs)"
  236. #define CONFIG_TAM3517_SETTINGS \
  237. "netdev=eth0\0" \
  238. "nandargs=setenv bootargs root=${nandroot} " \
  239. "rootfstype=${nandrootfstype}\0" \
  240. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  241. "nfsroot=${serverip}:${rootpath}\0" \
  242. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  243. "addip_sta=setenv bootargs ${bootargs} " \
  244. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  245. ":${hostname}:${netdev}:off panic=1\0" \
  246. "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
  247. "addip=if test -n ${ipdyn};then run addip_dyn;" \
  248. "else run addip_sta;fi\0" \
  249. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  250. "addtty=setenv bootargs ${bootargs}" \
  251. " console=ttyO0,${baudrate}\0" \
  252. "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
  253. "loadaddr=82000000\0" \
  254. "kernel_addr_r=82000000\0" \
  255. "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
  256. "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
  257. "flash_self=run ramargs addip addtty addmtd addmisc;" \
  258. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  259. "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
  260. "bootm ${kernel_addr}\0" \
  261. "nandboot=run nandargs addip addtty addmtd addmisc;" \
  262. "nand read ${kernel_addr_r} kernel\0" \
  263. "bootm ${kernel_addr_r}\0" \
  264. "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
  265. "run nfsargs addip addtty addmtd addmisc;" \
  266. "bootm ${kernel_addr_r}\0" \
  267. "net_self=if run net_self_load;then " \
  268. "run ramargs addip addtty addmtd addmisc;" \
  269. "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
  270. "else echo Images not loades;fi\0" \
  271. "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
  272. "load=tftp ${loadaddr} ${u-boot}\0" \
  273. "loadmlo=tftp ${loadaddr} ${mlo}\0" \
  274. "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
  275. "uboot_addr=0x80000\0" \
  276. "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
  277. "nand write ${loadaddr} ${uboot_addr} 80000\0" \
  278. "updatemlo=nandecc hw;nand erase 0 20000;" \
  279. "nand write ${loadaddr} 0 20000\0" \
  280. "upd=if run load;then echo Updating u-boot;if run update;" \
  281. "then echo U-Boot updated;" \
  282. "else echo Error updating u-boot !;" \
  283. "echo Board without bootloader !!;" \
  284. "fi;" \
  285. "else echo U-Boot not downloaded..exiting;fi\0" \
  286. /*
  287. * this is common code for all TAM3517 boards.
  288. * MAC address is stored from manufacturer in
  289. * I2C EEPROM
  290. */
  291. #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
  292. /*
  293. * The I2C EEPROM on the TAM3517 contains
  294. * mac address and production data
  295. */
  296. struct tam3517_module_info {
  297. char customer[48];
  298. char product[48];
  299. /*
  300. * bit 0~47 : sequence number
  301. * bit 48~55 : week of year, from 0.
  302. * bit 56~63 : year
  303. */
  304. unsigned long long sequence_number;
  305. /*
  306. * bit 0~7 : revision fixed
  307. * bit 8~15 : revision major
  308. * bit 16~31 : TNxxx
  309. */
  310. unsigned int revision;
  311. unsigned char eth_addr[4][8];
  312. unsigned char _rev[100];
  313. };
  314. #define TAM3517_READ_EEPROM(info, ret) \
  315. do { \
  316. i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
  317. if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
  318. (void *)info, sizeof(*info))) \
  319. ret = 1; \
  320. else \
  321. ret = 0; \
  322. } while (0)
  323. #define TAM3517_READ_MAC_FROM_EEPROM(info) \
  324. do { \
  325. char buf[80], ethname[20]; \
  326. int i; \
  327. memset(buf, 0, sizeof(buf)); \
  328. for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
  329. sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
  330. (info)->eth_addr[i][5], \
  331. (info)->eth_addr[i][4], \
  332. (info)->eth_addr[i][3], \
  333. (info)->eth_addr[i][2], \
  334. (info)->eth_addr[i][1], \
  335. (info)->eth_addr[i][0]); \
  336. \
  337. if (i) \
  338. sprintf(ethname, "eth%daddr", i); \
  339. else \
  340. strcpy(ethname, "ethaddr"); \
  341. printf("Setting %s from EEPROM with %s\n", ethname, buf);\
  342. setenv(ethname, buf); \
  343. } \
  344. } while (0)
  345. /* The following macros are taken from Technexion's documentation */
  346. #define TAM3517_sequence_number(info) \
  347. ((info)->sequence_number % 0x1000000000000LL)
  348. #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
  349. #define TAM3517_year(info) ((info)->sequence_number >> 56)
  350. #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
  351. #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
  352. #define TAM3517_revision_tn(info) ((info)->revision >> 16)
  353. #define TAM3517_PRINT_SOM_INFO(info) \
  354. do { \
  355. printf("Vendor:%s\n", (info)->customer); \
  356. printf("SOM: %s\n", (info)->product); \
  357. printf("SeqNr: %02llu%02llu%012llu\n", \
  358. TAM3517_year(info), \
  359. TAM3517_week_of_year(info), \
  360. TAM3517_sequence_number(info)); \
  361. printf("Rev: TN%u %u.%u\n", \
  362. TAM3517_revision_tn(info), \
  363. TAM3517_revision_major(info), \
  364. TAM3517_revision_fixed(info)); \
  365. } while (0)
  366. #endif
  367. #endif /* __TAM3517_H */