eth.c 4.1 KB

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  1. /*
  2. * Copyright 2014 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * This file handles the board muxing between the RGMII/SGMII PHYs on
  7. * Freescale LS1021AQDS board. The RGMII PHYs are the three on-board 1Gb
  8. * ports. The SGMII PHYs are provided by the standard Freescale four-port
  9. * SGMII riser card.
  10. *
  11. * Muxing is handled via the PIXIS BRDCFG4 register. The EMI1 bits control
  12. * muxing among the RGMII PHYs and the SGMII PHYs. The value for RGMII depends
  13. * on which port is used. The value for SGMII depends on which slot the riser
  14. * is inserted in.
  15. */
  16. #include <common.h>
  17. #include <netdev.h>
  18. #include <asm/arch/fsl_serdes.h>
  19. #include <fsl_mdio.h>
  20. #include <tsec.h>
  21. #include <malloc.h>
  22. #include "../common/sgmii_riser.h"
  23. #include "../common/qixis.h"
  24. #define EMI1_MASK 0x1f
  25. #define EMI1_RGMII0 1
  26. #define EMI1_RGMII1 2
  27. #define EMI1_RGMII2 3
  28. #define EMI1_SGMII1 0x1c
  29. #define EMI1_SGMII2 0x1d
  30. struct ls1021a_mdio {
  31. struct mii_dev *realbus;
  32. };
  33. static void ls1021a_mux_mdio(int addr)
  34. {
  35. u8 brdcfg4;
  36. brdcfg4 = QIXIS_READ(brdcfg[4]);
  37. brdcfg4 &= EMI1_MASK;
  38. switch (addr) {
  39. case EMI1_RGMII0:
  40. brdcfg4 |= 0;
  41. break;
  42. case EMI1_RGMII1:
  43. brdcfg4 |= 0x20;
  44. break;
  45. case EMI1_RGMII2:
  46. brdcfg4 |= 0x40;
  47. break;
  48. case EMI1_SGMII1:
  49. brdcfg4 |= 0x60;
  50. break;
  51. case EMI1_SGMII2:
  52. brdcfg4 |= 0x80;
  53. break;
  54. default:
  55. brdcfg4 |= 0xa0;
  56. break;
  57. }
  58. QIXIS_WRITE(brdcfg[4], brdcfg4);
  59. }
  60. static int ls1021a_mdio_read(struct mii_dev *bus, int addr, int devad,
  61. int regnum)
  62. {
  63. struct ls1021a_mdio *priv = bus->priv;
  64. ls1021a_mux_mdio(addr);
  65. return priv->realbus->read(priv->realbus, addr, devad, regnum);
  66. }
  67. static int ls1021a_mdio_write(struct mii_dev *bus, int addr, int devad,
  68. int regnum, u16 value)
  69. {
  70. struct ls1021a_mdio *priv = bus->priv;
  71. ls1021a_mux_mdio(addr);
  72. return priv->realbus->write(priv->realbus, addr, devad, regnum, value);
  73. }
  74. static int ls1021a_mdio_reset(struct mii_dev *bus)
  75. {
  76. struct ls1021a_mdio *priv = bus->priv;
  77. return priv->realbus->reset(priv->realbus);
  78. }
  79. static int ls1021a_mdio_init(char *realbusname, char *fakebusname)
  80. {
  81. struct ls1021a_mdio *lsmdio;
  82. struct mii_dev *bus = mdio_alloc();
  83. if (!bus) {
  84. printf("Failed to allocate LS102xA MDIO bus\n");
  85. return -1;
  86. }
  87. lsmdio = malloc(sizeof(*lsmdio));
  88. if (!lsmdio) {
  89. printf("Failed to allocate LS102xA private data\n");
  90. free(bus);
  91. return -1;
  92. }
  93. bus->read = ls1021a_mdio_read;
  94. bus->write = ls1021a_mdio_write;
  95. bus->reset = ls1021a_mdio_reset;
  96. strcpy(bus->name, fakebusname);
  97. lsmdio->realbus = miiphy_get_dev_by_name(realbusname);
  98. if (!lsmdio->realbus) {
  99. printf("No bus with name %s\n", realbusname);
  100. free(bus);
  101. free(lsmdio);
  102. return -1;
  103. }
  104. bus->priv = lsmdio;
  105. return mdio_register(bus);
  106. }
  107. int board_eth_init(bd_t *bis)
  108. {
  109. struct fsl_pq_mdio_info mdio_info;
  110. struct tsec_info_struct tsec_info[3];
  111. int num = 0;
  112. #ifdef CONFIG_TSEC1
  113. SET_STD_TSEC_INFO(tsec_info[num], 1);
  114. if (is_serdes_configured(SGMII_TSEC1)) {
  115. puts("eTSEC1 is in sgmii mode\n");
  116. tsec_info[num].flags |= TSEC_SGMII;
  117. tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO";
  118. } else {
  119. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  120. }
  121. num++;
  122. #endif
  123. #ifdef CONFIG_TSEC2
  124. SET_STD_TSEC_INFO(tsec_info[num], 2);
  125. if (is_serdes_configured(SGMII_TSEC2)) {
  126. puts("eTSEC2 is in sgmii mode\n");
  127. tsec_info[num].flags |= TSEC_SGMII;
  128. tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO";
  129. } else {
  130. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  131. }
  132. num++;
  133. #endif
  134. #ifdef CONFIG_TSEC3
  135. SET_STD_TSEC_INFO(tsec_info[num], 3);
  136. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  137. num++;
  138. #endif
  139. if (!num) {
  140. printf("No TSECs initialized\n");
  141. return 0;
  142. }
  143. #ifdef CONFIG_FSL_SGMII_RISER
  144. fsl_sgmii_riser_init(tsec_info, num);
  145. #endif
  146. mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
  147. mdio_info.name = DEFAULT_MII_NAME;
  148. fsl_pq_mdio_init(bis, &mdio_info);
  149. /* Register the virtual MDIO front-ends */
  150. ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_RGMII_MDIO");
  151. ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_SGMII_MDIO");
  152. tsec_eth_init(bis, tsec_info, num);
  153. return pci_eth_init(bis);
  154. }