pll.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  4. */
  5. #ifndef K210_PLL_H
  6. #define K210_PLL_H
  7. #include <clk.h>
  8. #include <test/export.h>
  9. #include <asm/io.h>
  10. #define K210_PLL_CLKR GENMASK(3, 0)
  11. #define K210_PLL_CLKF GENMASK(9, 4)
  12. #define K210_PLL_CLKOD GENMASK(13, 10) /* Output Divider */
  13. #define K210_PLL_BWADJ GENMASK(19, 14) /* BandWidth Adjust */
  14. #define K210_PLL_RESET BIT(20)
  15. #define K210_PLL_PWRD BIT(21) /* PoWeReD */
  16. #define K210_PLL_INTFB BIT(22) /* Internal FeedBack */
  17. #define K210_PLL_BYPASS BIT(23)
  18. #define K210_PLL_TEST BIT(24)
  19. #define K210_PLL_EN BIT(25)
  20. #define K210_PLL_TEST_EN BIT(26)
  21. #define K210_PLL_LOCK 0
  22. #define K210_PLL_CLEAR_SLIP 2
  23. #define K210_PLL_TEST_OUT 3
  24. struct k210_pll {
  25. struct clk clk;
  26. void __iomem *reg; /* Base PLL register */
  27. void __iomem *lock; /* Common PLL lock register */
  28. u8 shift; /* Offset of bits in lock register */
  29. u8 width; /* Width of lock bits to test against */
  30. };
  31. #define to_k210_pll(_clk) container_of(_clk, struct k210_pll, clk)
  32. struct k210_pll_config {
  33. u8 r;
  34. u8 f;
  35. u8 od;
  36. };
  37. #ifdef CONFIG_UNIT_TEST
  38. TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in,
  39. struct k210_pll_config *best);
  40. #ifndef nop
  41. #define nop()
  42. #endif
  43. #endif
  44. extern const struct clk_ops k210_pll_ops;
  45. struct clk *k210_register_pll_struct(const char *name, const char *parent_name,
  46. struct k210_pll *pll);
  47. struct clk *k210_register_pll(const char *name, const char *parent_name,
  48. void __iomem *reg, void __iomem *lock, u8 shift,
  49. u8 width);
  50. #endif /* K210_PLL_H */