clk-uclass.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Google, Inc
  4. * Written by Simon Glass <sjg@chromium.org>
  5. * Copyright (c) 2016, NVIDIA CORPORATION.
  6. * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <clk-uclass.h>
  11. #include <dm.h>
  12. #include <dt-structs.h>
  13. #include <errno.h>
  14. #include <log.h>
  15. #include <malloc.h>
  16. #include <dm/devres.h>
  17. #include <dm/read.h>
  18. #include <linux/bug.h>
  19. #include <linux/clk-provider.h>
  20. #include <linux/err.h>
  21. static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  22. {
  23. return (const struct clk_ops *)dev->driver->ops;
  24. }
  25. struct clk *dev_get_clk_ptr(struct udevice *dev)
  26. {
  27. return (struct clk *)dev_get_uclass_priv(dev);
  28. }
  29. #if CONFIG_IS_ENABLED(OF_CONTROL)
  30. # if CONFIG_IS_ENABLED(OF_PLATDATA)
  31. int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
  32. struct clk *clk)
  33. {
  34. int ret;
  35. ret = device_get_by_driver_info((struct driver_info *)cells->node,
  36. &clk->dev);
  37. if (ret)
  38. return ret;
  39. clk->id = cells->arg[0];
  40. return 0;
  41. }
  42. # else
  43. static int clk_of_xlate_default(struct clk *clk,
  44. struct ofnode_phandle_args *args)
  45. {
  46. debug("%s(clk=%p)\n", __func__, clk);
  47. if (args->args_count > 1) {
  48. debug("Invaild args_count: %d\n", args->args_count);
  49. return -EINVAL;
  50. }
  51. if (args->args_count)
  52. clk->id = args->args[0];
  53. else
  54. clk->id = 0;
  55. clk->data = 0;
  56. return 0;
  57. }
  58. static int clk_get_by_index_tail(int ret, ofnode node,
  59. struct ofnode_phandle_args *args,
  60. const char *list_name, int index,
  61. struct clk *clk)
  62. {
  63. struct udevice *dev_clk;
  64. const struct clk_ops *ops;
  65. assert(clk);
  66. clk->dev = NULL;
  67. if (ret)
  68. goto err;
  69. ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  70. if (ret) {
  71. debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  72. __func__, ret);
  73. return ret;
  74. }
  75. clk->dev = dev_clk;
  76. ops = clk_dev_ops(dev_clk);
  77. if (ops->of_xlate)
  78. ret = ops->of_xlate(clk, args);
  79. else
  80. ret = clk_of_xlate_default(clk, args);
  81. if (ret) {
  82. debug("of_xlate() failed: %d\n", ret);
  83. return ret;
  84. }
  85. return clk_request(dev_clk, clk);
  86. err:
  87. debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
  88. __func__, ofnode_get_name(node), list_name, index, ret);
  89. return ret;
  90. }
  91. static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
  92. int index, struct clk *clk)
  93. {
  94. int ret;
  95. struct ofnode_phandle_args args;
  96. debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
  97. assert(clk);
  98. clk->dev = NULL;
  99. ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
  100. index, &args);
  101. if (ret) {
  102. debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
  103. __func__, ret);
  104. return ret;
  105. }
  106. return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
  107. index, clk);
  108. }
  109. int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
  110. {
  111. struct ofnode_phandle_args args;
  112. int ret;
  113. ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
  114. index, &args);
  115. return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
  116. index, clk);
  117. }
  118. int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
  119. {
  120. struct ofnode_phandle_args args;
  121. int ret;
  122. ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
  123. index, &args);
  124. return clk_get_by_index_tail(ret, node, &args, "clocks",
  125. index, clk);
  126. }
  127. int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
  128. {
  129. int i, ret, err, count;
  130. bulk->count = 0;
  131. count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
  132. if (count < 1)
  133. return count;
  134. bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
  135. if (!bulk->clks)
  136. return -ENOMEM;
  137. for (i = 0; i < count; i++) {
  138. ret = clk_get_by_index(dev, i, &bulk->clks[i]);
  139. if (ret < 0)
  140. goto bulk_get_err;
  141. ++bulk->count;
  142. }
  143. return 0;
  144. bulk_get_err:
  145. err = clk_release_all(bulk->clks, bulk->count);
  146. if (err)
  147. debug("%s: could release all clocks for %p\n",
  148. __func__, dev);
  149. return ret;
  150. }
  151. static int clk_set_default_parents(struct udevice *dev, int stage)
  152. {
  153. struct clk clk, parent_clk;
  154. int index;
  155. int num_parents;
  156. int ret;
  157. num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
  158. "#clock-cells");
  159. if (num_parents < 0) {
  160. debug("%s: could not read assigned-clock-parents for %p\n",
  161. __func__, dev);
  162. return 0;
  163. }
  164. for (index = 0; index < num_parents; index++) {
  165. ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
  166. index, &parent_clk);
  167. /* If -ENOENT, this is a no-op entry */
  168. if (ret == -ENOENT)
  169. continue;
  170. if (ret) {
  171. debug("%s: could not get parent clock %d for %s\n",
  172. __func__, index, dev_read_name(dev));
  173. return ret;
  174. }
  175. ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
  176. index, &clk);
  177. if (ret) {
  178. debug("%s: could not get assigned clock %d for %s\n",
  179. __func__, index, dev_read_name(dev));
  180. return ret;
  181. }
  182. /* This is clk provider device trying to reparent itself
  183. * It cannot be done right now but need to wait after the
  184. * device is probed
  185. */
  186. if (stage == 0 && clk.dev == dev)
  187. continue;
  188. if (stage > 0 && clk.dev != dev)
  189. /* do not setup twice the parent clocks */
  190. continue;
  191. ret = clk_set_parent(&clk, &parent_clk);
  192. /*
  193. * Not all drivers may support clock-reparenting (as of now).
  194. * Ignore errors due to this.
  195. */
  196. if (ret == -ENOSYS)
  197. continue;
  198. if (ret < 0) {
  199. debug("%s: failed to reparent clock %d for %s\n",
  200. __func__, index, dev_read_name(dev));
  201. return ret;
  202. }
  203. }
  204. return 0;
  205. }
  206. static int clk_set_default_rates(struct udevice *dev, int stage)
  207. {
  208. struct clk clk;
  209. int index;
  210. int num_rates;
  211. int size;
  212. int ret = 0;
  213. u32 *rates = NULL;
  214. size = dev_read_size(dev, "assigned-clock-rates");
  215. if (size < 0)
  216. return 0;
  217. num_rates = size / sizeof(u32);
  218. rates = calloc(num_rates, sizeof(u32));
  219. if (!rates)
  220. return -ENOMEM;
  221. ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
  222. if (ret)
  223. goto fail;
  224. for (index = 0; index < num_rates; index++) {
  225. /* If 0 is passed, this is a no-op */
  226. if (!rates[index])
  227. continue;
  228. ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
  229. index, &clk);
  230. if (ret) {
  231. debug("%s: could not get assigned clock %d for %s\n",
  232. __func__, index, dev_read_name(dev));
  233. continue;
  234. }
  235. /* This is clk provider device trying to program itself
  236. * It cannot be done right now but need to wait after the
  237. * device is probed
  238. */
  239. if (stage == 0 && clk.dev == dev)
  240. continue;
  241. if (stage > 0 && clk.dev != dev)
  242. /* do not setup twice the parent clocks */
  243. continue;
  244. ret = clk_set_rate(&clk, rates[index]);
  245. if (ret < 0) {
  246. debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
  247. __func__, index, clk.id, dev_read_name(dev));
  248. break;
  249. }
  250. }
  251. fail:
  252. free(rates);
  253. return ret;
  254. }
  255. int clk_set_defaults(struct udevice *dev, int stage)
  256. {
  257. int ret;
  258. if (!dev_of_valid(dev))
  259. return 0;
  260. /* If this not in SPL and pre-reloc state, don't take any action. */
  261. if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
  262. return 0;
  263. debug("%s(%s)\n", __func__, dev_read_name(dev));
  264. ret = clk_set_default_parents(dev, stage);
  265. if (ret)
  266. return ret;
  267. ret = clk_set_default_rates(dev, stage);
  268. if (ret < 0)
  269. return ret;
  270. return 0;
  271. }
  272. int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
  273. {
  274. int index;
  275. debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
  276. clk->dev = NULL;
  277. index = dev_read_stringlist_search(dev, "clock-names", name);
  278. if (index < 0) {
  279. debug("fdt_stringlist_search() failed: %d\n", index);
  280. return index;
  281. }
  282. return clk_get_by_index(dev, index, clk);
  283. }
  284. # endif /* OF_PLATDATA */
  285. int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
  286. {
  287. int index;
  288. debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
  289. ofnode_get_name(node), name, clk);
  290. clk->dev = NULL;
  291. index = ofnode_stringlist_search(node, "clock-names", name);
  292. if (index < 0) {
  293. debug("fdt_stringlist_search() failed: %d\n", index);
  294. return index;
  295. }
  296. return clk_get_by_index_nodev(node, index, clk);
  297. }
  298. int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
  299. {
  300. int ret;
  301. ret = clk_get_by_name_nodev(node, name, clk);
  302. if (ret == -ENODATA)
  303. return 0;
  304. return ret;
  305. }
  306. int clk_release_all(struct clk *clk, int count)
  307. {
  308. int i, ret;
  309. for (i = 0; i < count; i++) {
  310. debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
  311. /* check if clock has been previously requested */
  312. if (!clk[i].dev)
  313. continue;
  314. ret = clk_disable(&clk[i]);
  315. if (ret && ret != -ENOSYS)
  316. return ret;
  317. ret = clk_free(&clk[i]);
  318. if (ret && ret != -ENOSYS)
  319. return ret;
  320. }
  321. return 0;
  322. }
  323. #endif /* OF_CONTROL */
  324. int clk_request(struct udevice *dev, struct clk *clk)
  325. {
  326. const struct clk_ops *ops;
  327. debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
  328. if (!clk)
  329. return 0;
  330. ops = clk_dev_ops(dev);
  331. clk->dev = dev;
  332. if (!ops->request)
  333. return 0;
  334. return ops->request(clk);
  335. }
  336. int clk_free(struct clk *clk)
  337. {
  338. const struct clk_ops *ops;
  339. debug("%s(clk=%p)\n", __func__, clk);
  340. if (!clk_valid(clk))
  341. return 0;
  342. ops = clk_dev_ops(clk->dev);
  343. if (!ops->rfree)
  344. return 0;
  345. return ops->rfree(clk);
  346. }
  347. ulong clk_get_rate(struct clk *clk)
  348. {
  349. const struct clk_ops *ops;
  350. debug("%s(clk=%p)\n", __func__, clk);
  351. if (!clk_valid(clk))
  352. return 0;
  353. ops = clk_dev_ops(clk->dev);
  354. if (!ops->get_rate)
  355. return -ENOSYS;
  356. return ops->get_rate(clk);
  357. }
  358. struct clk *clk_get_parent(struct clk *clk)
  359. {
  360. struct udevice *pdev;
  361. struct clk *pclk;
  362. debug("%s(clk=%p)\n", __func__, clk);
  363. if (!clk_valid(clk))
  364. return NULL;
  365. pdev = dev_get_parent(clk->dev);
  366. pclk = dev_get_clk_ptr(pdev);
  367. if (!pclk)
  368. return ERR_PTR(-ENODEV);
  369. return pclk;
  370. }
  371. long long clk_get_parent_rate(struct clk *clk)
  372. {
  373. const struct clk_ops *ops;
  374. struct clk *pclk;
  375. debug("%s(clk=%p)\n", __func__, clk);
  376. if (!clk_valid(clk))
  377. return 0;
  378. pclk = clk_get_parent(clk);
  379. if (IS_ERR(pclk))
  380. return -ENODEV;
  381. ops = clk_dev_ops(pclk->dev);
  382. if (!ops->get_rate)
  383. return -ENOSYS;
  384. /* Read the 'rate' if not already set or if proper flag set*/
  385. if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
  386. pclk->rate = clk_get_rate(pclk);
  387. return pclk->rate;
  388. }
  389. ulong clk_set_rate(struct clk *clk, ulong rate)
  390. {
  391. const struct clk_ops *ops;
  392. debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
  393. if (!clk_valid(clk))
  394. return 0;
  395. ops = clk_dev_ops(clk->dev);
  396. if (!ops->set_rate)
  397. return -ENOSYS;
  398. return ops->set_rate(clk, rate);
  399. }
  400. int clk_set_parent(struct clk *clk, struct clk *parent)
  401. {
  402. const struct clk_ops *ops;
  403. debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
  404. if (!clk_valid(clk))
  405. return 0;
  406. ops = clk_dev_ops(clk->dev);
  407. if (!ops->set_parent)
  408. return -ENOSYS;
  409. return ops->set_parent(clk, parent);
  410. }
  411. int clk_enable(struct clk *clk)
  412. {
  413. const struct clk_ops *ops;
  414. struct clk *clkp = NULL;
  415. int ret;
  416. debug("%s(clk=%p)\n", __func__, clk);
  417. if (!clk_valid(clk))
  418. return 0;
  419. ops = clk_dev_ops(clk->dev);
  420. if (CONFIG_IS_ENABLED(CLK_CCF)) {
  421. /* Take id 0 as a non-valid clk, such as dummy */
  422. if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
  423. if (clkp->enable_count) {
  424. clkp->enable_count++;
  425. return 0;
  426. }
  427. if (clkp->dev->parent &&
  428. device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
  429. ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
  430. if (ret) {
  431. printf("Enable %s failed\n",
  432. clkp->dev->parent->name);
  433. return ret;
  434. }
  435. }
  436. }
  437. if (ops->enable) {
  438. ret = ops->enable(clk);
  439. if (ret) {
  440. printf("Enable %s failed\n", clk->dev->name);
  441. return ret;
  442. }
  443. }
  444. if (clkp)
  445. clkp->enable_count++;
  446. } else {
  447. if (!ops->enable)
  448. return -ENOSYS;
  449. return ops->enable(clk);
  450. }
  451. return 0;
  452. }
  453. int clk_enable_bulk(struct clk_bulk *bulk)
  454. {
  455. int i, ret;
  456. for (i = 0; i < bulk->count; i++) {
  457. ret = clk_enable(&bulk->clks[i]);
  458. if (ret < 0 && ret != -ENOSYS)
  459. return ret;
  460. }
  461. return 0;
  462. }
  463. int clk_disable(struct clk *clk)
  464. {
  465. const struct clk_ops *ops;
  466. struct clk *clkp = NULL;
  467. int ret;
  468. debug("%s(clk=%p)\n", __func__, clk);
  469. if (!clk_valid(clk))
  470. return 0;
  471. ops = clk_dev_ops(clk->dev);
  472. if (CONFIG_IS_ENABLED(CLK_CCF)) {
  473. if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
  474. if (clkp->enable_count == 0) {
  475. printf("clk %s already disabled\n",
  476. clkp->dev->name);
  477. return 0;
  478. }
  479. if (--clkp->enable_count > 0)
  480. return 0;
  481. }
  482. if (ops->disable) {
  483. ret = ops->disable(clk);
  484. if (ret)
  485. return ret;
  486. }
  487. if (clkp && clkp->dev->parent &&
  488. device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
  489. ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
  490. if (ret) {
  491. printf("Disable %s failed\n",
  492. clkp->dev->parent->name);
  493. return ret;
  494. }
  495. }
  496. } else {
  497. if (!ops->disable)
  498. return -ENOSYS;
  499. return ops->disable(clk);
  500. }
  501. return 0;
  502. }
  503. int clk_disable_bulk(struct clk_bulk *bulk)
  504. {
  505. int i, ret;
  506. for (i = 0; i < bulk->count; i++) {
  507. ret = clk_disable(&bulk->clks[i]);
  508. if (ret < 0 && ret != -ENOSYS)
  509. return ret;
  510. }
  511. return 0;
  512. }
  513. int clk_get_by_id(ulong id, struct clk **clkp)
  514. {
  515. struct udevice *dev;
  516. struct uclass *uc;
  517. int ret;
  518. ret = uclass_get(UCLASS_CLK, &uc);
  519. if (ret)
  520. return ret;
  521. uclass_foreach_dev(dev, uc) {
  522. struct clk *clk = dev_get_clk_ptr(dev);
  523. if (clk && clk->id == id) {
  524. *clkp = clk;
  525. return 0;
  526. }
  527. }
  528. return -ENOENT;
  529. }
  530. bool clk_is_match(const struct clk *p, const struct clk *q)
  531. {
  532. /* trivial case: identical struct clk's or both NULL */
  533. if (p == q)
  534. return true;
  535. /* trivial case #2: on the clk pointer is NULL */
  536. if (!p || !q)
  537. return false;
  538. /* same device, id and data */
  539. if (p->dev == q->dev && p->id == q->id && p->data == q->data)
  540. return true;
  541. return false;
  542. }
  543. static void devm_clk_release(struct udevice *dev, void *res)
  544. {
  545. clk_free(res);
  546. }
  547. static int devm_clk_match(struct udevice *dev, void *res, void *data)
  548. {
  549. return res == data;
  550. }
  551. struct clk *devm_clk_get(struct udevice *dev, const char *id)
  552. {
  553. int rc;
  554. struct clk *clk;
  555. clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
  556. if (unlikely(!clk))
  557. return ERR_PTR(-ENOMEM);
  558. rc = clk_get_by_name(dev, id, clk);
  559. if (rc)
  560. return ERR_PTR(rc);
  561. devres_add(dev, clk);
  562. return clk;
  563. }
  564. struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
  565. {
  566. struct clk *clk = devm_clk_get(dev, id);
  567. if (PTR_ERR(clk) == -ENODATA)
  568. return NULL;
  569. return clk;
  570. }
  571. void devm_clk_put(struct udevice *dev, struct clk *clk)
  572. {
  573. int rc;
  574. if (!clk)
  575. return;
  576. rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
  577. WARN_ON(rc);
  578. }
  579. int clk_uclass_post_probe(struct udevice *dev)
  580. {
  581. /*
  582. * when a clock provider is probed. Call clk_set_defaults()
  583. * also after the device is probed. This takes care of cases
  584. * where the DT is used to setup default parents and rates
  585. * using assigned-clocks
  586. */
  587. clk_set_defaults(dev, 1);
  588. return 0;
  589. }
  590. UCLASS_DRIVER(clk) = {
  591. .id = UCLASS_CLK,
  592. .name = "clk",
  593. .post_probe = clk_uclass_post_probe,
  594. };