pmc.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Atmel Corporation
  4. * Wenyou.Yang <wenyou.yang@atmel.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <log.h>
  10. #include <dm/lists.h>
  11. #include <dm/util.h>
  12. #include "pmc.h"
  13. DECLARE_GLOBAL_DATA_PTR;
  14. static const struct udevice_id at91_pmc_match[] = {
  15. { .compatible = "atmel,at91rm9200-pmc" },
  16. { .compatible = "atmel,at91sam9260-pmc" },
  17. { .compatible = "atmel,at91sam9g45-pmc" },
  18. { .compatible = "atmel,at91sam9n12-pmc" },
  19. { .compatible = "atmel,at91sam9x5-pmc" },
  20. { .compatible = "atmel,sama5d3-pmc" },
  21. { .compatible = "atmel,sama5d2-pmc" },
  22. {}
  23. };
  24. U_BOOT_DRIVER(atmel_at91rm9200_pmc) = {
  25. .name = "atmel_at91rm9200_pmc",
  26. .id = UCLASS_SIMPLE_BUS,
  27. .of_match = at91_pmc_match,
  28. };
  29. U_BOOT_DRIVER_ALIAS(atmel_at91rm9200_pmc, atmel_at91sam9260_pmc)
  30. /*---------------------------------------------------------*/
  31. int at91_pmc_core_probe(struct udevice *dev)
  32. {
  33. struct pmc_platdata *plat = dev_get_platdata(dev);
  34. dev = dev_get_parent(dev);
  35. plat->reg_base = dev_read_addr_ptr(dev);
  36. return 0;
  37. }
  38. /**
  39. * at91_clk_sub_device_bind() - for the at91 clock driver
  40. * Recursively bind its children as clk devices.
  41. *
  42. * @return: 0 on success, or negative error code on failure
  43. */
  44. int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
  45. {
  46. const void *fdt = gd->fdt_blob;
  47. int offset = dev_of_offset(dev);
  48. bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
  49. const char *name;
  50. int ret;
  51. for (offset = fdt_first_subnode(fdt, offset);
  52. offset > 0;
  53. offset = fdt_next_subnode(fdt, offset)) {
  54. if (pre_reloc_only &&
  55. !ofnode_pre_reloc(offset_to_ofnode(offset)))
  56. continue;
  57. /*
  58. * If this node has "compatible" property, this is not
  59. * a clock sub-node, but a normal device. skip.
  60. */
  61. fdt_get_property(fdt, offset, "compatible", &ret);
  62. if (ret >= 0)
  63. continue;
  64. if (ret != -FDT_ERR_NOTFOUND)
  65. return ret;
  66. name = fdt_get_name(fdt, offset, NULL);
  67. if (!name)
  68. return -EINVAL;
  69. ret = device_bind_driver_to_node(dev, drv_name, name,
  70. offset_to_ofnode(offset), NULL);
  71. if (ret)
  72. return ret;
  73. }
  74. return 0;
  75. }
  76. int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
  77. {
  78. int periph;
  79. if (args->args_count) {
  80. debug("Invalid args_count: %d\n", args->args_count);
  81. return -EINVAL;
  82. }
  83. periph = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(clk->dev), "reg",
  84. -1);
  85. if (periph < 0)
  86. return -EINVAL;
  87. clk->id = periph;
  88. return 0;
  89. }
  90. int at91_clk_probe(struct udevice *dev)
  91. {
  92. struct udevice *dev_periph_container, *dev_pmc;
  93. struct pmc_platdata *plat = dev_get_platdata(dev);
  94. dev_periph_container = dev_get_parent(dev);
  95. dev_pmc = dev_get_parent(dev_periph_container);
  96. plat->reg_base = dev_read_addr_ptr(dev_pmc);
  97. return 0;
  98. }