clk-h32mx.c 1.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Atmel Corporation
  4. * Wenyou.Yang <wenyou.yang@atmel.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <dm/device_compat.h>
  10. #include <dm/util.h>
  11. #include <linux/io.h>
  12. #include <mach/at91_pmc.h>
  13. #include "pmc.h"
  14. DECLARE_GLOBAL_DATA_PTR;
  15. #define H32MX_MAX_FREQ 90000000
  16. static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
  17. {
  18. struct pmc_platdata *plat = dev_get_platdata(clk->dev);
  19. struct at91_pmc *pmc = plat->reg_base;
  20. ulong rate = gd->arch.mck_rate_hz;
  21. if (readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV)
  22. rate /= 2;
  23. if (rate > H32MX_MAX_FREQ)
  24. dev_dbg(clk->dev, "H32MX clock is too fast\n");
  25. return rate;
  26. }
  27. static struct clk_ops sama5d4_h32mx_clk_ops = {
  28. .get_rate = sama5d4_h32mx_clk_get_rate,
  29. };
  30. static int sama5d4_h32mx_clk_probe(struct udevice *dev)
  31. {
  32. return at91_pmc_core_probe(dev);
  33. }
  34. static const struct udevice_id sama5d4_h32mx_clk_match[] = {
  35. { .compatible = "atmel,sama5d4-clk-h32mx" },
  36. {}
  37. };
  38. U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
  39. .name = "sama5d4-h32mx-clk",
  40. .id = UCLASS_CLK,
  41. .of_match = sama5d4_h32mx_clk_match,
  42. .probe = sama5d4_h32mx_clk_probe,
  43. .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
  44. .ops = &sama5d4_h32mx_clk_ops,
  45. };