phy.h 13 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <dm.h>
  11. #include <linux/errno.h>
  12. #include <linux/list.h>
  13. #include <linux/mii.h>
  14. #include <linux/ethtool.h>
  15. #include <linux/mdio.h>
  16. #include <log.h>
  17. #include <phy_interface.h>
  18. #define PHY_FIXED_ID 0xa5a55a5a
  19. #define PHY_NCSI_ID 0xbeefcafe
  20. /*
  21. * There is no actual id for this.
  22. * This is just a dummy id for gmii2rgmmi converter.
  23. */
  24. #define PHY_GMII2RGMII_ID 0x5a5a5a5a
  25. #define PHY_MAX_ADDR 32
  26. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  27. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  28. SUPPORTED_TP | \
  29. SUPPORTED_MII)
  30. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  31. SUPPORTED_10baseT_Full)
  32. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  33. SUPPORTED_100baseT_Full)
  34. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  35. SUPPORTED_1000baseT_Full)
  36. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  37. PHY_100BT_FEATURES | \
  38. PHY_DEFAULT_FEATURES)
  39. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  40. PHY_1000BT_FEATURES)
  41. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  42. SUPPORTED_10000baseT_Full)
  43. #ifndef PHY_ANEG_TIMEOUT
  44. #define PHY_ANEG_TIMEOUT 4000
  45. #endif
  46. struct phy_device;
  47. #define MDIO_NAME_LEN 32
  48. struct mii_dev {
  49. struct list_head link;
  50. char name[MDIO_NAME_LEN];
  51. void *priv;
  52. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  53. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  54. u16 val);
  55. int (*reset)(struct mii_dev *bus);
  56. struct phy_device *phymap[PHY_MAX_ADDR];
  57. u32 phy_mask;
  58. };
  59. /* struct phy_driver: a structure which defines PHY behavior
  60. *
  61. * uid will contain a number which represents the PHY. During
  62. * startup, the driver will poll the PHY to find out what its
  63. * UID--as defined by registers 2 and 3--is. The 32-bit result
  64. * gotten from the PHY will be masked to
  65. * discard any bits which may change based on revision numbers
  66. * unimportant to functionality
  67. *
  68. */
  69. struct phy_driver {
  70. char *name;
  71. unsigned int uid;
  72. unsigned int mask;
  73. unsigned int mmds;
  74. u32 features;
  75. /* Called to do any driver startup necessities */
  76. /* Will be called during phy_connect */
  77. int (*probe)(struct phy_device *phydev);
  78. /* Called to configure the PHY, and modify the controller
  79. * based on the results. Should be called after phy_connect */
  80. int (*config)(struct phy_device *phydev);
  81. /* Called when starting up the controller */
  82. int (*startup)(struct phy_device *phydev);
  83. /* Called when bringing down the controller */
  84. int (*shutdown)(struct phy_device *phydev);
  85. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  86. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  87. u16 val);
  88. /* Phy specific driver override for reading a MMD register */
  89. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  90. /* Phy specific driver override for writing a MMD register */
  91. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  92. u16 val);
  93. struct list_head list;
  94. /* driver private data */
  95. ulong data;
  96. };
  97. struct phy_device {
  98. /* Information about the PHY type */
  99. /* And management functions */
  100. struct mii_dev *bus;
  101. struct phy_driver *drv;
  102. void *priv;
  103. #ifdef CONFIG_DM_ETH
  104. struct udevice *dev;
  105. ofnode node;
  106. #else
  107. struct eth_device *dev;
  108. #endif
  109. /* forced speed & duplex (no autoneg)
  110. * partner speed & duplex & pause (autoneg)
  111. */
  112. int speed;
  113. int duplex;
  114. /* The most recently read link state */
  115. int link;
  116. int port;
  117. phy_interface_t interface;
  118. u32 advertising;
  119. u32 supported;
  120. u32 mmds;
  121. int autoneg;
  122. int addr;
  123. int pause;
  124. int asym_pause;
  125. u32 phy_id;
  126. bool is_c45;
  127. u32 flags;
  128. };
  129. struct fixed_link {
  130. int phy_id;
  131. int duplex;
  132. int link_speed;
  133. int pause;
  134. int asym_pause;
  135. };
  136. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  137. {
  138. struct mii_dev *bus = phydev->bus;
  139. if (!bus || !bus->read) {
  140. debug("%s: No bus configured\n", __func__);
  141. return -1;
  142. }
  143. return bus->read(bus, phydev->addr, devad, regnum);
  144. }
  145. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  146. u16 val)
  147. {
  148. struct mii_dev *bus = phydev->bus;
  149. if (!bus || !bus->read) {
  150. debug("%s: No bus configured\n", __func__);
  151. return -1;
  152. }
  153. return bus->write(bus, phydev->addr, devad, regnum, val);
  154. }
  155. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  156. int regnum)
  157. {
  158. /* Write the desired MMD Devad */
  159. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  160. /* Write the desired MMD register address */
  161. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  162. /* Select the Function : DATA with no post increment */
  163. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  164. (devad | MII_MMD_CTRL_NOINCR));
  165. }
  166. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  167. int regnum)
  168. {
  169. struct phy_driver *drv = phydev->drv;
  170. if (regnum > (u16)~0 || devad > 32)
  171. return -EINVAL;
  172. /* driver-specific access */
  173. if (drv->read_mmd)
  174. return drv->read_mmd(phydev, devad, regnum);
  175. /* direct C45 / C22 access */
  176. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  177. devad == MDIO_DEVAD_NONE || !devad)
  178. return phy_read(phydev, devad, regnum);
  179. /* indirect C22 access */
  180. phy_mmd_start_indirect(phydev, devad, regnum);
  181. /* Read the content of the MMD's selected register */
  182. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  183. }
  184. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  185. int regnum, u16 val)
  186. {
  187. struct phy_driver *drv = phydev->drv;
  188. if (regnum > (u16)~0 || devad > 32)
  189. return -EINVAL;
  190. /* driver-specific access */
  191. if (drv->write_mmd)
  192. return drv->write_mmd(phydev, devad, regnum, val);
  193. /* direct C45 / C22 access */
  194. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  195. devad == MDIO_DEVAD_NONE || !devad)
  196. return phy_write(phydev, devad, regnum, val);
  197. /* indirect C22 access */
  198. phy_mmd_start_indirect(phydev, devad, regnum);
  199. /* Write the data into MMD's selected register */
  200. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  201. }
  202. #ifdef CONFIG_PHYLIB_10G
  203. extern struct phy_driver gen10g_driver;
  204. /*
  205. * List all 10G interfaces here, the assumption being that PHYs on these
  206. * interfaces are C45
  207. */
  208. static inline int is_10g_interface(phy_interface_t interface)
  209. {
  210. return interface == PHY_INTERFACE_MODE_XGMII ||
  211. interface == PHY_INTERFACE_MODE_USXGMII ||
  212. interface == PHY_INTERFACE_MODE_XFI;
  213. }
  214. #endif
  215. /**
  216. * phy_init() - Initializes the PHY drivers
  217. *
  218. * This function registers all available PHY drivers
  219. *
  220. * @return 0 if OK, -ve on error
  221. */
  222. int phy_init(void);
  223. /**
  224. * phy_reset() - Resets the specified PHY
  225. *
  226. * Issues a reset of the PHY and waits for it to complete
  227. *
  228. * @phydev: PHY to reset
  229. * @return 0 if OK, -ve on error
  230. */
  231. int phy_reset(struct phy_device *phydev);
  232. /**
  233. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  234. *
  235. * The function checks the PHY addresses flagged in phy_mask and returns a
  236. * phy_device pointer if it detects a PHY.
  237. * This function should only be called if just one PHY is expected to be present
  238. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  239. * it is undefined which of these PHYs is returned.
  240. *
  241. * @bus: MII/MDIO bus to scan
  242. * @phy_mask: bitmap of PYH addresses to scan
  243. * @interface: type of MAC-PHY interface
  244. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  245. */
  246. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  247. phy_interface_t interface);
  248. #ifdef CONFIG_DM_ETH
  249. /**
  250. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  251. * @phydev: PHY device
  252. * @dev: Ethernet device
  253. */
  254. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  255. /**
  256. * phy_connect() - Creates a PHY device for the Ethernet interface
  257. *
  258. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  259. * already, and associates it with the Ethernet device.
  260. * The function may be called with addr <= 0, in this case addr value is ignored
  261. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  262. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  263. * which PHY is returned.
  264. *
  265. * @bus: MII/MDIO bus that hosts the PHY
  266. * @addr: PHY address on MDIO bus
  267. * @dev: Ethernet device to associate to the PHY
  268. * @interface: type of MAC-PHY interface
  269. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  270. */
  271. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  272. struct udevice *dev,
  273. phy_interface_t interface);
  274. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  275. {
  276. if (ofnode_valid(phydev->node))
  277. return phydev->node;
  278. else
  279. return dev_ofnode(phydev->dev);
  280. }
  281. #else
  282. /**
  283. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  284. * @phydev: PHY device
  285. * @dev: Ethernet device
  286. */
  287. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  288. /**
  289. * phy_connect() - Creates a PHY device for the Ethernet interface
  290. *
  291. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  292. * already, and associates it with the Ethernet device.
  293. * The function may be called with addr <= 0, in this case addr value is ignored
  294. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  295. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  296. * which PHY is returned.
  297. *
  298. * @bus: MII/MDIO bus that hosts the PHY
  299. * @addr: PHY address on MDIO bus
  300. * @dev: Ethernet device to associate to the PHY
  301. * @interface: type of MAC-PHY interface
  302. * @return pointer to phy_device if a PHY is found, or NULL otherwise
  303. */
  304. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  305. struct eth_device *dev,
  306. phy_interface_t interface);
  307. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  308. {
  309. return ofnode_null();
  310. }
  311. #endif
  312. int phy_startup(struct phy_device *phydev);
  313. int phy_config(struct phy_device *phydev);
  314. int phy_shutdown(struct phy_device *phydev);
  315. int phy_register(struct phy_driver *drv);
  316. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  317. int genphy_config_aneg(struct phy_device *phydev);
  318. int genphy_restart_aneg(struct phy_device *phydev);
  319. int genphy_update_link(struct phy_device *phydev);
  320. int genphy_parse_link(struct phy_device *phydev);
  321. int genphy_config(struct phy_device *phydev);
  322. int genphy_startup(struct phy_device *phydev);
  323. int genphy_shutdown(struct phy_device *phydev);
  324. int gen10g_config(struct phy_device *phydev);
  325. int gen10g_startup(struct phy_device *phydev);
  326. int gen10g_shutdown(struct phy_device *phydev);
  327. int gen10g_discover_mmds(struct phy_device *phydev);
  328. int phy_b53_init(void);
  329. int phy_mv88e61xx_init(void);
  330. int phy_aquantia_init(void);
  331. int phy_atheros_init(void);
  332. int phy_broadcom_init(void);
  333. int phy_cortina_init(void);
  334. int phy_davicom_init(void);
  335. int phy_et1011c_init(void);
  336. int phy_lxt_init(void);
  337. int phy_marvell_init(void);
  338. int phy_micrel_ksz8xxx_init(void);
  339. int phy_micrel_ksz90x1_init(void);
  340. int phy_meson_gxl_init(void);
  341. int phy_natsemi_init(void);
  342. int phy_realtek_init(void);
  343. int phy_smsc_init(void);
  344. int phy_teranetics_init(void);
  345. int phy_ti_init(void);
  346. int phy_vitesse_init(void);
  347. int phy_xilinx_init(void);
  348. int phy_mscc_init(void);
  349. int phy_fixed_init(void);
  350. int phy_ncsi_init(void);
  351. int phy_xilinx_gmii2rgmii_init(void);
  352. int board_phy_config(struct phy_device *phydev);
  353. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  354. /**
  355. * phy_get_interface_by_name() - Look up a PHY interface name
  356. *
  357. * @str: PHY interface name, e.g. "mii"
  358. * @return PHY_INTERFACE_MODE_... value, or -1 if not found
  359. */
  360. int phy_get_interface_by_name(const char *str);
  361. /**
  362. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  363. * is RGMII (all variants)
  364. * @phydev: the phy_device struct
  365. */
  366. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  367. {
  368. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  369. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  370. }
  371. /**
  372. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  373. * is SGMII (all variants)
  374. * @phydev: the phy_device struct
  375. */
  376. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  377. {
  378. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  379. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  380. }
  381. /* PHY UIDs for various PHYs that are referenced in external code */
  382. #define PHY_UID_CS4340 0x13e51002
  383. #define PHY_UID_CS4223 0x03e57003
  384. #define PHY_UID_TN2020 0x00a19410
  385. #define PHY_UID_IN112525_S03 0x02107440
  386. #endif