i2c.h 27 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. /*
  18. * For now there are essentially two parts to this file - driver model
  19. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  20. * most recent). The plan is to migrate everything to driver model.
  21. * The driver model structures and API are separate as they are different
  22. * enough as to be incompatible for compilation purposes.
  23. */
  24. enum dm_i2c_chip_flags {
  25. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  26. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  27. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  28. };
  29. /** enum i2c_speed_mode - standard I2C speed modes */
  30. enum i2c_speed_mode {
  31. IC_SPEED_MODE_STANDARD,
  32. IC_SPEED_MODE_FAST,
  33. IC_SPEED_MODE_FAST_PLUS,
  34. IC_SPEED_MODE_HIGH,
  35. IC_SPEED_MODE_FAST_ULTRA,
  36. IC_SPEED_MODE_COUNT,
  37. };
  38. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  39. enum i2c_speed_rate {
  40. I2C_SPEED_STANDARD_RATE = 100000,
  41. I2C_SPEED_FAST_RATE = 400000,
  42. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  43. I2C_SPEED_HIGH_RATE = 3400000,
  44. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  45. };
  46. /** enum i2c_address_mode - available address modes */
  47. enum i2c_address_mode {
  48. I2C_MODE_7_BIT,
  49. I2C_MODE_10_BIT
  50. };
  51. struct udevice;
  52. /**
  53. * struct dm_i2c_chip - information about an i2c chip
  54. *
  55. * An I2C chip is a device on the I2C bus. It sits at a particular address
  56. * and normally supports 7-bit or 10-bit addressing.
  57. *
  58. * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  59. * the chip to examine.
  60. *
  61. * @chip_addr: Chip address on bus
  62. * @offset_len: Length of offset in bytes. A single byte offset can
  63. * represent up to 256 bytes. A value larger than 1 may be
  64. * needed for larger devices.
  65. * @flags: Flags for this chip (dm_i2c_chip_flags)
  66. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  67. * devices which steal addresses as part of offset.
  68. * If offset_len is zero, then the offset is encoded
  69. * completely within the chip address itself.
  70. * e.g. a devce with chip address of 0x2c with 512
  71. * registers might use the bottom bit of the address
  72. * to indicate which half of the address space is being
  73. * accessed while still only using 1 byte offset.
  74. * This means it will respond to chip address 0x2c and
  75. * 0x2d.
  76. * A real world example is the Atmel AT24C04. It's
  77. * datasheet explains it's usage of this addressing
  78. * mode.
  79. * @emul: Emulator for this chip address (only used for emulation)
  80. */
  81. struct dm_i2c_chip {
  82. uint chip_addr;
  83. uint offset_len;
  84. uint flags;
  85. uint chip_addr_offset_mask;
  86. #ifdef CONFIG_SANDBOX
  87. struct udevice *emul;
  88. bool test_mode;
  89. #endif
  90. };
  91. /**
  92. * struct dm_i2c_bus- information about an i2c bus
  93. *
  94. * An I2C bus contains 0 or more chips on it, each at its own address. The
  95. * bus can operate at different speeds (measured in Hz, typically 100KHz
  96. * or 400KHz).
  97. *
  98. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  99. * I2C bus udevice.
  100. *
  101. * @speed_hz: Bus speed in hertz (typically 100000)
  102. * @max_transaction_bytes: Maximal size of single I2C transfer
  103. */
  104. struct dm_i2c_bus {
  105. int speed_hz;
  106. int max_transaction_bytes;
  107. };
  108. /*
  109. * Not all of these flags are implemented in the U-Boot API
  110. */
  111. enum dm_i2c_msg_flags {
  112. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  113. I2C_M_RD = 0x0001, /* read data, from slave to master */
  114. I2C_M_STOP = 0x8000, /* send stop after this message */
  115. I2C_M_NOSTART = 0x4000, /* no start before this message */
  116. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  117. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  118. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  119. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  120. };
  121. /**
  122. * struct i2c_msg - an I2C message
  123. *
  124. * @addr: Slave address
  125. * @flags: Flags (see enum dm_i2c_msg_flags)
  126. * @len: Length of buffer in bytes, may be 0 for a probe
  127. * @buf: Buffer to send/receive, or NULL if no data
  128. */
  129. struct i2c_msg {
  130. uint addr;
  131. uint flags;
  132. uint len;
  133. u8 *buf;
  134. };
  135. /**
  136. * struct i2c_msg_list - a list of I2C messages
  137. *
  138. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  139. * appropriate in U-Boot.
  140. *
  141. * @msg: Pointer to i2c_msg array
  142. * @nmsgs: Number of elements in the array
  143. */
  144. struct i2c_msg_list {
  145. struct i2c_msg *msgs;
  146. uint nmsgs;
  147. };
  148. /**
  149. * dm_i2c_read() - read bytes from an I2C chip
  150. *
  151. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  152. * can use i2c_get_chip(). To obtain a bus by bus number use
  153. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  154. *
  155. * To set the address length of a devce use i2c_set_addr_len(). It
  156. * defaults to 1.
  157. *
  158. * @dev: Chip to read from
  159. * @offset: Offset within chip to start reading
  160. * @buffer: Place to put data
  161. * @len: Number of bytes to read
  162. *
  163. * @return 0 on success, -ve on failure
  164. */
  165. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  166. /**
  167. * dm_i2c_write() - write bytes to an I2C chip
  168. *
  169. * See notes for dm_i2c_read() above.
  170. *
  171. * @dev: Chip to write to
  172. * @offset: Offset within chip to start writing
  173. * @buffer: Buffer containing data to write
  174. * @len: Number of bytes to write
  175. *
  176. * @return 0 on success, -ve on failure
  177. */
  178. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  179. int len);
  180. /**
  181. * dm_i2c_probe() - probe a particular chip address
  182. *
  183. * This can be useful to check for the existence of a chip on the bus.
  184. * It is typically implemented by writing the chip address to the bus
  185. * and checking that the chip replies with an ACK.
  186. *
  187. * @bus: Bus to probe
  188. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  189. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  190. * @devp: Returns the device found, or NULL if none
  191. * @return 0 if a chip was found at that address, -ve if not
  192. */
  193. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  194. struct udevice **devp);
  195. /**
  196. * dm_i2c_reg_read() - Read a value from an I2C register
  197. *
  198. * This reads a single value from the given address in an I2C chip
  199. *
  200. * @dev: Device to use for transfer
  201. * @addr: Address to read from
  202. * @return value read, or -ve on error
  203. */
  204. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  205. /**
  206. * dm_i2c_reg_write() - Write a value to an I2C register
  207. *
  208. * This writes a single value to the given address in an I2C chip
  209. *
  210. * @dev: Device to use for transfer
  211. * @addr: Address to write to
  212. * @val: Value to write (normally a byte)
  213. * @return 0 on success, -ve on error
  214. */
  215. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  216. /**
  217. * dm_i2c_xfer() - Transfer messages over I2C
  218. *
  219. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  220. * instead.
  221. *
  222. * @dev: Device to use for transfer
  223. * @msg: List of messages to transfer
  224. * @nmsgs: Number of messages to transfer
  225. * @return 0 on success, -ve on error
  226. */
  227. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  228. /**
  229. * dm_i2c_set_bus_speed() - set the speed of a bus
  230. *
  231. * @bus: Bus to adjust
  232. * @speed: Requested speed in Hz
  233. * @return 0 if OK, -EINVAL for invalid values
  234. */
  235. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  236. /**
  237. * dm_i2c_get_bus_speed() - get the speed of a bus
  238. *
  239. * @bus: Bus to check
  240. * @return speed of selected I2C bus in Hz, -ve on error
  241. */
  242. int dm_i2c_get_bus_speed(struct udevice *bus);
  243. /**
  244. * i2c_set_chip_flags() - set flags for a chip
  245. *
  246. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  247. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  248. *
  249. * @dev: Chip to adjust
  250. * @flags: New flags
  251. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  252. */
  253. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  254. /**
  255. * i2c_get_chip_flags() - get flags for a chip
  256. *
  257. * @dev: Chip to check
  258. * @flagsp: Place to put flags
  259. * @return 0 if OK, other -ve value on error
  260. */
  261. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  262. /**
  263. * i2c_set_offset_len() - set the offset length for a chip
  264. *
  265. * The offset used to access a chip may be up to 4 bytes long. Typically it
  266. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  267. * registers. The default value is 1, but you can call this function to
  268. * change it.
  269. *
  270. * @offset_len: New offset length value (typically 1 or 2)
  271. */
  272. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  273. /**
  274. * i2c_get_offset_len() - get the offset length for a chip
  275. *
  276. * @return: Current offset length value (typically 1 or 2)
  277. */
  278. int i2c_get_chip_offset_len(struct udevice *dev);
  279. /**
  280. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  281. *
  282. * Some devices listen on multiple chip addresses to achieve larger offsets
  283. * than their single or multiple byte offsets would allow for. You can use this
  284. * function to set the bits that are valid to be used for offset overflow.
  285. *
  286. * @mask: The mask to be used for high offset bits within address
  287. * @return 0 if OK, other -ve value on error
  288. */
  289. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  290. /*
  291. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  292. *
  293. * @return current chip addr offset mask
  294. */
  295. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  296. /**
  297. * i2c_deblock() - recover a bus that is in an unknown state
  298. *
  299. * See the deblock() method in 'struct dm_i2c_ops' for full information
  300. *
  301. * @bus: Bus to recover
  302. * @return 0 if OK, -ve on error
  303. */
  304. int i2c_deblock(struct udevice *bus);
  305. /**
  306. * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
  307. *
  308. * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
  309. * for deblocking the I2C bus.
  310. *
  311. * @sda_pin: SDA GPIO
  312. * @scl_pin: SCL GPIO
  313. * @scl_count: Number of SCL clock cycles generated to deblock SDA
  314. * @start_count:Number of I2C start conditions sent after deblocking SDA
  315. * @delay: Delay between SCL clock line changes
  316. * @return 0 if OK, -ve on error
  317. */
  318. struct gpio_desc;
  319. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
  320. unsigned int scl_count, unsigned int start_count,
  321. unsigned int delay);
  322. /**
  323. * struct dm_i2c_ops - driver operations for I2C uclass
  324. *
  325. * Drivers should support these operations unless otherwise noted. These
  326. * operations are intended to be used by uclass code, not directly from
  327. * other code.
  328. */
  329. struct dm_i2c_ops {
  330. /**
  331. * xfer() - transfer a list of I2C messages
  332. *
  333. * @bus: Bus to read from
  334. * @msg: List of messages to transfer
  335. * @nmsgs: Number of messages in the list
  336. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  337. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  338. * flags cannot be supported, other -ve value on some other error
  339. */
  340. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  341. /**
  342. * probe_chip() - probe for the presense of a chip address
  343. *
  344. * This function is optional. If omitted, the uclass will send a zero
  345. * length message instead.
  346. *
  347. * @bus: Bus to probe
  348. * @chip_addr: Chip address to probe
  349. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  350. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  351. * to default probem other -ve value on error
  352. */
  353. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  354. /**
  355. * set_bus_speed() - set the speed of a bus (optional)
  356. *
  357. * The bus speed value will be updated by the uclass if this function
  358. * does not return an error. This method is optional - if it is not
  359. * provided then the driver can read the speed from
  360. * dev_get_uclass_priv(bus)->speed_hz
  361. *
  362. * @bus: Bus to adjust
  363. * @speed: Requested speed in Hz
  364. * @return 0 if OK, -EINVAL for invalid values
  365. */
  366. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  367. /**
  368. * get_bus_speed() - get the speed of a bus (optional)
  369. *
  370. * Normally this can be provided by the uclass, but if you want your
  371. * driver to check the bus speed by looking at the hardware, you can
  372. * implement that here. This method is optional. This method would
  373. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  374. *
  375. * @bus: Bus to check
  376. * @return speed of selected I2C bus in Hz, -ve on error
  377. */
  378. int (*get_bus_speed)(struct udevice *bus);
  379. /**
  380. * set_flags() - set the flags for a chip (optional)
  381. *
  382. * This is generally implemented by the uclass, but drivers can
  383. * check the value to ensure that unsupported options are not used.
  384. * This method is optional. If provided, this method will always be
  385. * called when the flags change.
  386. *
  387. * @dev: Chip to adjust
  388. * @flags: New flags value
  389. * @return 0 if OK, -EINVAL if value is unsupported
  390. */
  391. int (*set_flags)(struct udevice *dev, uint flags);
  392. /**
  393. * deblock() - recover a bus that is in an unknown state
  394. *
  395. * I2C is a synchronous protocol and resets of the processor in the
  396. * middle of an access can block the I2C Bus until a powerdown of
  397. * the full unit is done. This is because slaves can be stuck
  398. * waiting for addition bus transitions for a transaction that will
  399. * never complete. Resetting the I2C master does not help. The only
  400. * way is to force the bus through a series of transitions to make
  401. * sure that all slaves are done with the transaction. This method
  402. * performs this 'deblocking' if support by the driver.
  403. *
  404. * This method is optional.
  405. */
  406. int (*deblock)(struct udevice *bus);
  407. };
  408. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  409. /**
  410. * struct i2c_mux_ops - operations for an I2C mux
  411. *
  412. * The current mux state is expected to be stored in the mux itself since
  413. * it is the only thing that knows how to make things work. The mux can
  414. * record the current state and then avoid switching unless it is necessary.
  415. * So select() can be skipped if the mux is already in the correct state.
  416. * Also deselect() can be made a nop if required.
  417. */
  418. struct i2c_mux_ops {
  419. /**
  420. * select() - select one of of I2C buses attached to a mux
  421. *
  422. * This will be called when there is no bus currently selected by the
  423. * mux. This method does not need to deselect the old bus since
  424. * deselect() will be already have been called if necessary.
  425. *
  426. * @mux: Mux device
  427. * @bus: I2C bus to select
  428. * @channel: Channel number correponding to the bus to select
  429. * @return 0 if OK, -ve on error
  430. */
  431. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  432. /**
  433. * deselect() - select one of of I2C buses attached to a mux
  434. *
  435. * This is used to deselect the currently selected I2C bus.
  436. *
  437. * @mux: Mux device
  438. * @bus: I2C bus to deselect
  439. * @channel: Channel number correponding to the bus to deselect
  440. * @return 0 if OK, -ve on error
  441. */
  442. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  443. };
  444. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  445. /**
  446. * i2c_get_chip() - get a device to use to access a chip on a bus
  447. *
  448. * This returns the device for the given chip address. The device can then
  449. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  450. *
  451. * @bus: Bus to examine
  452. * @chip_addr: Chip address for the new device
  453. * @offset_len: Length of a register offset in bytes (normally 1)
  454. * @devp: Returns pointer to new device if found or -ENODEV if not
  455. * found
  456. */
  457. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  458. struct udevice **devp);
  459. /**
  460. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  461. * a bus number
  462. *
  463. * This returns the device for the given chip address on a particular bus
  464. * number.
  465. *
  466. * @busnum: Bus number to examine
  467. * @chip_addr: Chip address for the new device
  468. * @offset_len: Length of a register offset in bytes (normally 1)
  469. * @devp: Returns pointer to new device if found or -ENODEV if not
  470. * found
  471. */
  472. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  473. struct udevice **devp);
  474. /**
  475. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  476. *
  477. * This decodes the chip address from a device tree node and puts it into
  478. * its dm_i2c_chip structure. This should be called in your driver's
  479. * ofdata_to_platdata() method.
  480. *
  481. * @blob: Device tree blob
  482. * @node: Node offset to read from
  483. * @spi: Place to put the decoded information
  484. */
  485. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
  486. /**
  487. * i2c_dump_msgs() - Dump a list of I2C messages
  488. *
  489. * This may be useful for debugging.
  490. *
  491. * @msg: Message list to dump
  492. * @nmsgs: Number of messages
  493. */
  494. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  495. /**
  496. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  497. *
  498. * This looks at the device's 'emul' phandle
  499. *
  500. * @dev: Device to find an emulator for
  501. * @emulp: Returns the associated emulator, if found *
  502. * @return 0 if OK, -ENOENT or -ENODEV if not found
  503. */
  504. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  505. /**
  506. * i2c_emul_get_device() - Find the device being emulated
  507. *
  508. * Given an emulator this returns the associated device
  509. *
  510. * @emul: Emulator for the device
  511. * @return device that @emul is emulating
  512. */
  513. struct udevice *i2c_emul_get_device(struct udevice *emul);
  514. #ifndef CONFIG_DM_I2C
  515. /*
  516. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  517. *
  518. * The implementation MUST NOT use static or global variables if the
  519. * I2C routines are used to read SDRAM configuration information
  520. * because this is done before the memories are initialized. Limited
  521. * use of stack-based variables are OK (the initial stack size is
  522. * limited).
  523. *
  524. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  525. */
  526. /*
  527. * Configuration items.
  528. */
  529. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  530. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  531. /* no muxes used bus = i2c adapters */
  532. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  533. #define CONFIG_SYS_I2C_MAX_HOPS 0
  534. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  535. #else
  536. /* we use i2c muxes */
  537. #undef CONFIG_SYS_I2C_DIRECT_BUS
  538. #endif
  539. /* define the I2C bus number for RTC and DTT if not already done */
  540. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  541. #define CONFIG_SYS_RTC_BUS_NUM 0
  542. #endif
  543. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  544. #define CONFIG_SYS_SPD_BUS_NUM 0
  545. #endif
  546. struct i2c_adapter {
  547. void (*init)(struct i2c_adapter *adap, int speed,
  548. int slaveaddr);
  549. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  550. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  551. uint addr, int alen, uint8_t *buffer,
  552. int len);
  553. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  554. uint addr, int alen, uint8_t *buffer,
  555. int len);
  556. uint (*set_bus_speed)(struct i2c_adapter *adap,
  557. uint speed);
  558. int speed;
  559. int waitdelay;
  560. int slaveaddr;
  561. int init_done;
  562. int hwadapnr;
  563. char *name;
  564. };
  565. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  566. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  567. { \
  568. .init = _init, \
  569. .probe = _probe, \
  570. .read = _read, \
  571. .write = _write, \
  572. .set_bus_speed = _set_speed, \
  573. .speed = _speed, \
  574. .slaveaddr = _slaveaddr, \
  575. .init_done = 0, \
  576. .hwadapnr = _hwadapnr, \
  577. .name = #_name \
  578. };
  579. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  580. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  581. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  582. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  583. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  584. struct i2c_adapter *i2c_get_adapter(int index);
  585. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  586. struct i2c_mux {
  587. int id;
  588. char name[16];
  589. };
  590. struct i2c_next_hop {
  591. struct i2c_mux mux;
  592. uint8_t chip;
  593. uint8_t channel;
  594. };
  595. struct i2c_bus_hose {
  596. int adapter;
  597. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  598. };
  599. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  600. extern struct i2c_bus_hose i2c_bus[];
  601. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  602. #else
  603. #define I2C_ADAPTER(bus) bus
  604. #endif
  605. #define I2C_BUS gd->cur_i2c_bus
  606. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  607. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  608. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  609. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  610. #define I2C_MUX_PCA9540_ID 1
  611. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  612. #define I2C_MUX_PCA9542_ID 2
  613. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  614. #define I2C_MUX_PCA9544_ID 3
  615. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  616. #define I2C_MUX_PCA9547_ID 4
  617. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  618. #define I2C_MUX_PCA9548_ID 5
  619. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  620. #endif
  621. #ifndef I2C_SOFT_DECLARATIONS
  622. # if (defined(CONFIG_AT91RM9200) || \
  623. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  624. defined(CONFIG_AT91SAM9263))
  625. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  626. # else
  627. # define I2C_SOFT_DECLARATIONS
  628. # endif
  629. #endif
  630. /*
  631. * Many boards/controllers/drivers don't support an I2C slave interface so
  632. * provide a default slave address for them for use in common code. A real
  633. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  634. * support a slave interface.
  635. */
  636. #ifndef CONFIG_SYS_I2C_SLAVE
  637. #define CONFIG_SYS_I2C_SLAVE 0xfe
  638. #endif
  639. /*
  640. * Initialization, must be called once on start up, may be called
  641. * repeatedly to change the speed and slave addresses.
  642. */
  643. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  644. void i2c_early_init_f(void);
  645. #endif
  646. void i2c_init(int speed, int slaveaddr);
  647. void i2c_init_board(void);
  648. #ifdef CONFIG_SYS_I2C
  649. /*
  650. * i2c_get_bus_num:
  651. *
  652. * Returns index of currently active I2C bus. Zero-based.
  653. */
  654. unsigned int i2c_get_bus_num(void);
  655. /*
  656. * i2c_set_bus_num:
  657. *
  658. * Change the active I2C bus. Subsequent read/write calls will
  659. * go to this one.
  660. *
  661. * bus - bus index, zero based
  662. *
  663. * Returns: 0 on success, not 0 on failure
  664. *
  665. */
  666. int i2c_set_bus_num(unsigned int bus);
  667. /*
  668. * i2c_init_all():
  669. *
  670. * Initializes all I2C adapters in the system. All i2c_adap structures must
  671. * be initialized beforehead with function pointers and data, including
  672. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  673. */
  674. void i2c_init_all(void);
  675. /*
  676. * Probe the given I2C chip address. Returns 0 if a chip responded,
  677. * not 0 on failure.
  678. */
  679. int i2c_probe(uint8_t chip);
  680. /*
  681. * Read/Write interface:
  682. * chip: I2C chip address, range 0..127
  683. * addr: Memory (register) address within the chip
  684. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  685. * memories, 0 for register type devices with only one
  686. * register)
  687. * buffer: Where to read/write the data
  688. * len: How many bytes to read/write
  689. *
  690. * Returns: 0 on success, not 0 on failure
  691. */
  692. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  693. uint8_t *buffer, int len);
  694. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  695. uint8_t *buffer, int len);
  696. /*
  697. * Utility routines to read/write registers.
  698. */
  699. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  700. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  701. /*
  702. * i2c_set_bus_speed:
  703. *
  704. * Change the speed of the active I2C bus
  705. *
  706. * speed - bus speed in Hz
  707. *
  708. * Returns: new bus speed
  709. *
  710. */
  711. unsigned int i2c_set_bus_speed(unsigned int speed);
  712. /*
  713. * i2c_get_bus_speed:
  714. *
  715. * Returns speed of currently active I2C bus in Hz
  716. */
  717. unsigned int i2c_get_bus_speed(void);
  718. #else
  719. /*
  720. * Probe the given I2C chip address. Returns 0 if a chip responded,
  721. * not 0 on failure.
  722. */
  723. int i2c_probe(uchar chip);
  724. /*
  725. * Read/Write interface:
  726. * chip: I2C chip address, range 0..127
  727. * addr: Memory (register) address within the chip
  728. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  729. * memories, 0 for register type devices with only one
  730. * register)
  731. * buffer: Where to read/write the data
  732. * len: How many bytes to read/write
  733. *
  734. * Returns: 0 on success, not 0 on failure
  735. */
  736. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  737. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  738. /*
  739. * Utility routines to read/write registers.
  740. */
  741. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  742. {
  743. u8 buf;
  744. #ifdef DEBUG
  745. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  746. #endif
  747. i2c_read(addr, reg, 1, &buf, 1);
  748. return buf;
  749. }
  750. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  751. {
  752. #ifdef DEBUG
  753. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  754. __func__, addr, reg, val);
  755. #endif
  756. i2c_write(addr, reg, 1, &val, 1);
  757. }
  758. /*
  759. * Functions for setting the current I2C bus and its speed
  760. */
  761. /*
  762. * i2c_set_bus_num:
  763. *
  764. * Change the active I2C bus. Subsequent read/write calls will
  765. * go to this one.
  766. *
  767. * bus - bus index, zero based
  768. *
  769. * Returns: 0 on success, not 0 on failure
  770. *
  771. */
  772. int i2c_set_bus_num(unsigned int bus);
  773. /*
  774. * i2c_get_bus_num:
  775. *
  776. * Returns index of currently active I2C bus. Zero-based.
  777. */
  778. unsigned int i2c_get_bus_num(void);
  779. /*
  780. * i2c_set_bus_speed:
  781. *
  782. * Change the speed of the active I2C bus
  783. *
  784. * speed - bus speed in Hz
  785. *
  786. * Returns: 0 on success, not 0 on failure
  787. *
  788. */
  789. int i2c_set_bus_speed(unsigned int);
  790. /*
  791. * i2c_get_bus_speed:
  792. *
  793. * Returns speed of currently active I2C bus in Hz
  794. */
  795. unsigned int i2c_get_bus_speed(void);
  796. #endif /* CONFIG_SYS_I2C */
  797. /*
  798. * only for backwardcompatibility, should go away if we switched
  799. * completely to new multibus support.
  800. */
  801. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  802. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  803. # define CONFIG_SYS_MAX_I2C_BUS 2
  804. # endif
  805. # define I2C_MULTI_BUS 1
  806. #else
  807. # define CONFIG_SYS_MAX_I2C_BUS 1
  808. # define I2C_MULTI_BUS 0
  809. #endif
  810. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  811. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  812. static inline unsigned int I2C_GET_BUS(void)
  813. {
  814. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  815. }
  816. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  817. static inline void I2C_SET_BUS(unsigned int bus)
  818. {
  819. if (I2C_MULTI_BUS)
  820. i2c_set_bus_num(bus);
  821. }
  822. /* Multi I2C definitions */
  823. enum {
  824. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  825. I2C_8, I2C_9, I2C_10,
  826. };
  827. /**
  828. * Get FDT values for i2c bus.
  829. *
  830. * @param blob Device tree blbo
  831. * @return the number of I2C bus
  832. */
  833. void board_i2c_init(const void *blob);
  834. /**
  835. * Find the I2C bus number by given a FDT I2C node.
  836. *
  837. * @param blob Device tree blbo
  838. * @param node FDT I2C node to find
  839. * @return the number of I2C bus (zero based), or -1 on error
  840. */
  841. int i2c_get_bus_num_fdt(int node);
  842. /**
  843. * Reset the I2C bus represented by the given a FDT I2C node.
  844. *
  845. * @param blob Device tree blbo
  846. * @param node FDT I2C node to find
  847. * @return 0 if port was reset, -1 if not found
  848. */
  849. int i2c_reset_port_fdt(const void *blob, int node);
  850. #endif /* !CONFIG_DM_I2C */
  851. #endif /* _I2C_H_ */