mt7621_wdt.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Ralink / Mediatek RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  4. *
  5. * Copyright (C) 2018 Stefan Roese <sr@denx.de>
  6. *
  7. * Based on the Linux driver version which is:
  8. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  9. * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  10. */
  11. #include <common.h>
  12. #include <dm.h>
  13. #include <wdt.h>
  14. #include <linux/io.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. struct mt762x_wdt {
  17. void __iomem *regs;
  18. };
  19. #define TIMER_REG_TMRSTAT 0x00
  20. #define TIMER_REG_TMR1CTL 0x20
  21. #define TIMER_REG_TMR1LOAD 0x24
  22. #define TMR1CTL_ENABLE BIT(7)
  23. #define TMR1CTL_RESTART BIT(9)
  24. #define TMR1CTL_PRESCALE_SHIFT 16
  25. static int mt762x_wdt_ping(struct mt762x_wdt *priv)
  26. {
  27. writel(TMR1CTL_RESTART, priv->regs + TIMER_REG_TMRSTAT);
  28. return 0;
  29. }
  30. static int mt762x_wdt_start(struct udevice *dev, u64 ms, ulong flags)
  31. {
  32. struct mt762x_wdt *priv = dev_get_priv(dev);
  33. /* set the prescaler to 1ms == 1000us */
  34. writel(1000 << TMR1CTL_PRESCALE_SHIFT, priv->regs + TIMER_REG_TMR1CTL);
  35. writel(ms, priv->regs + TIMER_REG_TMR1LOAD);
  36. setbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
  37. return 0;
  38. }
  39. static int mt762x_wdt_stop(struct udevice *dev)
  40. {
  41. struct mt762x_wdt *priv = dev_get_priv(dev);
  42. mt762x_wdt_ping(priv);
  43. clrbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
  44. return 0;
  45. }
  46. static int mt762x_wdt_reset(struct udevice *dev)
  47. {
  48. struct mt762x_wdt *priv = dev_get_priv(dev);
  49. mt762x_wdt_ping(priv);
  50. return 0;
  51. }
  52. static int mt762x_wdt_probe(struct udevice *dev)
  53. {
  54. struct mt762x_wdt *priv = dev_get_priv(dev);
  55. priv->regs = dev_remap_addr(dev);
  56. if (!priv->regs)
  57. return -EINVAL;
  58. mt762x_wdt_stop(dev);
  59. return 0;
  60. }
  61. static const struct wdt_ops mt762x_wdt_ops = {
  62. .start = mt762x_wdt_start,
  63. .reset = mt762x_wdt_reset,
  64. .stop = mt762x_wdt_stop,
  65. };
  66. static const struct udevice_id mt762x_wdt_ids[] = {
  67. { .compatible = "mediatek,mt7621-wdt" },
  68. {}
  69. };
  70. U_BOOT_DRIVER(mt762x_wdt) = {
  71. .name = "mt762x_wdt",
  72. .id = UCLASS_WDT,
  73. .of_match = mt762x_wdt_ids,
  74. .probe = mt762x_wdt_probe,
  75. .priv_auto_alloc_size = sizeof(struct mt762x_wdt),
  76. .ops = &mt762x_wdt_ops,
  77. };