s6e8ax0.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2012 Samsung Electronics
  4. *
  5. * Author: Donghwa Lee <dh09.lee@samsung.com>
  6. */
  7. #include <common.h>
  8. #include <asm/arch/mipi_dsim.h>
  9. #include "exynos/exynos_mipi_dsi_lowlevel.h"
  10. #include "exynos/exynos_mipi_dsi_common.h"
  11. static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
  12. {
  13. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  14. int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
  15. static const unsigned char data_to_send[] = {
  16. 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
  17. 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
  18. 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
  19. 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
  20. 0xff, 0xff, 0xc8
  21. };
  22. static const unsigned char data_to_send_reverse[] = {
  23. 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
  24. 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
  25. 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
  26. 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
  27. 0xf6, 0xf6, 0xc1
  28. };
  29. if (reverse) {
  30. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  31. data_to_send_reverse,
  32. ARRAY_SIZE(data_to_send_reverse));
  33. } else {
  34. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  35. data_to_send, ARRAY_SIZE(data_to_send));
  36. }
  37. }
  38. static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
  39. {
  40. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  41. static const unsigned char data_to_send[] = {
  42. 0xf2, 0x80, 0x03, 0x0d
  43. };
  44. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  45. data_to_send, ARRAY_SIZE(data_to_send));
  46. }
  47. static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
  48. {
  49. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  50. /* 7500K 2.2 Set : 30cd */
  51. static const unsigned char data_to_send[] = {
  52. 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
  53. 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
  54. 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
  55. };
  56. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  57. data_to_send, ARRAY_SIZE(data_to_send));
  58. }
  59. static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
  60. {
  61. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  62. static const unsigned char data_to_send[] = {
  63. 0xf7, 0x03
  64. };
  65. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
  66. ARRAY_SIZE(data_to_send));
  67. }
  68. static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
  69. {
  70. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  71. static const unsigned char data_to_send[] = {
  72. 0xf6, 0x00, 0x02, 0x00
  73. };
  74. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  75. data_to_send, ARRAY_SIZE(data_to_send));
  76. }
  77. static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
  78. {
  79. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  80. static const unsigned char data_to_send[] = {
  81. 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
  82. 0x00
  83. };
  84. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  85. data_to_send, ARRAY_SIZE(data_to_send));
  86. }
  87. static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
  88. {
  89. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  90. static const unsigned char data_to_send[] = {
  91. 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
  92. };
  93. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  94. data_to_send, ARRAY_SIZE(data_to_send));
  95. }
  96. static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
  97. {
  98. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  99. static const unsigned char data_to_send[] = {
  100. 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
  101. };
  102. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  103. data_to_send, ARRAY_SIZE(data_to_send));
  104. }
  105. static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
  106. {
  107. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  108. static const unsigned char data_to_send[] = {
  109. 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
  110. };
  111. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  112. data_to_send, ARRAY_SIZE(data_to_send));
  113. }
  114. static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
  115. {
  116. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  117. static const unsigned char data_to_send[] = {
  118. 0xe3, 0x40
  119. };
  120. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
  121. ARRAY_SIZE(data_to_send));
  122. }
  123. static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
  124. {
  125. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  126. static const unsigned char data_to_send[] = {
  127. 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
  128. };
  129. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  130. data_to_send, ARRAY_SIZE(data_to_send));
  131. }
  132. static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
  133. {
  134. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  135. static const unsigned char data_to_send[] = {
  136. 0xb1, 0x04, 0x00
  137. };
  138. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  139. data_to_send, ARRAY_SIZE(data_to_send));
  140. }
  141. static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
  142. {
  143. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  144. static const unsigned char data_to_send[] = {
  145. 0x29, 0x00
  146. };
  147. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
  148. ARRAY_SIZE(data_to_send));
  149. }
  150. static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
  151. {
  152. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  153. static const unsigned char data_to_send[] = {
  154. 0x11, 0x00
  155. };
  156. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
  157. ARRAY_SIZE(data_to_send));
  158. }
  159. static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
  160. {
  161. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  162. static const unsigned char data_to_send[] = {
  163. 0xf0, 0x5a, 0x5a
  164. };
  165. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  166. data_to_send, ARRAY_SIZE(data_to_send));
  167. }
  168. static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
  169. {
  170. struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
  171. static const unsigned char data_to_send[] = {
  172. 0xf1, 0x5a, 0x5a
  173. };
  174. ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
  175. data_to_send, ARRAY_SIZE(data_to_send));
  176. }
  177. static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
  178. {
  179. /*
  180. * in case of setting gamma and panel condition at first,
  181. * it shuold be setting like below.
  182. * set_gamma() -> set_panel_condition()
  183. */
  184. s6e8ax0_apply_level1_key(dsim_dev);
  185. s6e8ax0_apply_mtp_key(dsim_dev);
  186. s6e8ax0_sleep_out(dsim_dev);
  187. mdelay(5);
  188. s6e8ax0_panel_cond(dsim_dev);
  189. s6e8ax0_display_cond(dsim_dev);
  190. s6e8ax0_gamma_cond(dsim_dev);
  191. s6e8ax0_gamma_update(dsim_dev);
  192. s6e8ax0_etc_source_control(dsim_dev);
  193. s6e8ax0_elvss_set(dsim_dev);
  194. s6e8ax0_etc_pentile_control(dsim_dev);
  195. s6e8ax0_etc_mipi_control1(dsim_dev);
  196. s6e8ax0_etc_mipi_control2(dsim_dev);
  197. s6e8ax0_etc_power_control(dsim_dev);
  198. s6e8ax0_etc_mipi_control3(dsim_dev);
  199. s6e8ax0_etc_mipi_control4(dsim_dev);
  200. }
  201. static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
  202. {
  203. s6e8ax0_panel_init(dsim_dev);
  204. return 0;
  205. }
  206. static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
  207. {
  208. s6e8ax0_display_on(dsim_dev);
  209. }
  210. static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
  211. .name = "s6e8ax0",
  212. .id = -1,
  213. .mipi_panel_init = s6e8ax0_panel_set,
  214. .mipi_display_on = s6e8ax0_display_enable,
  215. };
  216. void s6e8ax0_init(void)
  217. {
  218. exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
  219. }