lpc32xx_ssp.c 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * LPC32xx SSP interface (SPI mode)
  4. *
  5. * (C) Copyright 2014 DENX Software Engineering GmbH
  6. * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
  7. */
  8. #include <common.h>
  9. #include <linux/compat.h>
  10. #include <asm/io.h>
  11. #include <malloc.h>
  12. #include <spi.h>
  13. #include <asm/arch/clk.h>
  14. /* SSP chip registers */
  15. struct ssp_regs {
  16. u32 cr0;
  17. u32 cr1;
  18. u32 data;
  19. u32 sr;
  20. u32 cpsr;
  21. u32 imsc;
  22. u32 ris;
  23. u32 mis;
  24. u32 icr;
  25. u32 dmacr;
  26. };
  27. /* CR1 register defines */
  28. #define SSP_CR1_SSP_ENABLE 0x0002
  29. /* SR register defines */
  30. #define SSP_SR_TNF 0x0002
  31. /* SSP status RX FIFO not empty bit */
  32. #define SSP_SR_RNE 0x0004
  33. /* lpc32xx spi slave */
  34. struct lpc32xx_spi_slave {
  35. struct spi_slave slave;
  36. struct ssp_regs *regs;
  37. };
  38. static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave(
  39. struct spi_slave *slave)
  40. {
  41. return container_of(slave, struct lpc32xx_spi_slave, slave);
  42. }
  43. /* the following is called in sequence by do_spi_xfer() */
  44. struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
  45. {
  46. struct lpc32xx_spi_slave *lslave;
  47. /* we only set up SSP0 for now, so ignore bus */
  48. if (mode & SPI_3WIRE) {
  49. pr_err("3-wire mode not supported");
  50. return NULL;
  51. }
  52. if (mode & SPI_SLAVE) {
  53. pr_err("slave mode not supported\n");
  54. return NULL;
  55. }
  56. if (mode & SPI_PREAMBLE) {
  57. pr_err("preamble byte skipping not supported\n");
  58. return NULL;
  59. }
  60. lslave = spi_alloc_slave(struct lpc32xx_spi_slave, bus, cs);
  61. if (!lslave) {
  62. printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n");
  63. return NULL;
  64. }
  65. lslave->regs = (struct ssp_regs *)SSP0_BASE;
  66. /*
  67. * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26.
  68. * Set SCR to 0 and CPSDVSR to 26.
  69. */
  70. writel(0x7, &lslave->regs->cr0); /* 8-bit chunks, SPI, 1 clk/bit */
  71. writel(26, &lslave->regs->cpsr); /* SSP clock = HCLK/26 = 500kbps */
  72. writel(0, &lslave->regs->imsc); /* do not raise any interrupts */
  73. writel(0, &lslave->regs->icr); /* clear any pending interrupt */
  74. writel(0, &lslave->regs->dmacr); /* do not do DMAs */
  75. writel(SSP_CR1_SSP_ENABLE, &lslave->regs->cr1); /* enable SSP0 */
  76. return &lslave->slave;
  77. }
  78. void spi_free_slave(struct spi_slave *slave)
  79. {
  80. struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave);
  81. debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32)lslave);
  82. free(lslave);
  83. }
  84. int spi_claim_bus(struct spi_slave *slave)
  85. {
  86. /* only one bus and slave so far, always available */
  87. return 0;
  88. }
  89. int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
  90. const void *dout, void *din, unsigned long flags)
  91. {
  92. struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave);
  93. int bytelen = bitlen >> 3;
  94. int idx_out = 0;
  95. int idx_in = 0;
  96. int start_time;
  97. start_time = get_timer(0);
  98. while ((idx_out < bytelen) || (idx_in < bytelen)) {
  99. int status = readl(&lslave->regs->sr);
  100. if ((idx_out < bytelen) && (status & SSP_SR_TNF))
  101. writel(((u8 *)dout)[idx_out++], &lslave->regs->data);
  102. if ((idx_in < bytelen) && (status & SSP_SR_RNE))
  103. ((u8 *)din)[idx_in++] = readl(&lslave->regs->data);
  104. if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT)
  105. return -1;
  106. }
  107. return 0;
  108. }
  109. void spi_release_bus(struct spi_slave *slave)
  110. {
  111. /* do nothing */
  112. }