serial_stm32.c 7.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
  4. * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
  5. */
  6. #include <common.h>
  7. #include <clk.h>
  8. #include <dm.h>
  9. #include <reset.h>
  10. #include <serial.h>
  11. #include <watchdog.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/stm32.h>
  14. #include "serial_stm32.h"
  15. #include <dm/device_compat.h>
  16. static void _stm32_serial_setbrg(fdt_addr_t base,
  17. struct stm32_uart_info *uart_info,
  18. u32 clock_rate,
  19. int baudrate)
  20. {
  21. bool stm32f4 = uart_info->stm32f4;
  22. u32 int_div, mantissa, fraction, oversampling;
  23. int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
  24. if (int_div < 16) {
  25. oversampling = 8;
  26. setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  27. } else {
  28. oversampling = 16;
  29. clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
  30. }
  31. mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
  32. fraction = int_div % oversampling;
  33. writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
  34. }
  35. static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
  36. {
  37. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  38. _stm32_serial_setbrg(plat->base, plat->uart_info,
  39. plat->clock_rate, baudrate);
  40. return 0;
  41. }
  42. static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
  43. {
  44. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  45. bool stm32f4 = plat->uart_info->stm32f4;
  46. u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
  47. u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
  48. u32 config = 0;
  49. uint parity = SERIAL_GET_PARITY(serial_config);
  50. uint bits = SERIAL_GET_BITS(serial_config);
  51. uint stop = SERIAL_GET_STOP(serial_config);
  52. /*
  53. * only parity config is implemented, check if other serial settings
  54. * are the default one.
  55. * (STM32F4 serial IP didn't support parity setting)
  56. */
  57. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
  58. return -ENOTSUPP; /* not supported in driver*/
  59. clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  60. /* update usart configuration (uart need to be disable)
  61. * PCE: parity check enable
  62. * PS : '0' : Even / '1' : Odd
  63. * M[1:0] = '00' : 8 Data bits
  64. * M[1:0] = '01' : 9 Data bits with parity
  65. */
  66. switch (parity) {
  67. default:
  68. case SERIAL_PAR_NONE:
  69. config = 0;
  70. break;
  71. case SERIAL_PAR_ODD:
  72. config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
  73. break;
  74. case SERIAL_PAR_EVEN:
  75. config = USART_CR1_PCE | USART_CR1_M0;
  76. break;
  77. }
  78. clrsetbits_le32(cr1,
  79. USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
  80. USART_CR1_M0,
  81. config);
  82. setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
  83. return 0;
  84. }
  85. static int stm32_serial_getc(struct udevice *dev)
  86. {
  87. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  88. bool stm32f4 = plat->uart_info->stm32f4;
  89. fdt_addr_t base = plat->base;
  90. u32 isr = readl(base + ISR_OFFSET(stm32f4));
  91. if ((isr & USART_ISR_RXNE) == 0)
  92. return -EAGAIN;
  93. if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
  94. if (!stm32f4)
  95. setbits_le32(base + ICR_OFFSET,
  96. USART_ICR_PCECF | USART_ICR_ORECF |
  97. USART_ICR_FECF);
  98. else
  99. readl(base + RDR_OFFSET(stm32f4));
  100. return -EIO;
  101. }
  102. return readl(base + RDR_OFFSET(stm32f4));
  103. }
  104. static int _stm32_serial_putc(fdt_addr_t base,
  105. struct stm32_uart_info *uart_info,
  106. const char c)
  107. {
  108. bool stm32f4 = uart_info->stm32f4;
  109. if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
  110. return -EAGAIN;
  111. writel(c, base + TDR_OFFSET(stm32f4));
  112. return 0;
  113. }
  114. static int stm32_serial_putc(struct udevice *dev, const char c)
  115. {
  116. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  117. return _stm32_serial_putc(plat->base, plat->uart_info, c);
  118. }
  119. static int stm32_serial_pending(struct udevice *dev, bool input)
  120. {
  121. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  122. bool stm32f4 = plat->uart_info->stm32f4;
  123. fdt_addr_t base = plat->base;
  124. if (input)
  125. return readl(base + ISR_OFFSET(stm32f4)) &
  126. USART_ISR_RXNE ? 1 : 0;
  127. else
  128. return readl(base + ISR_OFFSET(stm32f4)) &
  129. USART_ISR_TXE ? 0 : 1;
  130. }
  131. static void _stm32_serial_init(fdt_addr_t base,
  132. struct stm32_uart_info *uart_info)
  133. {
  134. bool stm32f4 = uart_info->stm32f4;
  135. u8 uart_enable_bit = uart_info->uart_enable_bit;
  136. /* Disable uart-> enable fifo -> enable uart */
  137. clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
  138. BIT(uart_enable_bit));
  139. if (uart_info->has_fifo)
  140. setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
  141. setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
  142. BIT(uart_enable_bit));
  143. }
  144. static int stm32_serial_probe(struct udevice *dev)
  145. {
  146. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  147. struct clk clk;
  148. struct reset_ctl reset;
  149. int ret;
  150. plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
  151. ret = clk_get_by_index(dev, 0, &clk);
  152. if (ret < 0)
  153. return ret;
  154. ret = clk_enable(&clk);
  155. if (ret) {
  156. dev_err(dev, "failed to enable clock\n");
  157. return ret;
  158. }
  159. ret = reset_get_by_index(dev, 0, &reset);
  160. if (!ret) {
  161. reset_assert(&reset);
  162. udelay(2);
  163. reset_deassert(&reset);
  164. }
  165. plat->clock_rate = clk_get_rate(&clk);
  166. if (!plat->clock_rate) {
  167. clk_disable(&clk);
  168. return -EINVAL;
  169. };
  170. _stm32_serial_init(plat->base, plat->uart_info);
  171. return 0;
  172. }
  173. static const struct udevice_id stm32_serial_id[] = {
  174. { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
  175. { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
  176. { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
  177. {}
  178. };
  179. static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
  180. {
  181. struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
  182. plat->base = devfdt_get_addr(dev);
  183. if (plat->base == FDT_ADDR_T_NONE)
  184. return -EINVAL;
  185. return 0;
  186. }
  187. static const struct dm_serial_ops stm32_serial_ops = {
  188. .putc = stm32_serial_putc,
  189. .pending = stm32_serial_pending,
  190. .getc = stm32_serial_getc,
  191. .setbrg = stm32_serial_setbrg,
  192. .setconfig = stm32_serial_setconfig
  193. };
  194. U_BOOT_DRIVER(serial_stm32) = {
  195. .name = "serial_stm32",
  196. .id = UCLASS_SERIAL,
  197. .of_match = of_match_ptr(stm32_serial_id),
  198. .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
  199. .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
  200. .ops = &stm32_serial_ops,
  201. .probe = stm32_serial_probe,
  202. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  203. .flags = DM_FLAG_PRE_RELOC,
  204. #endif
  205. };
  206. #ifdef CONFIG_DEBUG_UART_STM32
  207. #include <debug_uart.h>
  208. static inline struct stm32_uart_info *_debug_uart_info(void)
  209. {
  210. struct stm32_uart_info *uart_info;
  211. #if defined(CONFIG_STM32F4)
  212. uart_info = &stm32f4_info;
  213. #elif defined(CONFIG_STM32F7)
  214. uart_info = &stm32f7_info;
  215. #else
  216. uart_info = &stm32h7_info;
  217. #endif
  218. return uart_info;
  219. }
  220. static inline void _debug_uart_init(void)
  221. {
  222. fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
  223. struct stm32_uart_info *uart_info = _debug_uart_info();
  224. _stm32_serial_init(base, uart_info);
  225. _stm32_serial_setbrg(base, uart_info,
  226. CONFIG_DEBUG_UART_CLOCK,
  227. CONFIG_BAUDRATE);
  228. }
  229. static inline void _debug_uart_putc(int c)
  230. {
  231. fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
  232. struct stm32_uart_info *uart_info = _debug_uart_info();
  233. while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
  234. ;
  235. }
  236. DEBUG_UART_FUNCS
  237. #endif