serial_sti_asc.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Support for Serial I/O using STMicroelectronics' on-chip ASC.
  4. *
  5. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  6. * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
  7. */
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <serial.h>
  11. #include <asm/io.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. #define BAUDMODE 0x00001000
  14. #define RXENABLE 0x00000100
  15. #define RUN 0x00000080
  16. #define MODE 0x00000001
  17. #define MODE_8BIT 0x0001
  18. #define STOP_1BIT 0x0008
  19. #define PARITYODD 0x0020
  20. #define STA_TF BIT(9)
  21. #define STA_RBF BIT(0)
  22. struct sti_asc_uart {
  23. u32 baudrate;
  24. u32 txbuf;
  25. u32 rxbuf;
  26. u32 control;
  27. u32 inten;
  28. u32 status;
  29. u32 guardtime;
  30. u32 timeout;
  31. u32 txreset;
  32. u32 rxreset;
  33. };
  34. struct sti_asc_serial {
  35. /* address of registers in physical memory */
  36. struct sti_asc_uart *regs;
  37. };
  38. /* Values for the BAUDRATE Register */
  39. #define PCLK (200ul * 1000000ul)
  40. #define BAUDRATE_VAL_M0(bps) (PCLK / (16 * (bps)))
  41. #define BAUDRATE_VAL_M1(bps) ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
  42. /*
  43. * MODE 0
  44. * ICCLK
  45. * ASCBaudRate = ----------------
  46. * baudrate * 16
  47. *
  48. * MODE 1
  49. * baudrate * 16 * 2^16
  50. * ASCBaudRate = ------------------------
  51. * ICCLK
  52. *
  53. * NOTE:
  54. * Mode 1 should be used for baudrates of 19200, and above, as it
  55. * has a lower deviation error than Mode 0 for higher frequencies.
  56. * Mode 0 should be used for all baudrates below 19200.
  57. */
  58. static int sti_asc_pending(struct udevice *dev, bool input)
  59. {
  60. struct sti_asc_serial *priv = dev_get_priv(dev);
  61. struct sti_asc_uart *const uart = priv->regs;
  62. unsigned long status;
  63. status = readl(&uart->status);
  64. if (input)
  65. return status & STA_RBF;
  66. else
  67. return status & STA_TF;
  68. }
  69. static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
  70. {
  71. unsigned long val;
  72. int t, mode = 1;
  73. switch (baudrate) {
  74. case 9600:
  75. t = BAUDRATE_VAL_M0(9600);
  76. mode = 0;
  77. break;
  78. case 19200:
  79. t = BAUDRATE_VAL_M1(19200);
  80. break;
  81. case 38400:
  82. t = BAUDRATE_VAL_M1(38400);
  83. break;
  84. case 57600:
  85. t = BAUDRATE_VAL_M1(57600);
  86. break;
  87. default:
  88. debug("ASC: unsupported baud rate: %d, using 115200 instead.\n",
  89. baudrate);
  90. case 115200:
  91. t = BAUDRATE_VAL_M1(115200);
  92. break;
  93. }
  94. /* disable the baudrate generator */
  95. val = readl(&uart->control);
  96. writel(val & ~RUN, &uart->control);
  97. /* set baud generator reload value */
  98. writel(t, &uart->baudrate);
  99. /* reset the RX & TX buffers */
  100. writel(1, &uart->txreset);
  101. writel(1, &uart->rxreset);
  102. /* set baud generator mode */
  103. if (mode)
  104. val |= BAUDMODE;
  105. /* finally, write value and enable ASC */
  106. writel(val, &uart->control);
  107. return 0;
  108. }
  109. /* called to adjust baud-rate */
  110. static int sti_asc_serial_setbrg(struct udevice *dev, int baudrate)
  111. {
  112. struct sti_asc_serial *priv = dev_get_priv(dev);
  113. struct sti_asc_uart *const uart = priv->regs;
  114. return _sti_asc_serial_setbrg(uart, baudrate);
  115. }
  116. /* blocking function, that returns next char */
  117. static int sti_asc_serial_getc(struct udevice *dev)
  118. {
  119. struct sti_asc_serial *priv = dev_get_priv(dev);
  120. struct sti_asc_uart *const uart = priv->regs;
  121. /* polling wait: for a char to be read */
  122. if (!sti_asc_pending(dev, true))
  123. return -EAGAIN;
  124. return readl(&uart->rxbuf);
  125. }
  126. /* write write out a single char */
  127. static int sti_asc_serial_putc(struct udevice *dev, const char c)
  128. {
  129. struct sti_asc_serial *priv = dev_get_priv(dev);
  130. struct sti_asc_uart *const uart = priv->regs;
  131. /* wait till safe to write next char */
  132. if (sti_asc_pending(dev, false))
  133. return -EAGAIN;
  134. /* finally, write next char */
  135. writel(c, &uart->txbuf);
  136. return 0;
  137. }
  138. /* initialize the ASC */
  139. static int sti_asc_serial_probe(struct udevice *dev)
  140. {
  141. struct sti_asc_serial *priv = dev_get_priv(dev);
  142. unsigned long val;
  143. fdt_addr_t base;
  144. base = devfdt_get_addr(dev);
  145. if (base == FDT_ADDR_T_NONE)
  146. return -EINVAL;
  147. priv->regs = (struct sti_asc_uart *)base;
  148. sti_asc_serial_setbrg(dev, gd->baudrate);
  149. /*
  150. * build up the value to be written to CONTROL
  151. * set character length, bit stop number, odd parity
  152. */
  153. val = RXENABLE | RUN | MODE_8BIT | STOP_1BIT | PARITYODD;
  154. writel(val, &priv->regs->control);
  155. return 0;
  156. }
  157. static const struct dm_serial_ops sti_asc_serial_ops = {
  158. .putc = sti_asc_serial_putc,
  159. .pending = sti_asc_pending,
  160. .getc = sti_asc_serial_getc,
  161. .setbrg = sti_asc_serial_setbrg,
  162. };
  163. static const struct udevice_id sti_serial_of_match[] = {
  164. { .compatible = "st,asc" },
  165. { }
  166. };
  167. U_BOOT_DRIVER(serial_sti_asc) = {
  168. .name = "serial_sti_asc",
  169. .id = UCLASS_SERIAL,
  170. .of_match = sti_serial_of_match,
  171. .ops = &sti_asc_serial_ops,
  172. .probe = sti_asc_serial_probe,
  173. .priv_auto_alloc_size = sizeof(struct sti_asc_serial),
  174. };