ns16550.c 17 KB

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  1. /*
  2. * COM1 NS16550 support
  3. * originally from linux source (arch/powerpc/boot/ns16550.c)
  4. * modified to use CONFIG_SYS_ISA_MEM and new defines
  5. */
  6. #include <clock_legacy.h>
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <ns16550.h>
  12. #include <reset.h>
  13. #include <serial.h>
  14. #include <watchdog.h>
  15. #include <linux/err.h>
  16. #include <linux/types.h>
  17. #include <asm/io.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  20. #define UART_MCRVAL (UART_MCR_DTR | \
  21. UART_MCR_RTS) /* RTS/DTR */
  22. #if !CONFIG_IS_ENABLED(DM_SERIAL)
  23. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  24. #define serial_out(x, y) outb(x, (ulong)y)
  25. #define serial_in(y) inb((ulong)y)
  26. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
  27. #define serial_out(x, y) out_be32(y, x)
  28. #define serial_in(y) in_be32(y)
  29. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
  30. #define serial_out(x, y) out_le32(y, x)
  31. #define serial_in(y) in_le32(y)
  32. #else
  33. #define serial_out(x, y) writeb(x, y)
  34. #define serial_in(y) readb(y)
  35. #endif
  36. #endif /* !CONFIG_DM_SERIAL */
  37. #if defined(CONFIG_SOC_KEYSTONE)
  38. #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
  39. #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
  40. #undef UART_MCRVAL
  41. #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
  42. #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
  43. #else
  44. #define UART_MCRVAL (UART_MCR_RTS)
  45. #endif
  46. #endif
  47. #ifndef CONFIG_SYS_NS16550_IER
  48. #define CONFIG_SYS_NS16550_IER 0x00
  49. #endif /* CONFIG_SYS_NS16550_IER */
  50. static inline void serial_out_shift(void *addr, int shift, int value)
  51. {
  52. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  53. outb(value, (ulong)addr);
  54. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  55. out_le32(addr, value);
  56. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  57. out_be32(addr, value);
  58. #elif defined(CONFIG_SYS_NS16550_MEM32)
  59. writel(value, addr);
  60. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  61. writeb(value, addr + (1 << shift) - 1);
  62. #else
  63. writeb(value, addr);
  64. #endif
  65. }
  66. static inline int serial_in_shift(void *addr, int shift)
  67. {
  68. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  69. return inb((ulong)addr);
  70. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  71. return in_le32(addr);
  72. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  73. return in_be32(addr);
  74. #elif defined(CONFIG_SYS_NS16550_MEM32)
  75. return readl(addr);
  76. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  77. return readb(addr + (1 << shift) - 1);
  78. #else
  79. return readb(addr);
  80. #endif
  81. }
  82. #if CONFIG_IS_ENABLED(DM_SERIAL)
  83. #ifndef CONFIG_SYS_NS16550_CLK
  84. #define CONFIG_SYS_NS16550_CLK 0
  85. #endif
  86. /*
  87. * Use this #ifdef for now since many platforms don't define in(), out(),
  88. * out_le32(), etc. but we don't have #defines to indicate this.
  89. *
  90. * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
  91. * on a platform
  92. */
  93. #ifdef CONFIG_NS16550_DYNAMIC
  94. static void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  95. int value)
  96. {
  97. if (plat->flags & NS16550_FLAG_IO) {
  98. outb(value, addr);
  99. } else if (plat->reg_width == 4) {
  100. if (plat->flags & NS16550_FLAG_ENDIAN) {
  101. if (plat->flags & NS16550_FLAG_BE)
  102. out_be32(addr, value);
  103. else
  104. out_le32(addr, value);
  105. } else {
  106. writel(value, addr);
  107. }
  108. } else if (plat->flags & NS16550_FLAG_BE) {
  109. writeb(value, addr + (1 << plat->reg_shift) - 1);
  110. } else {
  111. writeb(value, addr);
  112. }
  113. }
  114. static int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  115. {
  116. if (plat->flags & NS16550_FLAG_IO) {
  117. return inb(addr);
  118. } else if (plat->reg_width == 4) {
  119. if (plat->flags & NS16550_FLAG_ENDIAN) {
  120. if (plat->flags & NS16550_FLAG_BE)
  121. return in_be32(addr);
  122. else
  123. return in_le32(addr);
  124. } else {
  125. return readl(addr);
  126. }
  127. } else if (plat->flags & NS16550_FLAG_BE) {
  128. return readb(addr + (1 << plat->reg_shift) - 1);
  129. } else {
  130. return readb(addr);
  131. }
  132. }
  133. #else
  134. static inline void serial_out_dynamic(struct ns16550_platdata *plat, u8 *addr,
  135. int value)
  136. {
  137. }
  138. static inline int serial_in_dynamic(struct ns16550_platdata *plat, u8 *addr)
  139. {
  140. return 0;
  141. }
  142. #endif /* CONFIG_NS16550_DYNAMIC */
  143. static void ns16550_writeb(NS16550_t port, int offset, int value)
  144. {
  145. struct ns16550_platdata *plat = port->plat;
  146. unsigned char *addr;
  147. offset *= 1 << plat->reg_shift;
  148. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  149. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  150. serial_out_dynamic(plat, addr, value);
  151. else
  152. serial_out_shift(addr, plat->reg_shift, value);
  153. }
  154. static int ns16550_readb(NS16550_t port, int offset)
  155. {
  156. struct ns16550_platdata *plat = port->plat;
  157. unsigned char *addr;
  158. offset *= 1 << plat->reg_shift;
  159. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  160. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  161. return serial_in_dynamic(plat, addr);
  162. else
  163. return serial_in_shift(addr, plat->reg_shift);
  164. }
  165. static u32 ns16550_getfcr(NS16550_t port)
  166. {
  167. struct ns16550_platdata *plat = port->plat;
  168. return plat->fcr;
  169. }
  170. /* We can clean these up once everything is moved to driver model */
  171. #define serial_out(value, addr) \
  172. ns16550_writeb(com_port, \
  173. (unsigned char *)addr - (unsigned char *)com_port, value)
  174. #define serial_in(addr) \
  175. ns16550_readb(com_port, \
  176. (unsigned char *)addr - (unsigned char *)com_port)
  177. #else
  178. static u32 ns16550_getfcr(NS16550_t port)
  179. {
  180. return UART_FCR_DEFVAL;
  181. }
  182. #endif
  183. int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
  184. {
  185. const unsigned int mode_x_div = 16;
  186. return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
  187. }
  188. static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
  189. {
  190. /* to keep serial format, read lcr before writing BKSE */
  191. int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
  192. serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
  193. serial_out(baud_divisor & 0xff, &com_port->dll);
  194. serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
  195. serial_out(lcr_val, &com_port->lcr);
  196. }
  197. void NS16550_init(NS16550_t com_port, int baud_divisor)
  198. {
  199. #if (defined(CONFIG_SPL_BUILD) && \
  200. (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
  201. /*
  202. * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
  203. * before SPL starts only THRE bit is set. We have to empty the
  204. * transmitter before initialization starts.
  205. */
  206. if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
  207. == UART_LSR_THRE) {
  208. if (baud_divisor != -1)
  209. NS16550_setbrg(com_port, baud_divisor);
  210. else {
  211. // Re-use old baud rate divisor to flush transmit reg.
  212. const int dll = serial_in(&com_port->dll);
  213. const int dlm = serial_in(&com_port->dlm);
  214. const int divisor = dll | (dlm << 8);
  215. NS16550_setbrg(com_port, divisor);
  216. }
  217. serial_out(0, &com_port->mdr1);
  218. }
  219. #endif
  220. while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
  221. ;
  222. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  223. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
  224. serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
  225. #endif
  226. serial_out(UART_MCRVAL, &com_port->mcr);
  227. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  228. /* initialize serial config to 8N1 before writing baudrate */
  229. serial_out(UART_LCRVAL, &com_port->lcr);
  230. if (baud_divisor != -1)
  231. NS16550_setbrg(com_port, baud_divisor);
  232. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
  233. defined(CONFIG_OMAP_SERIAL)
  234. /* /16 is proper to hit 115200 with 48MHz */
  235. serial_out(0, &com_port->mdr1);
  236. #endif
  237. #if defined(CONFIG_SOC_KEYSTONE)
  238. serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
  239. #endif
  240. }
  241. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  242. void NS16550_reinit(NS16550_t com_port, int baud_divisor)
  243. {
  244. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  245. NS16550_setbrg(com_port, 0);
  246. serial_out(UART_MCRVAL, &com_port->mcr);
  247. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  248. NS16550_setbrg(com_port, baud_divisor);
  249. }
  250. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  251. void NS16550_putc(NS16550_t com_port, char c)
  252. {
  253. while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
  254. ;
  255. serial_out(c, &com_port->thr);
  256. /*
  257. * Call watchdog_reset() upon newline. This is done here in putc
  258. * since the environment code uses a single puts() to print the complete
  259. * environment upon "printenv". So we can't put this watchdog call
  260. * in puts().
  261. */
  262. if (c == '\n')
  263. WATCHDOG_RESET();
  264. }
  265. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  266. char NS16550_getc(NS16550_t com_port)
  267. {
  268. while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
  269. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
  270. extern void usbtty_poll(void);
  271. usbtty_poll();
  272. #endif
  273. WATCHDOG_RESET();
  274. }
  275. return serial_in(&com_port->rbr);
  276. }
  277. int NS16550_tstc(NS16550_t com_port)
  278. {
  279. return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
  280. }
  281. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  282. #ifdef CONFIG_DEBUG_UART_NS16550
  283. #include <debug_uart.h>
  284. static inline void _debug_uart_init(void)
  285. {
  286. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  287. int baud_divisor;
  288. /*
  289. * We copy the code from above because it is already horribly messy.
  290. * Trying to refactor to nicely remove the duplication doesn't seem
  291. * feasible. The better fix is to move all users of this driver to
  292. * driver model.
  293. */
  294. baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
  295. CONFIG_BAUDRATE);
  296. serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
  297. serial_dout(&com_port->mcr, UART_MCRVAL);
  298. serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
  299. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  300. serial_dout(&com_port->dll, baud_divisor & 0xff);
  301. serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
  302. serial_dout(&com_port->lcr, UART_LCRVAL);
  303. }
  304. static inline int NS16550_read_baud_divisor(struct NS16550 *com_port)
  305. {
  306. int ret;
  307. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  308. ret = serial_din(&com_port->dll) & 0xff;
  309. ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
  310. serial_dout(&com_port->lcr, UART_LCRVAL);
  311. return ret;
  312. }
  313. static inline void _debug_uart_putc(int ch)
  314. {
  315. struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
  316. while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
  317. #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
  318. if (!NS16550_read_baud_divisor(com_port))
  319. return;
  320. #endif
  321. }
  322. serial_dout(&com_port->thr, ch);
  323. }
  324. DEBUG_UART_FUNCS
  325. #endif
  326. #if CONFIG_IS_ENABLED(DM_SERIAL)
  327. static int ns16550_serial_putc(struct udevice *dev, const char ch)
  328. {
  329. struct NS16550 *const com_port = dev_get_priv(dev);
  330. if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
  331. return -EAGAIN;
  332. serial_out(ch, &com_port->thr);
  333. /*
  334. * Call watchdog_reset() upon newline. This is done here in putc
  335. * since the environment code uses a single puts() to print the complete
  336. * environment upon "printenv". So we can't put this watchdog call
  337. * in puts().
  338. */
  339. if (ch == '\n')
  340. WATCHDOG_RESET();
  341. return 0;
  342. }
  343. static int ns16550_serial_pending(struct udevice *dev, bool input)
  344. {
  345. struct NS16550 *const com_port = dev_get_priv(dev);
  346. if (input)
  347. return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
  348. else
  349. return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
  350. }
  351. static int ns16550_serial_getc(struct udevice *dev)
  352. {
  353. struct NS16550 *const com_port = dev_get_priv(dev);
  354. if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
  355. return -EAGAIN;
  356. return serial_in(&com_port->rbr);
  357. }
  358. static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
  359. {
  360. struct NS16550 *const com_port = dev_get_priv(dev);
  361. struct ns16550_platdata *plat = com_port->plat;
  362. int clock_divisor;
  363. clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
  364. NS16550_setbrg(com_port, clock_divisor);
  365. return 0;
  366. }
  367. static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
  368. {
  369. struct NS16550 *const com_port = dev_get_priv(dev);
  370. int lcr_val = UART_LCR_WLS_8;
  371. uint parity = SERIAL_GET_PARITY(serial_config);
  372. uint bits = SERIAL_GET_BITS(serial_config);
  373. uint stop = SERIAL_GET_STOP(serial_config);
  374. /*
  375. * only parity config is implemented, check if other serial settings
  376. * are the default one.
  377. */
  378. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
  379. return -ENOTSUPP; /* not supported in driver*/
  380. switch (parity) {
  381. case SERIAL_PAR_NONE:
  382. /* no bits to add */
  383. break;
  384. case SERIAL_PAR_ODD:
  385. lcr_val |= UART_LCR_PEN;
  386. break;
  387. case SERIAL_PAR_EVEN:
  388. lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
  389. break;
  390. default:
  391. return -ENOTSUPP; /* not supported in driver*/
  392. }
  393. serial_out(lcr_val, &com_port->lcr);
  394. return 0;
  395. }
  396. static int ns16550_serial_getinfo(struct udevice *dev,
  397. struct serial_device_info *info)
  398. {
  399. struct NS16550 *const com_port = dev_get_priv(dev);
  400. struct ns16550_platdata *plat = com_port->plat;
  401. info->type = SERIAL_CHIP_16550_COMPATIBLE;
  402. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  403. info->addr_space = SERIAL_ADDRESS_SPACE_IO;
  404. #else
  405. info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
  406. #endif
  407. info->addr = plat->base;
  408. info->reg_width = plat->reg_width;
  409. info->reg_shift = plat->reg_shift;
  410. info->reg_offset = plat->reg_offset;
  411. info->clock = plat->clock;
  412. return 0;
  413. }
  414. static int ns16550_serial_assign_base(struct ns16550_platdata *plat, ulong base)
  415. {
  416. if (base == FDT_ADDR_T_NONE)
  417. return -EINVAL;
  418. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  419. plat->base = base;
  420. #else
  421. plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
  422. #endif
  423. return 0;
  424. }
  425. int ns16550_serial_probe(struct udevice *dev)
  426. {
  427. struct ns16550_platdata *plat = dev->platdata;
  428. struct NS16550 *const com_port = dev_get_priv(dev);
  429. struct reset_ctl_bulk reset_bulk;
  430. fdt_addr_t addr;
  431. int ret;
  432. /*
  433. * If we are on PCI bus, either directly attached to a PCI root port,
  434. * or via a PCI bridge, assign platdata->base before probing hardware.
  435. */
  436. if (device_is_on_pci_bus(dev)) {
  437. addr = devfdt_get_addr_pci(dev);
  438. ret = ns16550_serial_assign_base(plat, addr);
  439. if (ret)
  440. return ret;
  441. }
  442. ret = reset_get_bulk(dev, &reset_bulk);
  443. if (!ret)
  444. reset_deassert_bulk(&reset_bulk);
  445. com_port->plat = dev_get_platdata(dev);
  446. NS16550_init(com_port, -1);
  447. return 0;
  448. }
  449. #if CONFIG_IS_ENABLED(OF_CONTROL)
  450. enum {
  451. PORT_NS16550 = 0,
  452. PORT_JZ4780,
  453. };
  454. #endif
  455. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  456. int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
  457. {
  458. struct ns16550_platdata *plat = dev->platdata;
  459. const u32 port_type = dev_get_driver_data(dev);
  460. fdt_addr_t addr;
  461. struct clk clk;
  462. int err;
  463. addr = dev_read_addr(dev);
  464. err = ns16550_serial_assign_base(plat, addr);
  465. if (err && !device_is_on_pci_bus(dev))
  466. return err;
  467. plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
  468. plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
  469. plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
  470. err = clk_get_by_index(dev, 0, &clk);
  471. if (!err) {
  472. err = clk_get_rate(&clk);
  473. if (!IS_ERR_VALUE(err))
  474. plat->clock = err;
  475. } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
  476. debug("ns16550 failed to get clock\n");
  477. return err;
  478. }
  479. if (!plat->clock)
  480. plat->clock = dev_read_u32_default(dev, "clock-frequency",
  481. CONFIG_SYS_NS16550_CLK);
  482. if (!plat->clock) {
  483. debug("ns16550 clock not defined\n");
  484. return -EINVAL;
  485. }
  486. plat->fcr = UART_FCR_DEFVAL;
  487. if (port_type == PORT_JZ4780)
  488. plat->fcr |= UART_FCR_UME;
  489. return 0;
  490. }
  491. #endif
  492. const struct dm_serial_ops ns16550_serial_ops = {
  493. .putc = ns16550_serial_putc,
  494. .pending = ns16550_serial_pending,
  495. .getc = ns16550_serial_getc,
  496. .setbrg = ns16550_serial_setbrg,
  497. .setconfig = ns16550_serial_setconfig,
  498. .getinfo = ns16550_serial_getinfo,
  499. };
  500. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  501. /*
  502. * Please consider existing compatible strings before adding a new
  503. * one to keep this table compact. Or you may add a generic "ns16550"
  504. * compatible string to your dts.
  505. */
  506. static const struct udevice_id ns16550_serial_ids[] = {
  507. { .compatible = "ns16550", .data = PORT_NS16550 },
  508. { .compatible = "ns16550a", .data = PORT_NS16550 },
  509. { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
  510. { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
  511. { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
  512. {}
  513. };
  514. #endif /* OF_CONTROL && !OF_PLATDATA */
  515. #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
  516. /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
  517. #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
  518. U_BOOT_DRIVER(ns16550_serial) = {
  519. .name = "ns16550_serial",
  520. .id = UCLASS_SERIAL,
  521. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  522. .of_match = ns16550_serial_ids,
  523. .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
  524. .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
  525. #endif
  526. .priv_auto_alloc_size = sizeof(struct NS16550),
  527. .probe = ns16550_serial_probe,
  528. .ops = &ns16550_serial_ops,
  529. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  530. .flags = DM_FLAG_PRE_RELOC,
  531. #endif
  532. };
  533. #endif
  534. #endif /* SERIAL_PRESENT */
  535. #endif /* CONFIG_DM_SERIAL */