atmel_usart.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2004-2006 Atmel Corporation
  4. *
  5. * Modified to support C structur SoC access by
  6. * Andreas Bießmann <biessmann@corscience.de>
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <dm.h>
  11. #include <errno.h>
  12. #include <malloc.h>
  13. #include <watchdog.h>
  14. #include <serial.h>
  15. #include <debug_uart.h>
  16. #include <linux/compiler.h>
  17. #include <asm/io.h>
  18. #ifdef CONFIG_DM_SERIAL
  19. #include <asm/arch/atmel_serial.h>
  20. #endif
  21. #include <asm/arch/clk.h>
  22. #include <asm/arch/hardware.h>
  23. #include "atmel_usart.h"
  24. DECLARE_GLOBAL_DATA_PTR;
  25. #ifndef CONFIG_DM_SERIAL
  26. static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id,
  27. int baudrate)
  28. {
  29. unsigned long divisor;
  30. unsigned long usart_hz;
  31. /*
  32. * Master Clock
  33. * Baud Rate = --------------
  34. * 16 * CD
  35. */
  36. usart_hz = get_usart_clk_rate(id);
  37. divisor = (usart_hz / 16 + baudrate / 2) / baudrate;
  38. writel(USART3_BF(CD, divisor), &usart->brgr);
  39. }
  40. static void atmel_serial_init_internal(atmel_usart3_t *usart)
  41. {
  42. /*
  43. * Just in case: drain transmitter register
  44. * 1000us is enough for baudrate >= 9600
  45. */
  46. if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
  47. __udelay(1000);
  48. writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
  49. }
  50. static void atmel_serial_activate(atmel_usart3_t *usart)
  51. {
  52. writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
  53. | USART3_BF(USCLKS, USART3_USCLKS_MCK)
  54. | USART3_BF(CHRL, USART3_CHRL_8)
  55. | USART3_BF(PAR, USART3_PAR_NONE)
  56. | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
  57. &usart->mr);
  58. writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
  59. /* 100us is enough for the new settings to be settled */
  60. __udelay(100);
  61. }
  62. static void atmel_serial_setbrg(void)
  63. {
  64. atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE,
  65. CONFIG_USART_ID, gd->baudrate);
  66. }
  67. static int atmel_serial_init(void)
  68. {
  69. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  70. atmel_serial_init_internal(usart);
  71. serial_setbrg();
  72. atmel_serial_activate(usart);
  73. return 0;
  74. }
  75. static void atmel_serial_putc(char c)
  76. {
  77. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  78. if (c == '\n')
  79. serial_putc('\r');
  80. while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
  81. writel(c, &usart->thr);
  82. }
  83. static int atmel_serial_getc(void)
  84. {
  85. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  86. while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
  87. WATCHDOG_RESET();
  88. return readl(&usart->rhr);
  89. }
  90. static int atmel_serial_tstc(void)
  91. {
  92. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  93. return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
  94. }
  95. static struct serial_device atmel_serial_drv = {
  96. .name = "atmel_serial",
  97. .start = atmel_serial_init,
  98. .stop = NULL,
  99. .setbrg = atmel_serial_setbrg,
  100. .putc = atmel_serial_putc,
  101. .puts = default_serial_puts,
  102. .getc = atmel_serial_getc,
  103. .tstc = atmel_serial_tstc,
  104. };
  105. void atmel_serial_initialize(void)
  106. {
  107. serial_register(&atmel_serial_drv);
  108. }
  109. __weak struct serial_device *default_serial_console(void)
  110. {
  111. return &atmel_serial_drv;
  112. }
  113. #endif
  114. #ifdef CONFIG_DM_SERIAL
  115. enum serial_clk_type {
  116. CLK_TYPE_NORMAL = 0,
  117. CLK_TYPE_DBGU,
  118. };
  119. struct atmel_serial_priv {
  120. atmel_usart3_t *usart;
  121. ulong usart_clk_rate;
  122. };
  123. static void _atmel_serial_set_brg(atmel_usart3_t *usart,
  124. ulong usart_clk_rate, int baudrate)
  125. {
  126. unsigned long divisor;
  127. divisor = (usart_clk_rate / 16 + baudrate / 2) / baudrate;
  128. writel(USART3_BF(CD, divisor), &usart->brgr);
  129. }
  130. void _atmel_serial_init(atmel_usart3_t *usart,
  131. ulong usart_clk_rate, int baudrate)
  132. {
  133. writel(USART3_BIT(RXDIS) | USART3_BIT(TXDIS), &usart->cr);
  134. writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) |
  135. USART3_BF(USCLKS, USART3_USCLKS_MCK) |
  136. USART3_BF(CHRL, USART3_CHRL_8) |
  137. USART3_BF(PAR, USART3_PAR_NONE) |
  138. USART3_BF(NBSTOP, USART3_NBSTOP_1)), &usart->mr);
  139. _atmel_serial_set_brg(usart, usart_clk_rate, baudrate);
  140. writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
  141. writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
  142. }
  143. int atmel_serial_setbrg(struct udevice *dev, int baudrate)
  144. {
  145. struct atmel_serial_priv *priv = dev_get_priv(dev);
  146. _atmel_serial_set_brg(priv->usart, priv->usart_clk_rate, baudrate);
  147. return 0;
  148. }
  149. static int atmel_serial_getc(struct udevice *dev)
  150. {
  151. struct atmel_serial_priv *priv = dev_get_priv(dev);
  152. if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY)))
  153. return -EAGAIN;
  154. return readl(&priv->usart->rhr);
  155. }
  156. static int atmel_serial_putc(struct udevice *dev, const char ch)
  157. {
  158. struct atmel_serial_priv *priv = dev_get_priv(dev);
  159. if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY)))
  160. return -EAGAIN;
  161. writel(ch, &priv->usart->thr);
  162. return 0;
  163. }
  164. static int atmel_serial_pending(struct udevice *dev, bool input)
  165. {
  166. struct atmel_serial_priv *priv = dev_get_priv(dev);
  167. uint32_t csr = readl(&priv->usart->csr);
  168. if (input)
  169. return csr & USART3_BIT(RXRDY) ? 1 : 0;
  170. else
  171. return csr & USART3_BIT(TXEMPTY) ? 0 : 1;
  172. }
  173. static const struct dm_serial_ops atmel_serial_ops = {
  174. .putc = atmel_serial_putc,
  175. .pending = atmel_serial_pending,
  176. .getc = atmel_serial_getc,
  177. .setbrg = atmel_serial_setbrg,
  178. };
  179. #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_CLK)
  180. static int atmel_serial_enable_clk(struct udevice *dev)
  181. {
  182. struct atmel_serial_priv *priv = dev_get_priv(dev);
  183. /* Use fixed clock value in SPL */
  184. priv->usart_clk_rate = CONFIG_SPL_UART_CLOCK;
  185. return 0;
  186. }
  187. #else
  188. static int atmel_serial_enable_clk(struct udevice *dev)
  189. {
  190. struct atmel_serial_priv *priv = dev_get_priv(dev);
  191. struct clk clk;
  192. ulong clk_rate;
  193. int ret;
  194. ret = clk_get_by_index(dev, 0, &clk);
  195. if (ret)
  196. return -EINVAL;
  197. if (dev_get_driver_data(dev) == CLK_TYPE_NORMAL) {
  198. ret = clk_enable(&clk);
  199. if (ret)
  200. return ret;
  201. }
  202. clk_rate = clk_get_rate(&clk);
  203. if (!clk_rate)
  204. return -EINVAL;
  205. priv->usart_clk_rate = clk_rate;
  206. clk_free(&clk);
  207. return 0;
  208. }
  209. #endif
  210. static int atmel_serial_probe(struct udevice *dev)
  211. {
  212. struct atmel_serial_platdata *plat = dev->platdata;
  213. struct atmel_serial_priv *priv = dev_get_priv(dev);
  214. int ret;
  215. #if CONFIG_IS_ENABLED(OF_CONTROL)
  216. fdt_addr_t addr_base;
  217. addr_base = devfdt_get_addr(dev);
  218. if (addr_base == FDT_ADDR_T_NONE)
  219. return -ENODEV;
  220. plat->base_addr = (uint32_t)addr_base;
  221. #endif
  222. priv->usart = (atmel_usart3_t *)plat->base_addr;
  223. ret = atmel_serial_enable_clk(dev);
  224. if (ret)
  225. return ret;
  226. _atmel_serial_init(priv->usart, priv->usart_clk_rate, gd->baudrate);
  227. return 0;
  228. }
  229. #if CONFIG_IS_ENABLED(OF_CONTROL)
  230. static const struct udevice_id atmel_serial_ids[] = {
  231. {
  232. .compatible = "atmel,at91sam9260-dbgu",
  233. .data = CLK_TYPE_DBGU,
  234. },
  235. {
  236. .compatible = "atmel,at91sam9260-usart",
  237. .data = CLK_TYPE_NORMAL,
  238. },
  239. { }
  240. };
  241. #endif
  242. U_BOOT_DRIVER(serial_atmel) = {
  243. .name = "serial_atmel",
  244. .id = UCLASS_SERIAL,
  245. #if CONFIG_IS_ENABLED(OF_CONTROL)
  246. .of_match = atmel_serial_ids,
  247. .platdata_auto_alloc_size = sizeof(struct atmel_serial_platdata),
  248. #endif
  249. .probe = atmel_serial_probe,
  250. .ops = &atmel_serial_ops,
  251. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  252. .flags = DM_FLAG_PRE_RELOC,
  253. #endif
  254. .priv_auto_alloc_size = sizeof(struct atmel_serial_priv),
  255. };
  256. #endif
  257. #ifdef CONFIG_DEBUG_UART_ATMEL
  258. static inline void _debug_uart_init(void)
  259. {
  260. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
  261. _atmel_serial_init(usart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
  262. }
  263. static inline void _debug_uart_putc(int ch)
  264. {
  265. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
  266. while (!(readl(&usart->csr) & USART3_BIT(TXRDY)))
  267. ;
  268. writel(ch, &usart->thr);
  269. }
  270. DEBUG_UART_FUNCS
  271. #endif