cyclon2.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2006
  4. * Heiko Schocher, hs@denx.de
  5. * Based on ACE1XK.c
  6. */
  7. #include <common.h> /* core U-Boot definitions */
  8. #include <altera.h>
  9. #include <ACEX1K.h> /* ACEX device family */
  10. /* Define FPGA_DEBUG to get debug printf's */
  11. #ifdef FPGA_DEBUG
  12. #define PRINTF(fmt, args...) printf(fmt, ##args)
  13. #else
  14. #define PRINTF(fmt, args...)
  15. #endif
  16. /* Note: The assumption is that we cannot possibly run fast enough to
  17. * overrun the device (the Slave Parallel mode can free run at 50MHz).
  18. * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
  19. * the board config file to slow things down.
  20. */
  21. #ifndef CONFIG_FPGA_DELAY
  22. #define CONFIG_FPGA_DELAY()
  23. #endif
  24. #ifndef CONFIG_SYS_FPGA_WAIT
  25. #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ / 10 /* 100 ms */
  26. #endif
  27. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize);
  28. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize);
  29. /* static int CYC2_ps_info( Altera_desc *desc ); */
  30. /* ------------------------------------------------------------------------- */
  31. /* CYCLON2 Generic Implementation */
  32. int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
  33. {
  34. int ret_val = FPGA_FAIL;
  35. switch (desc->iface) {
  36. case passive_serial:
  37. PRINTF("%s: Launching Passive Serial Loader\n", __func__);
  38. ret_val = CYC2_ps_load(desc, buf, bsize);
  39. break;
  40. case fast_passive_parallel:
  41. /* Fast Passive Parallel (FPP) and PS only differ in what is
  42. * done in the write() callback. Use the existing PS load
  43. * function for FPP, too.
  44. */
  45. PRINTF("%s: Launching Fast Passive Parallel Loader\n",
  46. __func__);
  47. ret_val = CYC2_ps_load(desc, buf, bsize);
  48. break;
  49. /* Add new interface types here */
  50. default:
  51. printf("%s: Unsupported interface type, %d\n",
  52. __func__, desc->iface);
  53. }
  54. return ret_val;
  55. }
  56. int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
  57. {
  58. int ret_val = FPGA_FAIL;
  59. switch (desc->iface) {
  60. case passive_serial:
  61. PRINTF("%s: Launching Passive Serial Dump\n", __func__);
  62. ret_val = CYC2_ps_dump(desc, buf, bsize);
  63. break;
  64. /* Add new interface types here */
  65. default:
  66. printf("%s: Unsupported interface type, %d\n",
  67. __func__, desc->iface);
  68. }
  69. return ret_val;
  70. }
  71. int CYC2_info(Altera_desc *desc)
  72. {
  73. return FPGA_SUCCESS;
  74. }
  75. /* ------------------------------------------------------------------------- */
  76. /* CYCLON2 Passive Serial Generic Implementation */
  77. static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
  78. {
  79. int ret_val = FPGA_FAIL; /* assume the worst */
  80. Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
  81. int ret = 0;
  82. PRINTF("%s: start with interface functions @ 0x%p\n",
  83. __func__, fn);
  84. if (fn) {
  85. int cookie = desc->cookie; /* make a local copy */
  86. unsigned long ts; /* timestamp */
  87. PRINTF("%s: Function Table:\n"
  88. "ptr:\t0x%p\n"
  89. "struct: 0x%p\n"
  90. "config:\t0x%p\n"
  91. "status:\t0x%p\n"
  92. "write:\t0x%p\n"
  93. "done:\t0x%p\n\n",
  94. __func__, &fn, fn, fn->config, fn->status,
  95. fn->write, fn->done);
  96. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  97. printf("Loading FPGA Device %d...", cookie);
  98. #endif
  99. /*
  100. * Run the pre configuration function if there is one.
  101. */
  102. if (*fn->pre)
  103. (*fn->pre) (cookie);
  104. /* Establish the initial state */
  105. (*fn->config) (false, true, cookie); /* De-assert nCONFIG */
  106. udelay(100);
  107. (*fn->config) (true, true, cookie); /* Assert nCONFIG */
  108. udelay(2); /* T_cfg > 2us */
  109. /* Wait for nSTATUS to be asserted */
  110. ts = get_timer(0); /* get current time */
  111. do {
  112. CONFIG_FPGA_DELAY();
  113. if (get_timer(ts) > CONFIG_SYS_FPGA_WAIT) {
  114. /* check the time */
  115. puts("** Timeout waiting for STATUS to go high.\n");
  116. (*fn->abort) (cookie);
  117. return FPGA_FAIL;
  118. }
  119. } while (!(*fn->status) (cookie));
  120. /* Get ready for the burn */
  121. CONFIG_FPGA_DELAY();
  122. ret = (*fn->write) (buf, bsize, true, cookie);
  123. if (ret) {
  124. puts("** Write failed.\n");
  125. (*fn->abort) (cookie);
  126. return FPGA_FAIL;
  127. }
  128. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  129. puts(" OK? ...");
  130. #endif
  131. CONFIG_FPGA_DELAY();
  132. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  133. putc(' '); /* terminate the dotted line */
  134. #endif
  135. /*
  136. * Checking FPGA's CONF_DONE signal - correctly booted ?
  137. */
  138. if (!(*fn->done) (cookie)) {
  139. puts("** Booting failed! CONF_DONE is still deasserted.\n");
  140. (*fn->abort) (cookie);
  141. return FPGA_FAIL;
  142. }
  143. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  144. puts(" OK\n");
  145. #endif
  146. ret_val = FPGA_SUCCESS;
  147. #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
  148. if (ret_val == FPGA_SUCCESS)
  149. puts("Done.\n");
  150. else
  151. puts("Fail.\n");
  152. #endif
  153. /*
  154. * Run the post configuration function if there is one.
  155. */
  156. if (*fn->post)
  157. (*fn->post) (cookie);
  158. } else {
  159. printf("%s: NULL Interface function table!\n", __func__);
  160. }
  161. return ret_val;
  162. }
  163. static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)
  164. {
  165. /* Readback is only available through the Slave Parallel and */
  166. /* boundary-scan interfaces. */
  167. printf("%s: Passive Serial Dumping is unavailable\n", __func__);
  168. return FPGA_FAIL;
  169. }