imx8_cpu.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #include <common.h>
  6. #include <cpu.h>
  7. #include <dm.h>
  8. #include <thermal.h>
  9. #include <asm/arch/sci/sci.h>
  10. #include <asm/arch/sys_proto.h>
  11. #include <asm/arch-imx/cpu.h>
  12. #include <asm/armv8/cpu.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. struct cpu_imx_platdata {
  15. const char *name;
  16. const char *rev;
  17. const char *type;
  18. u32 cpurev;
  19. u32 freq_mhz;
  20. };
  21. const char *get_imx8_type(u32 imxtype)
  22. {
  23. switch (imxtype) {
  24. case MXC_CPU_IMX8QXP:
  25. case MXC_CPU_IMX8QXP_A0:
  26. return "QXP";
  27. case MXC_CPU_IMX8QM:
  28. return "QM";
  29. default:
  30. return "??";
  31. }
  32. }
  33. const char *get_imx8_rev(u32 rev)
  34. {
  35. switch (rev) {
  36. case CHIP_REV_A:
  37. return "A";
  38. case CHIP_REV_B:
  39. return "B";
  40. default:
  41. return "?";
  42. }
  43. }
  44. const char *get_core_name(void)
  45. {
  46. if (is_cortex_a35())
  47. return "A35";
  48. else if (is_cortex_a53())
  49. return "A53";
  50. else if (is_cortex_a72())
  51. return "A72";
  52. else
  53. return "?";
  54. }
  55. #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
  56. static int cpu_imx_get_temp(void)
  57. {
  58. struct udevice *thermal_dev;
  59. int cpu_tmp, ret;
  60. ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
  61. &thermal_dev);
  62. if (!ret) {
  63. ret = thermal_get_temp(thermal_dev, &cpu_tmp);
  64. if (ret)
  65. return 0xdeadbeef;
  66. } else {
  67. return 0xdeadbeef;
  68. }
  69. return cpu_tmp;
  70. }
  71. #else
  72. static int cpu_imx_get_temp(void)
  73. {
  74. return 0;
  75. }
  76. #endif
  77. int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
  78. {
  79. struct cpu_imx_platdata *plat = dev_get_platdata(dev);
  80. int ret;
  81. if (size < 100)
  82. return -ENOSPC;
  83. ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
  84. plat->type, plat->rev, plat->name, plat->freq_mhz);
  85. if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
  86. buf = buf + ret;
  87. size = size - ret;
  88. ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
  89. }
  90. snprintf(buf + ret, size - ret, "\n");
  91. return 0;
  92. }
  93. static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
  94. {
  95. struct cpu_imx_platdata *plat = dev_get_platdata(dev);
  96. info->cpu_freq = plat->freq_mhz * 1000;
  97. info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
  98. return 0;
  99. }
  100. static int cpu_imx_get_count(struct udevice *dev)
  101. {
  102. return 4;
  103. }
  104. static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size)
  105. {
  106. snprintf(buf, size, "NXP");
  107. return 0;
  108. }
  109. static const struct cpu_ops cpu_imx8_ops = {
  110. .get_desc = cpu_imx_get_desc,
  111. .get_info = cpu_imx_get_info,
  112. .get_count = cpu_imx_get_count,
  113. .get_vendor = cpu_imx_get_vendor,
  114. };
  115. static const struct udevice_id cpu_imx8_ids[] = {
  116. { .compatible = "arm,cortex-a35" },
  117. { .compatible = "arm,cortex-a53" },
  118. { }
  119. };
  120. static ulong imx8_get_cpu_rate(void)
  121. {
  122. ulong rate;
  123. int ret;
  124. int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
  125. SC_R_A53 : SC_R_A72;
  126. ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
  127. (sc_pm_clock_rate_t *)&rate);
  128. if (ret) {
  129. printf("Could not read CPU frequency: %d\n", ret);
  130. return 0;
  131. }
  132. return rate;
  133. }
  134. static int imx8_cpu_probe(struct udevice *dev)
  135. {
  136. struct cpu_imx_platdata *plat = dev_get_platdata(dev);
  137. u32 cpurev;
  138. cpurev = get_cpu_rev();
  139. plat->cpurev = cpurev;
  140. plat->name = get_core_name();
  141. plat->rev = get_imx8_rev(cpurev & 0xFFF);
  142. plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
  143. plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
  144. return 0;
  145. }
  146. U_BOOT_DRIVER(cpu_imx8_drv) = {
  147. .name = "imx8x_cpu",
  148. .id = UCLASS_CPU,
  149. .of_match = cpu_imx8_ids,
  150. .ops = &cpu_imx8_ops,
  151. .probe = imx8_cpu_probe,
  152. .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
  153. .flags = DM_FLAG_PRE_RELOC,
  154. };