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- #
- # Cache controllers
- #
- menu "Cache Controller drivers"
- config CACHE
- bool "Enable Driver Model for Cache controllers"
- depends on DM
- help
- Enable driver model for cache controllers that are found on
- most CPU's. Cache is memory that the CPU can access directly and
- is usually located on the same chip. This uclass can be used for
- configuring settings that be found from a device tree file.
- config L2X0_CACHE
- tristate "PL310 cache driver"
- select CACHE
- depends on ARM
- help
- This driver is for the PL310 cache controller commonly found on
- ARMv7(32-bit) devices. The driver configures the cache settings
- found in the device tree.
- config V5L2_CACHE
- bool "Andes V5L2 cache driver"
- select CACHE
- depends on RISCV_NDS_CACHE
- help
- Support Andes V5L2 cache controller in AE350 platform.
- It will configure tag and data ram timing control from the
- device tree and enable L2 cache.
- config NCORE_CACHE
- bool "Arteris Ncore cache coherent unit driver"
- select CACHE
- help
- This driver is for the Arteris Ncore cache coherent unit (CCU)
- controller. The driver initializes cache directories and coherent
- agent interfaces.
- endmenu
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