fsp_bindings.c 59 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <log.h>
  8. #include <asm/arch/fsp_bindings.h>
  9. /**
  10. * read_u8_prop() - Read an u8 property from devicetree (scalar or array)
  11. * @node: Valid node reference to read property from
  12. * @name: Name of the property to read from
  13. * @count: If the property is expected to be an array, this is the
  14. * number of expected elements
  15. * Set to 0 if the property is expected to be a scalar
  16. * @dst: Pointer to destination of where to save the value(s) read
  17. * from devicetree
  18. */
  19. static void read_u8_prop(ofnode node, char *name, size_t count, u8 *dst)
  20. {
  21. u32 tmp;
  22. const u8 *buf;
  23. int ret;
  24. if (count == 0) {
  25. ret = ofnode_read_u32(node, name, &tmp);
  26. if (ret == 0)
  27. *dst = tmp;
  28. } else {
  29. buf = ofnode_read_u8_array_ptr(node, name, count);
  30. if (buf)
  31. memcpy(dst, buf, count);
  32. }
  33. }
  34. /**
  35. * read_u16_prop() - Read an u16 property from devicetree (scalar or array)
  36. * @node: Valid node reference to read property from
  37. * @name: Name of the property to read from
  38. * @count: If the property is expected to be an array, this is the
  39. * number of expected elements
  40. * Set to 0 if the property is expected to be a scalar
  41. * @dst: Pointer to destination of where to save the value(s) read
  42. * from devicetree
  43. * @return 0 on success, -ve on error
  44. */
  45. static int read_u16_prop(ofnode node, char *name, size_t count, u16 *dst)
  46. {
  47. u32 tmp;
  48. u32 buf[32];
  49. int ret;
  50. if (ARRAY_SIZE(buf) < count) {
  51. debug("ERROR: %s buffer to small!\n", __func__);
  52. return -ENOSPC;
  53. }
  54. if (count == 0) {
  55. ret = ofnode_read_u32(node, name, &tmp);
  56. if (ret == 0)
  57. *dst = tmp;
  58. } else {
  59. ret = ofnode_read_u32_array(node, name, buf, count);
  60. if (ret == 0)
  61. for (int i = 0; i < count; i++)
  62. dst[i] = buf[i];
  63. }
  64. return 0;
  65. }
  66. /**
  67. * read_u32_prop() - Read an u32 property from devicetree (scalar or array)
  68. * @node: Valid node reference to read property from
  69. * @name: Name of the property to read from
  70. * @count: If the property is expected to be an array, this is the
  71. * number of expected elements
  72. * set to 0 if the property is expected to be a scalar
  73. * @dst: Pointer to destination of where to save the value(s) read
  74. * from devicetree
  75. */
  76. static void read_u32_prop(ofnode node, char *name, size_t count, u32 *dst)
  77. {
  78. if (count == 0)
  79. ofnode_read_u32(node, name, dst);
  80. else
  81. ofnode_read_u32_array(node, name, dst, count);
  82. }
  83. /**
  84. * read_u64_prop() - Read an u64 property from devicetree (scalar or array)
  85. * @node: Valid node reference to read property from
  86. * @name: Name of the property to read from
  87. * @count: If the property is expected to be an array, this is the
  88. * number of expected elements
  89. * set to 0 if the property is expected to be a scalar
  90. * @dst: Pointer to destination of where to save the value(s) read
  91. * from devicetree
  92. */
  93. static int read_u64_prop(ofnode node, char *name, size_t count, u64 *dst)
  94. {
  95. if (count == 0) {
  96. ofnode_read_u64(node, name, dst);
  97. } else {
  98. debug("ERROR: %s u64 arrays not supported!\n", __func__);
  99. return -EINVAL;
  100. }
  101. return 0;
  102. }
  103. /**
  104. * read_string_prop() - Read a string property from devicetree
  105. * @node: Valid node reference to read property from
  106. * @name: Name of the property to read from
  107. * @count: Size of the destination buffer
  108. * @dst: Pointer to destination of where to save the values read
  109. * from devicetree
  110. */
  111. static void read_string_prop(ofnode node, char *name, size_t count, char *dst)
  112. {
  113. const char *string_buf;
  114. if (count > 0) {
  115. string_buf = ofnode_read_string(node, name);
  116. if (string_buf)
  117. strlcpy(dst, string_buf, count);
  118. }
  119. }
  120. /**
  121. * read_swizzle_prop() - Read a swizzle property from devicetree
  122. * @node: Valid node reference to read property from
  123. * @name: Name of the property to read from
  124. * @count: Number of elements in the swizzle configuration
  125. * @dst: pointer to destination of where to save the values read
  126. * from devicetree
  127. */
  128. static void read_swizzle_prop(ofnode node, char *name, size_t count, u8 *dst)
  129. {
  130. const struct lpddr4_chan_swizzle_cfg *sch;
  131. /* Number of bytes to copy per DQS */
  132. const size_t sz = DQ_BITS_PER_DQS;
  133. const struct lpddr4_swizzle_cfg *swizzle_cfg;
  134. swizzle_cfg = (const struct lpddr4_swizzle_cfg *)
  135. ofnode_read_u8_array_ptr(node, name, count);
  136. if (!swizzle_cfg)
  137. return;
  138. /*
  139. * CH0_DQB byte lanes in the bit swizzle configuration field are
  140. * not 1:1. The mapping within the swizzling field is:
  141. * indices [0:7] - byte lane 1 (DQS1) DQ[8:15]
  142. * indices [8:15] - byte lane 0 (DQS0) DQ[0:7]
  143. * indices [16:23] - byte lane 3 (DQS3) DQ[24:31]
  144. * indices [24:31] - byte lane 2 (DQS2) DQ[16:23]
  145. */
  146. sch = &swizzle_cfg->phys[LP4_PHYS_CH0B];
  147. memcpy(&dst[0 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
  148. memcpy(&dst[1 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
  149. memcpy(&dst[2 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
  150. memcpy(&dst[3 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
  151. /*
  152. * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
  153. */
  154. sch = &swizzle_cfg->phys[LP4_PHYS_CH0A];
  155. memcpy(&dst[4 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
  156. memcpy(&dst[5 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
  157. memcpy(&dst[6 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
  158. memcpy(&dst[7 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
  159. sch = &swizzle_cfg->phys[LP4_PHYS_CH1B];
  160. memcpy(&dst[8 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
  161. memcpy(&dst[9 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
  162. memcpy(&dst[10 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
  163. memcpy(&dst[11 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
  164. /*
  165. * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
  166. */
  167. sch = &swizzle_cfg->phys[LP4_PHYS_CH1A];
  168. memcpy(&dst[12 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
  169. memcpy(&dst[13 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
  170. memcpy(&dst[14 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
  171. memcpy(&dst[15 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
  172. }
  173. /**
  174. * fsp_update_config_from_dtb() - Read FSP config from devicetree node
  175. * @node: Valid node reference to read property from
  176. * @cfg: Pointer to FSP config structure
  177. * @fsp_bindings: Binding describing which devicetree properties should
  178. * be stored where in the FSP configuration structure
  179. * The end of the list is declared by a NULL pointer in propname
  180. * @return 0 on success, -ve on error
  181. *
  182. * This function reads the configuration for FSP from the provided
  183. * devicetree node and saves it in the FSP configuration structure.
  184. * Configuration options that are not present in the devicetree are
  185. * left at their current value.
  186. */
  187. __maybe_unused
  188. static int fsp_update_config_from_dtb(ofnode node, u8 *cfg,
  189. const struct fsp_binding *fsp_bindings)
  190. {
  191. const struct fsp_binding *fspb;
  192. int ret;
  193. for (int i = 0; fsp_bindings[i].propname; i++) {
  194. fspb = &fsp_bindings[i];
  195. switch (fspb->type) {
  196. case FSP_UINT8:
  197. read_u8_prop(node, fspb->propname, fspb->count,
  198. &cfg[fspb->offset]);
  199. break;
  200. case FSP_UINT16:
  201. ret = read_u16_prop(node, fspb->propname, fspb->count,
  202. (u16 *)&cfg[fspb->offset]);
  203. if (ret)
  204. return ret;
  205. break;
  206. case FSP_UINT32:
  207. read_u32_prop(node, fspb->propname, fspb->count,
  208. (u32 *)&cfg[fspb->offset]);
  209. break;
  210. case FSP_UINT64:
  211. ret = read_u64_prop(node, fspb->propname, fspb->count,
  212. (u64 *)&cfg[fspb->offset]);
  213. if (ret)
  214. return ret;
  215. break;
  216. case FSP_STRING:
  217. read_string_prop(node, fspb->propname, fspb->count,
  218. (char *)&cfg[fspb->offset]);
  219. break;
  220. case FSP_LPDDR4_SWIZZLE:
  221. read_swizzle_prop(node, fspb->propname, fspb->count,
  222. &cfg[fspb->offset]);
  223. break;
  224. }
  225. }
  226. return 0;
  227. }
  228. #if defined(CONFIG_SPL_BUILD)
  229. const struct fsp_binding fsp_m_bindings[] = {
  230. {
  231. .type = FSP_UINT32,
  232. .offset = offsetof(struct fsp_m_config, serial_debug_port_address),
  233. .propname = "fspm,serial-debug-port-address",
  234. }, {
  235. .type = FSP_UINT8,
  236. .offset = offsetof(struct fsp_m_config, serial_debug_port_type),
  237. .propname = "fspm,serial-debug-port-type",
  238. }, {
  239. .type = FSP_UINT8,
  240. .offset = offsetof(struct fsp_m_config, serial_debug_port_device),
  241. .propname = "fspm,serial-debug-port-device",
  242. }, {
  243. .type = FSP_UINT8,
  244. .offset = offsetof(struct fsp_m_config, serial_debug_port_stride_size),
  245. .propname = "fspm,serial-debug-port-stride-size",
  246. }, {
  247. .type = FSP_UINT8,
  248. .offset = offsetof(struct fsp_m_config, mrc_fast_boot),
  249. .propname = "fspm,mrc-fast-boot",
  250. }, {
  251. .type = FSP_UINT8,
  252. .offset = offsetof(struct fsp_m_config, igd),
  253. .propname = "fspm,igd",
  254. }, {
  255. .type = FSP_UINT8,
  256. .offset = offsetof(struct fsp_m_config, igd_dvmt50_pre_alloc),
  257. .propname = "fspm,igd-dvmt50-pre-alloc",
  258. }, {
  259. .type = FSP_UINT8,
  260. .offset = offsetof(struct fsp_m_config, igd_aperture_size),
  261. .propname = "fspm,igd-aperture-size",
  262. }, {
  263. .type = FSP_UINT8,
  264. .offset = offsetof(struct fsp_m_config, gtt_size),
  265. .propname = "fspm,gtt-size",
  266. }, {
  267. .type = FSP_UINT8,
  268. .offset = offsetof(struct fsp_m_config, primary_video_adaptor),
  269. .propname = "fspm,primary-video-adaptor",
  270. }, {
  271. .type = FSP_UINT8,
  272. .offset = offsetof(struct fsp_m_config, package),
  273. .propname = "fspm,package",
  274. }, {
  275. .type = FSP_UINT8,
  276. .offset = offsetof(struct fsp_m_config, profile),
  277. .propname = "fspm,profile",
  278. }, {
  279. .type = FSP_UINT8,
  280. .offset = offsetof(struct fsp_m_config, memory_down),
  281. .propname = "fspm,memory-down",
  282. }, {
  283. .type = FSP_UINT8,
  284. .offset = offsetof(struct fsp_m_config, ddr3_l_page_size),
  285. .propname = "fspm,ddr3-l-page-size",
  286. }, {
  287. .type = FSP_UINT8,
  288. .offset = offsetof(struct fsp_m_config, ddr3_lasr),
  289. .propname = "fspm,ddr3-lasr",
  290. }, {
  291. .type = FSP_UINT8,
  292. .offset = offsetof(struct fsp_m_config, scrambler_support),
  293. .propname = "fspm,scrambler-support",
  294. }, {
  295. .type = FSP_UINT8,
  296. .offset = offsetof(struct fsp_m_config, interleaved_mode),
  297. .propname = "fspm,interleaved-mode",
  298. }, {
  299. .type = FSP_UINT16,
  300. .offset = offsetof(struct fsp_m_config, channel_hash_mask),
  301. .propname = "fspm,channel-hash-mask",
  302. }, {
  303. .type = FSP_UINT16,
  304. .offset = offsetof(struct fsp_m_config, slice_hash_mask),
  305. .propname = "fspm,slice-hash-mask",
  306. }, {
  307. .type = FSP_UINT8,
  308. .offset = offsetof(struct fsp_m_config, channels_slices_enable),
  309. .propname = "fspm,channels-slices-enable",
  310. }, {
  311. .type = FSP_UINT8,
  312. .offset = offsetof(struct fsp_m_config, min_ref_rate2x_enable),
  313. .propname = "fspm,min-ref-rate2x-enable",
  314. }, {
  315. .type = FSP_UINT8,
  316. .offset = offsetof(struct fsp_m_config, dual_rank_support_enable),
  317. .propname = "fspm,dual-rank-support-enable",
  318. }, {
  319. .type = FSP_UINT8,
  320. .offset = offsetof(struct fsp_m_config, rmt_mode),
  321. .propname = "fspm,rmt-mode",
  322. }, {
  323. .type = FSP_UINT16,
  324. .offset = offsetof(struct fsp_m_config, memory_size_limit),
  325. .propname = "fspm,memory-size-limit",
  326. }, {
  327. .type = FSP_UINT16,
  328. .offset = offsetof(struct fsp_m_config, low_memory_max_value),
  329. .propname = "fspm,low-memory-max-value",
  330. }, {
  331. .type = FSP_UINT16,
  332. .offset = offsetof(struct fsp_m_config, high_memory_max_value),
  333. .propname = "fspm,high-memory-max-value",
  334. }, {
  335. .type = FSP_UINT8,
  336. .offset = offsetof(struct fsp_m_config, disable_fast_boot),
  337. .propname = "fspm,disable-fast-boot",
  338. }, {
  339. .type = FSP_UINT8,
  340. .offset = offsetof(struct fsp_m_config, dimm0_spd_address),
  341. .propname = "fspm,dimm0-spd-address",
  342. }, {
  343. .type = FSP_UINT8,
  344. .offset = offsetof(struct fsp_m_config, dimm1_spd_address),
  345. .propname = "fspm,dimm1-spd-address",
  346. }, {
  347. .type = FSP_UINT8,
  348. .offset = offsetof(struct fsp_m_config, chan[0].rank_enable),
  349. .propname = "fspm,ch0-rank-enable",
  350. }, {
  351. .type = FSP_UINT8,
  352. .offset = offsetof(struct fsp_m_config, chan[0].device_width),
  353. .propname = "fspm,ch0-device-width",
  354. }, {
  355. .type = FSP_UINT8,
  356. .offset = offsetof(struct fsp_m_config, chan[0].dram_density),
  357. .propname = "fspm,ch0-dram-density",
  358. }, {
  359. .type = FSP_UINT8,
  360. .offset = offsetof(struct fsp_m_config, chan[0].option),
  361. .propname = "fspm,ch0-option",
  362. }, {
  363. .type = FSP_UINT8,
  364. .offset = offsetof(struct fsp_m_config, chan[0].odt_config),
  365. .propname = "fspm,ch0-odt-config",
  366. }, {
  367. .type = FSP_UINT8,
  368. .offset = offsetof(struct fsp_m_config, chan[0].tristate_clk1),
  369. .propname = "fspm,ch0-tristate-clk1",
  370. }, {
  371. .type = FSP_UINT8,
  372. .offset = offsetof(struct fsp_m_config, chan[0].mode2_n),
  373. .propname = "fspm,ch0-mode2-n",
  374. }, {
  375. .type = FSP_UINT8,
  376. .offset = offsetof(struct fsp_m_config, chan[0].odt_levels),
  377. .propname = "fspm,ch0-odt-levels",
  378. }, {
  379. .type = FSP_UINT8,
  380. .offset = offsetof(struct fsp_m_config, chan[1].rank_enable),
  381. .propname = "fspm,ch1-rank-enable",
  382. }, {
  383. .type = FSP_UINT8,
  384. .offset = offsetof(struct fsp_m_config, chan[1].device_width),
  385. .propname = "fspm,ch1-device-width",
  386. }, {
  387. .type = FSP_UINT8,
  388. .offset = offsetof(struct fsp_m_config, chan[1].dram_density),
  389. .propname = "fspm,ch1-dram-density",
  390. }, {
  391. .type = FSP_UINT8,
  392. .offset = offsetof(struct fsp_m_config, chan[1].option),
  393. .propname = "fspm,ch1-option",
  394. }, {
  395. .type = FSP_UINT8,
  396. .offset = offsetof(struct fsp_m_config, chan[1].odt_config),
  397. .propname = "fspm,ch1-odt-config",
  398. }, {
  399. .type = FSP_UINT8,
  400. .offset = offsetof(struct fsp_m_config, chan[1].tristate_clk1),
  401. .propname = "fspm,ch1-tristate-clk1",
  402. }, {
  403. .type = FSP_UINT8,
  404. .offset = offsetof(struct fsp_m_config, chan[1].mode2_n),
  405. .propname = "fspm,ch1-mode2-n",
  406. }, {
  407. .type = FSP_UINT8,
  408. .offset = offsetof(struct fsp_m_config, chan[1].odt_levels),
  409. .propname = "fspm,ch1-odt-levels",
  410. }, {
  411. .type = FSP_UINT8,
  412. .offset = offsetof(struct fsp_m_config, chan[2].rank_enable),
  413. .propname = "fspm,ch2-rank-enable",
  414. }, {
  415. .type = FSP_UINT8,
  416. .offset = offsetof(struct fsp_m_config, chan[2].device_width),
  417. .propname = "fspm,ch2-device-width",
  418. }, {
  419. .type = FSP_UINT8,
  420. .offset = offsetof(struct fsp_m_config, chan[2].dram_density),
  421. .propname = "fspm,ch2-dram-density",
  422. }, {
  423. .type = FSP_UINT8,
  424. .offset = offsetof(struct fsp_m_config, chan[2].option),
  425. .propname = "fspm,ch2-option",
  426. }, {
  427. .type = FSP_UINT8,
  428. .offset = offsetof(struct fsp_m_config, chan[2].odt_config),
  429. .propname = "fspm,ch2-odt-config",
  430. }, {
  431. .type = FSP_UINT8,
  432. .offset = offsetof(struct fsp_m_config, chan[2].tristate_clk1),
  433. .propname = "fspm,ch2-tristate-clk1",
  434. }, {
  435. .type = FSP_UINT8,
  436. .offset = offsetof(struct fsp_m_config, chan[2].mode2_n),
  437. .propname = "fspm,ch2-mode2-n",
  438. }, {
  439. .type = FSP_UINT8,
  440. .offset = offsetof(struct fsp_m_config, chan[2].odt_levels),
  441. .propname = "fspm,ch2-odt-levels",
  442. }, {
  443. .type = FSP_UINT8,
  444. .offset = offsetof(struct fsp_m_config, chan[3].rank_enable),
  445. .propname = "fspm,ch3-rank-enable",
  446. }, {
  447. .type = FSP_UINT8,
  448. .offset = offsetof(struct fsp_m_config, chan[3].device_width),
  449. .propname = "fspm,ch3-device-width",
  450. }, {
  451. .type = FSP_UINT8,
  452. .offset = offsetof(struct fsp_m_config, chan[3].dram_density),
  453. .propname = "fspm,ch3-dram-density",
  454. }, {
  455. .type = FSP_UINT8,
  456. .offset = offsetof(struct fsp_m_config, chan[3].option),
  457. .propname = "fspm,ch3-option",
  458. }, {
  459. .type = FSP_UINT8,
  460. .offset = offsetof(struct fsp_m_config, chan[3].odt_config),
  461. .propname = "fspm,ch3-odt-config",
  462. }, {
  463. .type = FSP_UINT8,
  464. .offset = offsetof(struct fsp_m_config, chan[3].tristate_clk1),
  465. .propname = "fspm,ch3-tristate-clk1",
  466. }, {
  467. .type = FSP_UINT8,
  468. .offset = offsetof(struct fsp_m_config, chan[3].mode2_n),
  469. .propname = "fspm,ch3-mode2-n",
  470. }, {
  471. .type = FSP_UINT8,
  472. .offset = offsetof(struct fsp_m_config, chan[3].odt_levels),
  473. .propname = "fspm,ch3-odt-levels",
  474. }, {
  475. .type = FSP_UINT8,
  476. .offset = offsetof(struct fsp_m_config, rmt_check_run),
  477. .propname = "fspm,rmt-check-run",
  478. }, {
  479. .type = FSP_UINT16,
  480. .offset = offsetof(struct fsp_m_config,
  481. rmt_margin_check_scale_high_threshold),
  482. .propname = "fspm,rmt-margin-check-scale-high-threshold",
  483. }, {
  484. .type = FSP_LPDDR4_SWIZZLE,
  485. .offset = offsetof(struct fsp_m_config, ch_bit_swizzling),
  486. .propname = "fspm,ch-bit-swizzling",
  487. .count = SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling) /
  488. SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling[0][0])
  489. }, {
  490. .type = FSP_UINT32,
  491. .offset = offsetof(struct fsp_m_config, msg_level_mask),
  492. .propname = "fspm,msg-level-mask",
  493. }, {
  494. .type = FSP_UINT8,
  495. .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_pin_num),
  496. .propname = "fspm,pre-mem-gpio-table-pin-num",
  497. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config,
  498. pre_mem_gpio_table_pin_num),
  499. }, {
  500. .type = FSP_UINT32,
  501. .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_ptr),
  502. .propname = "fspm,pre-mem-gpio-table-ptr",
  503. }, {
  504. .type = FSP_UINT8,
  505. .offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_entry_num),
  506. .propname = "fspm,pre-mem-gpio-table-entry-num",
  507. }, {
  508. .type = FSP_UINT8,
  509. .offset = offsetof(struct fsp_m_config, enhance_port8xh_decoding),
  510. .propname = "fspm,enhance-port8xh-decoding",
  511. }, {
  512. .type = FSP_UINT8,
  513. .offset = offsetof(struct fsp_m_config, spd_write_enable),
  514. .propname = "fspm,spd-write-enable",
  515. }, {
  516. .type = FSP_UINT8,
  517. .offset = offsetof(struct fsp_m_config, mrc_data_saving),
  518. .propname = "fspm,mrc-data-saving",
  519. }, {
  520. .type = FSP_UINT32,
  521. .offset = offsetof(struct fsp_m_config, oem_loading_base),
  522. .propname = "fspm,oem-loading-base",
  523. }, {
  524. .type = FSP_UINT8,
  525. .offset = offsetof(struct fsp_m_config, oem_file_name),
  526. .propname = "fspm,oem-file-name",
  527. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config, oem_file_name),
  528. }, {
  529. .type = FSP_UINT32,
  530. .offset = offsetof(struct fsp_m_config, mrc_boot_data_ptr),
  531. .propname = "fspm,mrc-boot-data-ptr",
  532. }, {
  533. .type = FSP_UINT8,
  534. .offset = offsetof(struct fsp_m_config, e_mmc_trace_len),
  535. .propname = "fspm,emmc-trace-len",
  536. }, {
  537. .type = FSP_UINT8,
  538. .offset = offsetof(struct fsp_m_config, skip_cse_rbp),
  539. .propname = "fspm,skip-cse-rbp",
  540. }, {
  541. .type = FSP_UINT8,
  542. .offset = offsetof(struct fsp_m_config, npk_en),
  543. .propname = "fspm,npk-en",
  544. }, {
  545. .type = FSP_UINT8,
  546. .offset = offsetof(struct fsp_m_config, fw_trace_en),
  547. .propname = "fspm,fw-trace-en",
  548. }, {
  549. .type = FSP_UINT8,
  550. .offset = offsetof(struct fsp_m_config, fw_trace_destination),
  551. .propname = "fspm,fw-trace-destination",
  552. }, {
  553. .type = FSP_UINT8,
  554. .offset = offsetof(struct fsp_m_config, recover_dump),
  555. .propname = "fspm,recover-dump",
  556. }, {
  557. .type = FSP_UINT8,
  558. .offset = offsetof(struct fsp_m_config, msc0_wrap),
  559. .propname = "fspm,msc0-wrap",
  560. }, {
  561. .type = FSP_UINT8,
  562. .offset = offsetof(struct fsp_m_config, msc1_wrap),
  563. .propname = "fspm,msc1-wrap",
  564. }, {
  565. .type = FSP_UINT32,
  566. .offset = offsetof(struct fsp_m_config, msc0_size),
  567. .propname = "fspm,msc0-size",
  568. }, {
  569. .type = FSP_UINT32,
  570. .offset = offsetof(struct fsp_m_config, msc1_size),
  571. .propname = "fspm,msc1-size",
  572. }, {
  573. .type = FSP_UINT8,
  574. .offset = offsetof(struct fsp_m_config, pti_mode),
  575. .propname = "fspm,pti-mode",
  576. }, {
  577. .type = FSP_UINT8,
  578. .offset = offsetof(struct fsp_m_config, pti_training),
  579. .propname = "fspm,pti-training",
  580. }, {
  581. .type = FSP_UINT8,
  582. .offset = offsetof(struct fsp_m_config, pti_speed),
  583. .propname = "fspm,pti-speed",
  584. }, {
  585. .type = FSP_UINT8,
  586. .offset = offsetof(struct fsp_m_config, punit_mlvl),
  587. .propname = "fspm,punit-mlvl",
  588. }, {
  589. .type = FSP_UINT8,
  590. .offset = offsetof(struct fsp_m_config, pmc_mlvl),
  591. .propname = "fspm,pmc-mlvl",
  592. }, {
  593. .type = FSP_UINT8,
  594. .offset = offsetof(struct fsp_m_config, sw_trace_en),
  595. .propname = "fspm,sw-trace-en",
  596. }, {
  597. .type = FSP_UINT8,
  598. .offset = offsetof(struct fsp_m_config, periodic_retraining_disable),
  599. .propname = "fspm,periodic-retraining-disable",
  600. }, {
  601. .type = FSP_UINT8,
  602. .offset = offsetof(struct fsp_m_config, enable_reset_system),
  603. .propname = "fspm,enable-reset-system",
  604. }, {
  605. .type = FSP_UINT8,
  606. .offset = offsetof(struct fsp_m_config, enable_s3_heci2),
  607. .propname = "fspm,enable-s3-heci2",
  608. }, {
  609. .type = FSP_UINT32,
  610. .offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr),
  611. .propname = "fspm,variable-nvs-buffer-ptr",
  612. }, {
  613. .type = FSP_UINT64,
  614. .offset = offsetof(struct fsp_m_config, start_timer_ticker_of_pfet_assert),
  615. .propname = "fspm,start-timer-ticker-of-pfet-assert",
  616. }, {
  617. .type = FSP_UINT8, .offset = offsetof(struct fsp_m_config, rt_en),
  618. .propname = "fspm,rt-en",
  619. }, {
  620. .type = FSP_UINT8,
  621. .offset = offsetof(struct fsp_m_config, skip_pcie_power_sequence),
  622. .propname = "fspm,skip-pcie-power-sequence",
  623. }, {
  624. .propname = NULL
  625. }
  626. };
  627. int fsp_m_update_config_from_dtb(ofnode node, struct fsp_m_config *cfg)
  628. {
  629. return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_m_bindings);
  630. }
  631. #endif
  632. #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
  633. const struct fsp_binding fsp_s_bindings[] = {
  634. {
  635. .type = FSP_UINT8,
  636. .offset = offsetof(struct fsp_s_config, active_processor_cores),
  637. .propname = "fsps,active-processor-cores",
  638. }, {
  639. .type = FSP_UINT8,
  640. .offset = offsetof(struct fsp_s_config, disable_core1),
  641. .propname = "fsps,disable-core1",
  642. }, {
  643. .type = FSP_UINT8,
  644. .offset = offsetof(struct fsp_s_config, disable_core2),
  645. .propname = "fsps,disable-core2",
  646. }, {
  647. .type = FSP_UINT8,
  648. .offset = offsetof(struct fsp_s_config, disable_core3),
  649. .propname = "fsps,disable-core3",
  650. }, {
  651. .type = FSP_UINT8,
  652. .offset = offsetof(struct fsp_s_config, vmx_enable),
  653. .propname = "fsps,vmx-enable",
  654. }, {
  655. .type = FSP_UINT8,
  656. .offset = offsetof(struct fsp_s_config, proc_trace_mem_size),
  657. .propname = "fsps,proc-trace-mem-size",
  658. }, {
  659. .type = FSP_UINT8,
  660. .offset = offsetof(struct fsp_s_config, proc_trace_enable),
  661. .propname = "fsps,proc-trace-enable",
  662. }, {
  663. .type = FSP_UINT8,
  664. .offset = offsetof(struct fsp_s_config, eist),
  665. .propname = "fsps,eist",
  666. }, {
  667. .type = FSP_UINT8,
  668. .offset = offsetof(struct fsp_s_config, boot_p_state),
  669. .propname = "fsps,boot-p-state",
  670. }, {
  671. .type = FSP_UINT8,
  672. .offset = offsetof(struct fsp_s_config, enable_cx),
  673. .propname = "fsps,enable-cx",
  674. }, {
  675. .type = FSP_UINT8,
  676. .offset = offsetof(struct fsp_s_config, c1e),
  677. .propname = "fsps,c1e",
  678. }, {
  679. .type = FSP_UINT8,
  680. .offset = offsetof(struct fsp_s_config, bi_proc_hot),
  681. .propname = "fsps,bi-proc-hot",
  682. }, {
  683. .type = FSP_UINT8,
  684. .offset = offsetof(struct fsp_s_config, pkg_c_state_limit),
  685. .propname = "fsps,pkg-c-state-limit",
  686. }, {
  687. .type = FSP_UINT8,
  688. .offset = offsetof(struct fsp_s_config, c_state_auto_demotion),
  689. .propname = "fsps,c-state-auto-demotion",
  690. }, {
  691. .type = FSP_UINT8,
  692. .offset = offsetof(struct fsp_s_config, c_state_un_demotion),
  693. .propname = "fsps,c-state-un-demotion",
  694. }, {
  695. .type = FSP_UINT8,
  696. .offset = offsetof(struct fsp_s_config, max_core_c_state),
  697. .propname = "fsps,max-core-c-state",
  698. }, {
  699. .type = FSP_UINT8,
  700. .offset = offsetof(struct fsp_s_config, pkg_c_state_demotion),
  701. .propname = "fsps,pkg-c-state-demotion",
  702. }, {
  703. .type = FSP_UINT8,
  704. .offset = offsetof(struct fsp_s_config, pkg_c_state_un_demotion),
  705. .propname = "fsps,pkg-c-state-un-demotion",
  706. }, {
  707. .type = FSP_UINT8,
  708. .offset = offsetof(struct fsp_s_config, turbo_mode),
  709. .propname = "fsps,turbo-mode",
  710. }, {
  711. .type = FSP_UINT8,
  712. .offset = offsetof(struct fsp_s_config, hda_verb_table_entry_num),
  713. .propname = "fsps,hda-verb-table-entry-num",
  714. }, {
  715. .type = FSP_UINT32,
  716. .offset = offsetof(struct fsp_s_config, hda_verb_table_ptr),
  717. .propname = "fsps,hda-verb-table-ptr",
  718. }, {
  719. .type = FSP_UINT8,
  720. .offset = offsetof(struct fsp_s_config, p2sb_unhide),
  721. .propname = "fsps,p2sb-unhide",
  722. }, {
  723. .type = FSP_UINT8,
  724. .offset = offsetof(struct fsp_s_config, ipu_en),
  725. .propname = "fsps,ipu-en",
  726. }, {
  727. .type = FSP_UINT8,
  728. .offset = offsetof(struct fsp_s_config, ipu_acpi_mode),
  729. .propname = "fsps,ipu-acpi-mode",
  730. }, {
  731. .type = FSP_UINT8,
  732. .offset = offsetof(struct fsp_s_config, force_wake),
  733. .propname = "fsps,force-wake",
  734. }, {
  735. .type = FSP_UINT32,
  736. .offset = offsetof(struct fsp_s_config, gtt_mm_adr),
  737. .propname = "fsps,gtt-mm-adr",
  738. }, {
  739. .type = FSP_UINT32,
  740. .offset = offsetof(struct fsp_s_config, gm_adr),
  741. .propname = "fsps,gm-adr",
  742. }, {
  743. .type = FSP_UINT8,
  744. .offset = offsetof(struct fsp_s_config, pavp_lock),
  745. .propname = "fsps,pavp-lock",
  746. }, {
  747. .type = FSP_UINT8,
  748. .offset = offsetof(struct fsp_s_config, graphics_freq_modify),
  749. .propname = "fsps,graphics-freq-modify",
  750. }, {
  751. .type = FSP_UINT8,
  752. .offset = offsetof(struct fsp_s_config, graphics_freq_req),
  753. .propname = "fsps,graphics-freq-req",
  754. }, {
  755. .type = FSP_UINT8,
  756. .offset = offsetof(struct fsp_s_config, graphics_video_freq),
  757. .propname = "fsps,graphics-video-freq",
  758. }, {
  759. .type = FSP_UINT8,
  760. .offset = offsetof(struct fsp_s_config, pm_lock),
  761. .propname = "fsps,pm-lock",
  762. }, {
  763. .type = FSP_UINT8,
  764. .offset = offsetof(struct fsp_s_config, dop_clock_gating),
  765. .propname = "fsps,dop-clock-gating",
  766. }, {
  767. .type = FSP_UINT8,
  768. .offset = offsetof(struct fsp_s_config, unsolicited_attack_override),
  769. .propname = "fsps,unsolicited-attack-override",
  770. }, {
  771. .type = FSP_UINT8,
  772. .offset = offsetof(struct fsp_s_config, wopcm_support),
  773. .propname = "fsps,wopcm-support",
  774. }, {
  775. .type = FSP_UINT8,
  776. .offset = offsetof(struct fsp_s_config, wopcm_size),
  777. .propname = "fsps,wopcm-size",
  778. }, {
  779. .type = FSP_UINT8,
  780. .offset = offsetof(struct fsp_s_config, power_gating),
  781. .propname = "fsps,power-gating",
  782. }, {
  783. .type = FSP_UINT8,
  784. .offset = offsetof(struct fsp_s_config, unit_level_clock_gating),
  785. .propname = "fsps,unit-level-clock-gating",
  786. }, {
  787. .type = FSP_UINT8,
  788. .offset = offsetof(struct fsp_s_config, fast_boot),
  789. .propname = "fsps,fast-boot",
  790. }, {
  791. .type = FSP_UINT8,
  792. .offset = offsetof(struct fsp_s_config, dyn_sr),
  793. .propname = "fsps,dyn-sr",
  794. }, {
  795. .type = FSP_UINT8,
  796. .offset = offsetof(struct fsp_s_config, sa_ipu_enable),
  797. .propname = "fsps,sa-ipu-enable",
  798. }, {
  799. .type = FSP_UINT8,
  800. .offset = offsetof(struct fsp_s_config, pm_support),
  801. .propname = "fsps,pm-support",
  802. }, {
  803. .type = FSP_UINT8,
  804. .offset = offsetof(struct fsp_s_config, enable_render_standby),
  805. .propname = "fsps,enable-render-standby",
  806. }, {
  807. .type = FSP_UINT32,
  808. .offset = offsetof(struct fsp_s_config, logo_size),
  809. .propname = "fsps,logo-size",
  810. }, {
  811. .type = FSP_UINT32,
  812. .offset = offsetof(struct fsp_s_config, logo_ptr),
  813. .propname = "fsps,logo-ptr",
  814. }, {
  815. .type = FSP_UINT32,
  816. .offset = offsetof(struct fsp_s_config, graphics_config_ptr),
  817. .propname = "fsps,graphics-config-ptr",
  818. }, {
  819. .type = FSP_UINT8,
  820. .offset = offsetof(struct fsp_s_config, pavp_enable),
  821. .propname = "fsps,pavp-enable",
  822. }, {
  823. .type = FSP_UINT8,
  824. .offset = offsetof(struct fsp_s_config, pavp_pr3),
  825. .propname = "fsps,pavp-pr3",
  826. }, {
  827. .type = FSP_UINT8,
  828. .offset = offsetof(struct fsp_s_config, cd_clock),
  829. .propname = "fsps,cd-clock",
  830. }, {
  831. .type = FSP_UINT8,
  832. .offset = offsetof(struct fsp_s_config, pei_graphics_peim_init),
  833. .propname = "fsps,pei-graphics-peim-init",
  834. }, {
  835. .type = FSP_UINT8,
  836. .offset = offsetof(struct fsp_s_config, write_protection_enable),
  837. .propname = "fsps,write-protection-enable",
  838. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  839. write_protection_enable),
  840. }, {
  841. .type = FSP_UINT8,
  842. .offset = offsetof(struct fsp_s_config, read_protection_enable),
  843. .propname = "fsps,read-protection-enable",
  844. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  845. read_protection_enable),
  846. }, {
  847. .type = FSP_UINT16,
  848. .offset = offsetof(struct fsp_s_config, protected_range_limit),
  849. .propname = "fsps,protected-range-limit",
  850. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  851. protected_range_limit),
  852. }, {
  853. .type = FSP_UINT16,
  854. .offset = offsetof(struct fsp_s_config, protected_range_base),
  855. .propname = "fsps,protected-range-base",
  856. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  857. protected_range_base),
  858. }, {
  859. .type = FSP_UINT8,
  860. .offset = offsetof(struct fsp_s_config, gmm),
  861. .propname = "fsps,gmm",
  862. }, {
  863. .type = FSP_UINT8,
  864. .offset = offsetof(struct fsp_s_config, clk_gating_pgcb_clk_trunk),
  865. .propname = "fsps,clk-gating-pgcb-clk-trunk",
  866. }, {
  867. .type = FSP_UINT8,
  868. .offset = offsetof(struct fsp_s_config, clk_gating_sb),
  869. .propname = "fsps,clk-gating-sb",
  870. }, {
  871. .type = FSP_UINT8,
  872. .offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_trunk),
  873. .propname = "fsps,clk-gating-sb-clk-trunk",
  874. }, {
  875. .type = FSP_UINT8,
  876. .offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_partition),
  877. .propname = "fsps,clk-gating-sb-clk-partition",
  878. }, {
  879. .type = FSP_UINT8,
  880. .offset = offsetof(struct fsp_s_config, clk_gating_core),
  881. .propname = "fsps,clk-gating-core",
  882. }, {
  883. .type = FSP_UINT8,
  884. .offset = offsetof(struct fsp_s_config, clk_gating_dma),
  885. .propname = "fsps,clk-gating-dma",
  886. }, {
  887. .type = FSP_UINT8,
  888. .offset = offsetof(struct fsp_s_config, clk_gating_reg_access),
  889. .propname = "fsps,clk-gating-reg-access",
  890. }, {
  891. .type = FSP_UINT8,
  892. .offset = offsetof(struct fsp_s_config, clk_gating_host),
  893. .propname = "fsps,clk-gating-host",
  894. }, {
  895. .type = FSP_UINT8,
  896. .offset = offsetof(struct fsp_s_config, clk_gating_partition),
  897. .propname = "fsps,clk-gating-partition",
  898. }, {
  899. .type = FSP_UINT8,
  900. .offset = offsetof(struct fsp_s_config, clk_gating_trunk),
  901. .propname = "fsps,clk-gating-trunk",
  902. }, {
  903. .type = FSP_UINT8,
  904. .offset = offsetof(struct fsp_s_config, hda_enable),
  905. .propname = "fsps,hda-enable",
  906. }, {
  907. .type = FSP_UINT8,
  908. .offset = offsetof(struct fsp_s_config, dsp_enable),
  909. .propname = "fsps,dsp-enable",
  910. }, {
  911. .type = FSP_UINT8,
  912. .offset = offsetof(struct fsp_s_config, pme),
  913. .propname = "fsps,pme",
  914. }, {
  915. .type = FSP_UINT8,
  916. .offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_ownership),
  917. .propname = "fsps,hd-audio-io-buffer-ownership",
  918. }, {
  919. .type = FSP_UINT8,
  920. .offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_voltage),
  921. .propname = "fsps,hd-audio-io-buffer-voltage",
  922. }, {
  923. .type = FSP_UINT8,
  924. .offset = offsetof(struct fsp_s_config, hd_audio_vc_type),
  925. .propname = "fsps,hd-audio-vc-type",
  926. }, {
  927. .type = FSP_UINT8,
  928. .offset = offsetof(struct fsp_s_config, hd_audio_link_frequency),
  929. .propname = "fsps,hd-audio-link-frequency",
  930. }, {
  931. .type = FSP_UINT8,
  932. .offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_frequency),
  933. .propname = "fsps,hd-audio-i-disp-link-frequency",
  934. }, {
  935. .type = FSP_UINT8,
  936. .offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_tmode),
  937. .propname = "fsps,hd-audio-i-disp-link-tmode",
  938. }, {
  939. .type = FSP_UINT8,
  940. .offset = offsetof(struct fsp_s_config, dsp_endpoint_dmic),
  941. .propname = "fsps,dsp-endpoint-dmic",
  942. }, {
  943. .type = FSP_UINT8,
  944. .offset = offsetof(struct fsp_s_config, dsp_endpoint_bluetooth),
  945. .propname = "fsps,dsp-endpoint-bluetooth",
  946. }, {
  947. .type = FSP_UINT8,
  948. .offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_skp),
  949. .propname = "fsps,dsp-endpoint-i2s-skp",
  950. }, {
  951. .type = FSP_UINT8,
  952. .offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_hp),
  953. .propname = "fsps,dsp-endpoint-i2s-hp",
  954. }, {
  955. .type = FSP_UINT8,
  956. .offset = offsetof(struct fsp_s_config, audio_ctl_pwr_gate),
  957. .propname = "fsps,audio-ctl-pwr-gate",
  958. }, {
  959. .type = FSP_UINT8,
  960. .offset = offsetof(struct fsp_s_config, audio_dsp_pwr_gate),
  961. .propname = "fsps,audio-dsp-pwr-gate",
  962. }, {
  963. .type = FSP_UINT8,
  964. .offset = offsetof(struct fsp_s_config, mmt),
  965. .propname = "fsps,mmt",
  966. }, {
  967. .type = FSP_UINT8,
  968. .offset = offsetof(struct fsp_s_config, hmt),
  969. .propname = "fsps,hmt",
  970. }, {
  971. .type = FSP_UINT8,
  972. .offset = offsetof(struct fsp_s_config, hd_audio_pwr_gate),
  973. .propname = "fsps,hd-audio-pwr-gate",
  974. }, {
  975. .type = FSP_UINT8,
  976. .offset = offsetof(struct fsp_s_config, hd_audio_clk_gate),
  977. .propname = "fsps,hd-audio-clk-gate",
  978. }, {
  979. .type = FSP_UINT32,
  980. .offset = offsetof(struct fsp_s_config, dsp_feature_mask),
  981. .propname = "fsps,dsp-feature-mask",
  982. }, {
  983. .type = FSP_UINT32,
  984. .offset = offsetof(struct fsp_s_config, dsp_pp_module_mask),
  985. .propname = "fsps,dsp-pp-module-mask",
  986. }, {
  987. .type = FSP_UINT8,
  988. .offset = offsetof(struct fsp_s_config, bios_cfg_lock_down),
  989. .propname = "fsps,bios-cfg-lock-down",
  990. }, {
  991. .type = FSP_UINT8,
  992. .offset = offsetof(struct fsp_s_config, hpet),
  993. .propname = "fsps,hpet",
  994. }, {
  995. .type = FSP_UINT8,
  996. .offset = offsetof(struct fsp_s_config, hpet_bdf_valid),
  997. .propname = "fsps,hpet-bdf-valid",
  998. }, {
  999. .type = FSP_UINT8,
  1000. .offset = offsetof(struct fsp_s_config, hpet_bus_number),
  1001. .propname = "fsps,hpet-bus-number",
  1002. }, {
  1003. .type = FSP_UINT8,
  1004. .offset = offsetof(struct fsp_s_config, hpet_device_number),
  1005. .propname = "fsps,hpet-device-number",
  1006. }, {
  1007. .type = FSP_UINT8,
  1008. .offset = offsetof(struct fsp_s_config, hpet_function_number),
  1009. .propname = "fsps,hpet-function-number",
  1010. }, {
  1011. .type = FSP_UINT8,
  1012. .offset = offsetof(struct fsp_s_config, io_apic_bdf_valid),
  1013. .propname = "fsps,io-apic-bdf-valid",
  1014. }, {
  1015. .type = FSP_UINT8,
  1016. .offset = offsetof(struct fsp_s_config, io_apic_bus_number),
  1017. .propname = "fsps,io-apic-bus-number",
  1018. }, {
  1019. .type = FSP_UINT8,
  1020. .offset = offsetof(struct fsp_s_config, io_apic_device_number),
  1021. .propname = "fsps,io-apic-device-number",
  1022. }, {
  1023. .type = FSP_UINT8,
  1024. .offset = offsetof(struct fsp_s_config, io_apic_function_number),
  1025. .propname = "fsps,io-apic-function-number",
  1026. }, {
  1027. .type = FSP_UINT8,
  1028. .offset = offsetof(struct fsp_s_config, io_apic_entry24_119),
  1029. .propname = "fsps,io-apic-entry24-119",
  1030. }, {
  1031. .type = FSP_UINT8,
  1032. .offset = offsetof(struct fsp_s_config, io_apic_id),
  1033. .propname = "fsps,io-apic-id",
  1034. }, {
  1035. .type = FSP_UINT8,
  1036. .offset = offsetof(struct fsp_s_config, io_apic_range_select),
  1037. .propname = "fsps,io-apic-range-select",
  1038. }, {
  1039. .type = FSP_UINT8,
  1040. .offset = offsetof(struct fsp_s_config, ish_enable),
  1041. .propname = "fsps,ish-enable",
  1042. }, {
  1043. .type = FSP_UINT8,
  1044. .offset = offsetof(struct fsp_s_config, bios_interface),
  1045. .propname = "fsps,bios-interface",
  1046. }, {
  1047. .type = FSP_UINT8,
  1048. .offset = offsetof(struct fsp_s_config, bios_lock),
  1049. .propname = "fsps,bios-lock",
  1050. }, {
  1051. .type = FSP_UINT8,
  1052. .offset = offsetof(struct fsp_s_config, spi_eiss),
  1053. .propname = "fsps,spi-eiss",
  1054. }, {
  1055. .type = FSP_UINT8,
  1056. .offset = offsetof(struct fsp_s_config, bios_lock_sw_smi_number),
  1057. .propname = "fsps,bios-lock-sw-smi-number",
  1058. }, {
  1059. .type = FSP_UINT8,
  1060. .offset = offsetof(struct fsp_s_config, lpss_s0ix_enable),
  1061. .propname = "fsps,lpss-s0ix-enable",
  1062. }, {
  1063. .type = FSP_UINT8,
  1064. .offset = offsetof(struct fsp_s_config, i2c_clk_gate_cfg),
  1065. .propname = "fsps,i2c-clk-gate-cfg",
  1066. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, i2c_clk_gate_cfg),
  1067. }, {
  1068. .type = FSP_UINT8,
  1069. .offset = offsetof(struct fsp_s_config, hsuart_clk_gate_cfg),
  1070. .propname = "fsps,hsuart-clk-gate-cfg",
  1071. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, hsuart_clk_gate_cfg),
  1072. }, {
  1073. .type = FSP_UINT8,
  1074. .offset = offsetof(struct fsp_s_config, spi_clk_gate_cfg),
  1075. .propname = "fsps,spi-clk-gate-cfg",
  1076. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, spi_clk_gate_cfg),
  1077. }, {
  1078. .type = FSP_UINT8,
  1079. .offset = offsetof(struct fsp_s_config, i2c0_enable),
  1080. .propname = "fsps,i2c0-enable",
  1081. }, {
  1082. .type = FSP_UINT8,
  1083. .offset = offsetof(struct fsp_s_config, i2c1_enable),
  1084. .propname = "fsps,i2c1-enable",
  1085. }, {
  1086. .type = FSP_UINT8,
  1087. .offset = offsetof(struct fsp_s_config, i2c2_enable),
  1088. .propname = "fsps,i2c2-enable",
  1089. }, {
  1090. .type = FSP_UINT8,
  1091. .offset = offsetof(struct fsp_s_config, i2c3_enable),
  1092. .propname = "fsps,i2c3-enable",
  1093. }, {
  1094. .type = FSP_UINT8,
  1095. .offset = offsetof(struct fsp_s_config, i2c4_enable),
  1096. .propname = "fsps,i2c4-enable",
  1097. }, {
  1098. .type = FSP_UINT8,
  1099. .offset = offsetof(struct fsp_s_config, i2c5_enable),
  1100. .propname = "fsps,i2c5-enable",
  1101. }, {
  1102. .type = FSP_UINT8,
  1103. .offset = offsetof(struct fsp_s_config, i2c6_enable),
  1104. .propname = "fsps,i2c6-enable",
  1105. }, {
  1106. .type = FSP_UINT8,
  1107. .offset = offsetof(struct fsp_s_config, i2c7_enable),
  1108. .propname = "fsps,i2c7-enable",
  1109. }, {
  1110. .type = FSP_UINT8,
  1111. .offset = offsetof(struct fsp_s_config, hsuart0_enable),
  1112. .propname = "fsps,hsuart0-enable",
  1113. }, {
  1114. .type = FSP_UINT8,
  1115. .offset = offsetof(struct fsp_s_config, hsuart1_enable),
  1116. .propname = "fsps,hsuart1-enable",
  1117. }, {
  1118. .type = FSP_UINT8,
  1119. .offset = offsetof(struct fsp_s_config, hsuart2_enable),
  1120. .propname = "fsps,hsuart2-enable",
  1121. }, {
  1122. .type = FSP_UINT8,
  1123. .offset = offsetof(struct fsp_s_config, hsuart3_enable),
  1124. .propname = "fsps,hsuart3-enable",
  1125. }, {
  1126. .type = FSP_UINT8,
  1127. .offset = offsetof(struct fsp_s_config, spi0_enable),
  1128. .propname = "fsps,spi0-enable",
  1129. }, {
  1130. .type = FSP_UINT8,
  1131. .offset = offsetof(struct fsp_s_config, spi1_enable),
  1132. .propname = "fsps,spi1-enable",
  1133. }, {
  1134. .type = FSP_UINT8,
  1135. .offset = offsetof(struct fsp_s_config, spi2_enable),
  1136. .propname = "fsps,spi2-enable",
  1137. }, {
  1138. .type = FSP_UINT8,
  1139. .offset = offsetof(struct fsp_s_config, os_dbg_enable),
  1140. .propname = "fsps,os-dbg-enable",
  1141. }, {
  1142. .type = FSP_UINT8,
  1143. .offset = offsetof(struct fsp_s_config, dci_en),
  1144. .propname = "fsps,dci-en",
  1145. }, {
  1146. .type = FSP_UINT32,
  1147. .offset = offsetof(struct fsp_s_config,
  1148. uart2_kernel_debug_base_address),
  1149. .propname = "fsps,uart2-kernel-debug-base-address",
  1150. }, {
  1151. .type = FSP_UINT8,
  1152. .offset = offsetof(struct fsp_s_config, pcie_clock_gating_disabled),
  1153. .propname = "fsps,pcie-clock-gating-disabled",
  1154. }, {
  1155. .type = FSP_UINT8,
  1156. .offset = offsetof(struct fsp_s_config, pcie_root_port8xh_decode),
  1157. .propname = "fsps,pcie-root-port8xh-decode",
  1158. }, {
  1159. .type = FSP_UINT8,
  1160. .offset = offsetof(struct fsp_s_config, pcie8xh_decode_port_index),
  1161. .propname = "fsps,pcie8xh-decode-port-index",
  1162. }, {
  1163. .type = FSP_UINT8,
  1164. .offset = offsetof(struct fsp_s_config,
  1165. pcie_root_port_peer_memory_write_enable),
  1166. .propname = "fsps,pcie-root-port-peer-memory-write-enable",
  1167. }, {
  1168. .type = FSP_UINT8,
  1169. .offset = offsetof(struct fsp_s_config, pcie_aspm_sw_smi_number),
  1170. .propname = "fsps,pcie-aspm-sw-smi-number",
  1171. }, {
  1172. .type = FSP_UINT8,
  1173. .offset = offsetof(struct fsp_s_config, pcie_root_port_en),
  1174. .propname = "fsps,pcie-root-port-en",
  1175. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_root_port_en),
  1176. }, {
  1177. .type = FSP_UINT8,
  1178. .offset = offsetof(struct fsp_s_config, pcie_rp_hide),
  1179. .propname = "fsps,pcie-rp-hide",
  1180. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hide),
  1181. }, {
  1182. .type = FSP_UINT8,
  1183. .offset = offsetof(struct fsp_s_config, pcie_rp_slot_implemented),
  1184. .propname = "fsps,pcie-rp-slot-implemented",
  1185. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1186. pcie_rp_slot_implemented),
  1187. }, {
  1188. .type = FSP_UINT8,
  1189. .offset = offsetof(struct fsp_s_config, pcie_rp_hot_plug),
  1190. .propname = "fsps,pcie-rp-hot-plug",
  1191. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hot_plug),
  1192. }, {
  1193. .type = FSP_UINT8,
  1194. .offset = offsetof(struct fsp_s_config, pcie_rp_pm_sci),
  1195. .propname = "fsps,pcie-rp-pm-sci",
  1196. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_pm_sci),
  1197. }, {
  1198. .type = FSP_UINT8,
  1199. .offset = offsetof(struct fsp_s_config, pcie_rp_ext_sync),
  1200. .propname = "fsps,pcie-rp-ext-sync",
  1201. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ext_sync),
  1202. }, {
  1203. .type = FSP_UINT8,
  1204. .offset = offsetof(struct fsp_s_config,
  1205. pcie_rp_transmitter_half_swing),
  1206. .propname = "fsps,pcie-rp-transmitter-half-swing",
  1207. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1208. pcie_rp_transmitter_half_swing),
  1209. }, {
  1210. .type = FSP_UINT8,
  1211. .offset = offsetof(struct fsp_s_config, pcie_rp_acs_enabled),
  1212. .propname = "fsps,pcie-rp-acs-enabled",
  1213. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_acs_enabled),
  1214. }, {
  1215. .type = FSP_UINT8,
  1216. .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_supported),
  1217. .propname = "fsps,pcie-rp-clk-req-supported",
  1218. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1219. pcie_rp_clk_req_supported),
  1220. }, {
  1221. .type = FSP_UINT8,
  1222. .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_number),
  1223. .propname = "fsps,pcie-rp-clk-req-number",
  1224. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1225. pcie_rp_clk_req_number),
  1226. }, {
  1227. .type = FSP_UINT8,
  1228. .offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_detect),
  1229. .propname = "fsps,pcie-rp-clk-req-detect",
  1230. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1231. pcie_rp_clk_req_detect),
  1232. }, {
  1233. .type = FSP_UINT8,
  1234. .offset = offsetof(struct fsp_s_config, advanced_error_reporting),
  1235. .propname = "fsps,advanced-error-reporting",
  1236. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1237. advanced_error_reporting),
  1238. }, {
  1239. .type = FSP_UINT8,
  1240. .offset = offsetof(struct fsp_s_config, pme_interrupt),
  1241. .propname = "fsps,pme-interrupt",
  1242. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pme_interrupt),
  1243. }, {
  1244. .type = FSP_UINT8,
  1245. .offset = offsetof(struct fsp_s_config, unsupported_request_report),
  1246. .propname = "fsps,unsupported-request-report",
  1247. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1248. unsupported_request_report),
  1249. }, {
  1250. .type = FSP_UINT8,
  1251. .offset = offsetof(struct fsp_s_config, fatal_error_report),
  1252. .propname = "fsps,fatal-error-report",
  1253. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, fatal_error_report),
  1254. }, {
  1255. .type = FSP_UINT8,
  1256. .offset = offsetof(struct fsp_s_config, no_fatal_error_report),
  1257. .propname = "fsps,no-fatal-error-report",
  1258. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1259. no_fatal_error_report),
  1260. }, {
  1261. .type = FSP_UINT8,
  1262. .offset = offsetof(struct fsp_s_config, correctable_error_report),
  1263. .propname = "fsps,correctable-error-report",
  1264. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1265. correctable_error_report),
  1266. }, {
  1267. .type = FSP_UINT8,
  1268. .offset = offsetof(struct fsp_s_config,
  1269. system_error_on_fatal_error),
  1270. .propname = "fsps,system-error-on-fatal-error",
  1271. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1272. system_error_on_fatal_error),
  1273. }, {
  1274. .type = FSP_UINT8,
  1275. .offset = offsetof(struct fsp_s_config,
  1276. system_error_on_non_fatal_error),
  1277. .propname = "fsps,system-error-on-non-fatal-error",
  1278. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1279. system_error_on_non_fatal_error),
  1280. }, {
  1281. .type = FSP_UINT8,
  1282. .offset = offsetof(struct fsp_s_config,
  1283. system_error_on_correctable_error),
  1284. .propname = "fsps,system-error-on-correctable-error",
  1285. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1286. system_error_on_correctable_error),
  1287. }, {
  1288. .type = FSP_UINT8,
  1289. .offset = offsetof(struct fsp_s_config, pcie_rp_speed),
  1290. .propname = "fsps,pcie-rp-speed",
  1291. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_speed),
  1292. }, {
  1293. .type = FSP_UINT8,
  1294. .offset = offsetof(struct fsp_s_config, physical_slot_number),
  1295. .propname = "fsps,physical-slot-number",
  1296. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1297. physical_slot_number),
  1298. }, {
  1299. .type = FSP_UINT8,
  1300. .offset = offsetof(struct fsp_s_config, pcie_rp_completion_timeout),
  1301. .propname = "fsps,pcie-rp-completion-timeout",
  1302. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1303. pcie_rp_completion_timeout),
  1304. }, {
  1305. .type = FSP_UINT8,
  1306. .offset = offsetof(struct fsp_s_config, ptm_enable),
  1307. .propname = "fsps,ptm-enable",
  1308. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ptm_enable),
  1309. }, {
  1310. .type = FSP_UINT8,
  1311. .offset = offsetof(struct fsp_s_config, pcie_rp_aspm),
  1312. .propname = "fsps,pcie-rp-aspm",
  1313. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_aspm),
  1314. }, {
  1315. .type = FSP_UINT8,
  1316. .offset = offsetof(struct fsp_s_config, pcie_rp_l1_substates),
  1317. .propname = "fsps,pcie-rp-l1-substates",
  1318. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1319. pcie_rp_l1_substates),
  1320. }, {
  1321. .type = FSP_UINT8,
  1322. .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_enable),
  1323. .propname = "fsps,pcie-rp-ltr-enable",
  1324. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ltr_enable),
  1325. }, {
  1326. .type = FSP_UINT8,
  1327. .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_config_lock),
  1328. .propname = "fsps,pcie-rp-ltr-config-lock",
  1329. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1330. pcie_rp_ltr_config_lock),
  1331. }, {
  1332. .type = FSP_UINT8,
  1333. .offset = offsetof(struct fsp_s_config, pme_b0_s5_dis),
  1334. .propname = "fsps,pme-b0-s5-dis",
  1335. }, {
  1336. .type = FSP_UINT8,
  1337. .offset = offsetof(struct fsp_s_config, pci_clock_run),
  1338. .propname = "fsps,pci-clock-run",
  1339. }, {
  1340. .type = FSP_UINT8,
  1341. .offset = offsetof(struct fsp_s_config, timer8254_clk_setting),
  1342. .propname = "fsps,timer8254-clk-setting",
  1343. }, {
  1344. .type = FSP_UINT8,
  1345. .offset = offsetof(struct fsp_s_config, enable_sata),
  1346. .propname = "fsps,enable-sata",
  1347. }, {
  1348. .type = FSP_UINT8,
  1349. .offset = offsetof(struct fsp_s_config, sata_mode),
  1350. .propname = "fsps,sata-mode",
  1351. }, {
  1352. .type = FSP_UINT8,
  1353. .offset = offsetof(struct fsp_s_config, sata_salp_support),
  1354. .propname = "fsps,sata-salp-support",
  1355. }, {
  1356. .type = FSP_UINT8,
  1357. .offset = offsetof(struct fsp_s_config, sata_pwr_opt_enable),
  1358. .propname = "fsps,sata-pwr-opt-enable",
  1359. }, {
  1360. .type = FSP_UINT8,
  1361. .offset = offsetof(struct fsp_s_config, e_sata_speed_limit),
  1362. .propname = "fsps,e-sata-speed-limit",
  1363. }, {
  1364. .type = FSP_UINT8,
  1365. .offset = offsetof(struct fsp_s_config, speed_limit),
  1366. .propname = "fsps,speed-limit",
  1367. }, {
  1368. .type = FSP_UINT8,
  1369. .offset = offsetof(struct fsp_s_config, sata_ports_enable),
  1370. .propname = "fsps,sata-ports-enable",
  1371. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_enable),
  1372. }, {
  1373. .type = FSP_UINT8,
  1374. .offset = offsetof(struct fsp_s_config, sata_ports_dev_slp),
  1375. .propname = "fsps,sata-ports-dev-slp",
  1376. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dev_slp),
  1377. }, {
  1378. .type = FSP_UINT8,
  1379. .offset = offsetof(struct fsp_s_config, sata_ports_hot_plug),
  1380. .propname = "fsps,sata-ports-hot-plug",
  1381. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_hot_plug),
  1382. }, {
  1383. .type = FSP_UINT8,
  1384. .offset = offsetof(struct fsp_s_config, sata_ports_interlock_sw),
  1385. .propname = "fsps,sata-ports-interlock-sw",
  1386. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1387. sata_ports_interlock_sw),
  1388. }, {
  1389. .type = FSP_UINT8,
  1390. .offset = offsetof(struct fsp_s_config, sata_ports_external),
  1391. .propname = "fsps,sata-ports-external",
  1392. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_external),
  1393. }, {
  1394. .type = FSP_UINT8,
  1395. .offset = offsetof(struct fsp_s_config, sata_ports_spin_up),
  1396. .propname = "fsps,sata-ports-spin-up",
  1397. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_spin_up),
  1398. }, {
  1399. .type = FSP_UINT8,
  1400. .offset = offsetof(struct fsp_s_config, sata_ports_solid_state_drive),
  1401. .propname = "fsps,sata-ports-solid-state-drive",
  1402. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1403. sata_ports_solid_state_drive),
  1404. }, {
  1405. .type = FSP_UINT8,
  1406. .offset = offsetof(struct fsp_s_config, sata_ports_enable_dito_config),
  1407. .propname = "fsps,sata-ports-enable-dito-config",
  1408. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1409. sata_ports_enable_dito_config),
  1410. }, {
  1411. .type = FSP_UINT8,
  1412. .offset = offsetof(struct fsp_s_config, sata_ports_dm_val),
  1413. .propname = "fsps,sata-ports-dm-val",
  1414. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dm_val),
  1415. }, {
  1416. .type = FSP_UINT16,
  1417. .offset = offsetof(struct fsp_s_config, sata_ports_dito_val),
  1418. .propname = "fsps,sata-ports-dito-val",
  1419. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dito_val),
  1420. }, {
  1421. .type = FSP_UINT16,
  1422. .offset = offsetof(struct fsp_s_config, sub_system_vendor_id),
  1423. .propname = "fsps,sub-system-vendor-id",
  1424. }, {
  1425. .type = FSP_UINT16,
  1426. .offset = offsetof(struct fsp_s_config, sub_system_id),
  1427. .propname = "fsps,sub-system-id",
  1428. }, {
  1429. .type = FSP_UINT8,
  1430. .offset = offsetof(struct fsp_s_config, crid_settings),
  1431. .propname = "fsps,crid-settings",
  1432. }, {
  1433. .type = FSP_UINT8,
  1434. .offset = offsetof(struct fsp_s_config, reset_select),
  1435. .propname = "fsps,reset-select",
  1436. }, {
  1437. .type = FSP_UINT8,
  1438. .offset = offsetof(struct fsp_s_config, sdcard_enabled),
  1439. .propname = "fsps,sdcard-enabled",
  1440. }, {
  1441. .type = FSP_UINT8,
  1442. .offset = offsetof(struct fsp_s_config, e_mmc_enabled),
  1443. .propname = "fsps,emmc-enabled",
  1444. }, {
  1445. .type = FSP_UINT8,
  1446. .offset = offsetof(struct fsp_s_config, e_mmc_host_max_speed),
  1447. .propname = "fsps,emmc-host-max-speed",
  1448. }, {
  1449. .type = FSP_UINT8,
  1450. .offset = offsetof(struct fsp_s_config, ufs_enabled),
  1451. .propname = "fsps,ufs-enabled",
  1452. }, {
  1453. .type = FSP_UINT8,
  1454. .offset = offsetof(struct fsp_s_config, sdio_enabled),
  1455. .propname = "fsps,sdio-enabled",
  1456. }, {
  1457. .type = FSP_UINT8,
  1458. .offset = offsetof(struct fsp_s_config, gpp_lock),
  1459. .propname = "fsps,gpp-lock",
  1460. }, {
  1461. .type = FSP_UINT8,
  1462. .offset = offsetof(struct fsp_s_config, sirq_enable),
  1463. .propname = "fsps,sirq-enable",
  1464. }, {
  1465. .type = FSP_UINT8,
  1466. .offset = offsetof(struct fsp_s_config, sirq_mode),
  1467. .propname = "fsps,sirq-mode",
  1468. }, {
  1469. .type = FSP_UINT8,
  1470. .offset = offsetof(struct fsp_s_config, start_frame_pulse),
  1471. .propname = "fsps,start-frame-pulse",
  1472. }, {
  1473. .type = FSP_UINT8,
  1474. .offset = offsetof(struct fsp_s_config, smbus_enable),
  1475. .propname = "fsps,smbus-enable",
  1476. }, {
  1477. .type = FSP_UINT8,
  1478. .offset = offsetof(struct fsp_s_config, arp_enable),
  1479. .propname = "fsps,arp-enable",
  1480. }, {
  1481. .type = FSP_UINT16,
  1482. .offset = offsetof(struct fsp_s_config, num_rsvd_smbus_addresses),
  1483. .propname = "fsps,num-rsvd-smbus-addresses",
  1484. }, {
  1485. .type = FSP_UINT8,
  1486. .offset = offsetof(struct fsp_s_config, rsvd_smbus_address_table),
  1487. .propname = "fsps,rsvd-smbus-address-table",
  1488. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1489. rsvd_smbus_address_table),
  1490. }, {
  1491. .type = FSP_UINT8,
  1492. .offset = offsetof(struct fsp_s_config, disable_compliance_mode),
  1493. .propname = "fsps,disable-compliance-mode",
  1494. }, {
  1495. .type = FSP_UINT8,
  1496. .offset = offsetof(struct fsp_s_config, usb_per_port_ctl),
  1497. .propname = "fsps,usb-per-port-ctl",
  1498. }, {
  1499. .type = FSP_UINT8,
  1500. .offset = offsetof(struct fsp_s_config, usb30_mode),
  1501. .propname = "fsps,usb30-mode",
  1502. }, {
  1503. .type = FSP_UINT8,
  1504. .offset = offsetof(struct fsp_s_config, port_usb20_enable),
  1505. .propname = "fsps,port-usb20-enable",
  1506. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb20_enable),
  1507. }, {
  1508. .type = FSP_UINT8,
  1509. .offset = offsetof(struct fsp_s_config, port_us20b_over_current_pin),
  1510. .propname = "fsps,port-us20b-over-current-pin",
  1511. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1512. port_us20b_over_current_pin),
  1513. }, {
  1514. .type = FSP_UINT8,
  1515. .offset = offsetof(struct fsp_s_config, usb_otg),
  1516. .propname = "fsps,usb-otg",
  1517. }, {
  1518. .type = FSP_UINT8,
  1519. .offset = offsetof(struct fsp_s_config, hsic_support_enable),
  1520. .propname = "fsps,hsic-support-enable",
  1521. }, {
  1522. .type = FSP_UINT8,
  1523. .offset = offsetof(struct fsp_s_config, port_usb30_enable),
  1524. .propname = "fsps,port-usb30-enable",
  1525. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb30_enable),
  1526. }, {
  1527. .type = FSP_UINT8,
  1528. .offset = offsetof(struct fsp_s_config, port_us30b_over_current_pin),
  1529. .propname = "fsps,port-us30b-over-current-pin",
  1530. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1531. port_us30b_over_current_pin),
  1532. }, {
  1533. .type = FSP_UINT8,
  1534. .offset = offsetof(struct fsp_s_config, ssic_port_enable),
  1535. .propname = "fsps,ssic-port-enable",
  1536. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_port_enable),
  1537. }, {
  1538. .type = FSP_UINT16,
  1539. .offset = offsetof(struct fsp_s_config, dlane_pwr_gating),
  1540. .propname = "fsps,dlane-pwr-gating",
  1541. }, {
  1542. .type = FSP_UINT8,
  1543. .offset = offsetof(struct fsp_s_config, vtd_enable),
  1544. .propname = "fsps,vtd-enable",
  1545. }, {
  1546. .type = FSP_UINT8,
  1547. .offset = offsetof(struct fsp_s_config, lock_down_global_smi),
  1548. .propname = "fsps,lock-down-global-smi",
  1549. }, {
  1550. .type = FSP_UINT16,
  1551. .offset = offsetof(struct fsp_s_config, reset_wait_timer),
  1552. .propname = "fsps,reset-wait-timer",
  1553. }, {
  1554. .type = FSP_UINT8,
  1555. .offset = offsetof(struct fsp_s_config, rtc_lock),
  1556. .propname = "fsps,rtc-lock",
  1557. }, {
  1558. .type = FSP_UINT8,
  1559. .offset = offsetof(struct fsp_s_config, sata_test_mode),
  1560. .propname = "fsps,sata-test-mode",
  1561. }, {
  1562. .type = FSP_UINT8,
  1563. .offset = offsetof(struct fsp_s_config, ssic_rate),
  1564. .propname = "fsps,ssic-rate",
  1565. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_rate),
  1566. }, {
  1567. .type = FSP_UINT16,
  1568. .offset = offsetof(struct fsp_s_config, dynamic_power_gating),
  1569. .propname = "fsps,dynamic-power-gating",
  1570. }, {
  1571. .type = FSP_UINT16,
  1572. .offset = offsetof(struct fsp_s_config, pcie_rp_ltr_max_snoop_latency),
  1573. .propname = "fsps,pcie-rp-ltr-max-snoop-latency",
  1574. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1575. pcie_rp_ltr_max_snoop_latency),
  1576. }, {
  1577. .type = FSP_UINT8,
  1578. .offset = offsetof(struct fsp_s_config,
  1579. pcie_rp_snoop_latency_override_mode),
  1580. .propname = "fsps,pcie-rp-snoop-latency-override-mode",
  1581. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1582. pcie_rp_snoop_latency_override_mode),
  1583. }, {
  1584. .type = FSP_UINT16,
  1585. .offset = offsetof(struct fsp_s_config,
  1586. pcie_rp_snoop_latency_override_value),
  1587. .propname = "fsps,pcie-rp-snoop-latency-override-value",
  1588. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1589. pcie_rp_snoop_latency_override_value),
  1590. }, {
  1591. .type = FSP_UINT8,
  1592. .offset = offsetof(struct fsp_s_config,
  1593. pcie_rp_snoop_latency_override_multiplier),
  1594. .propname = "fsps,pcie-rp-snoop-latency-override-multiplier",
  1595. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1596. pcie_rp_snoop_latency_override_multiplier),
  1597. }, {
  1598. .type = FSP_UINT8,
  1599. .offset = offsetof(struct fsp_s_config, skip_mp_init),
  1600. .propname = "fsps,skip-mp-init",
  1601. }, {
  1602. .type = FSP_UINT8,
  1603. .offset = offsetof(struct fsp_s_config, dci_auto_detect),
  1604. .propname = "fsps,dci-auto-detect",
  1605. }, {
  1606. .type = FSP_UINT16,
  1607. .offset = offsetof(struct fsp_s_config,
  1608. pcie_rp_ltr_max_non_snoop_latency),
  1609. .propname = "fsps,pcie-rp-ltr-max-non-snoop-latency",
  1610. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1611. pcie_rp_ltr_max_non_snoop_latency),
  1612. }, {
  1613. .type = FSP_UINT8,
  1614. .offset = offsetof(struct fsp_s_config,
  1615. pcie_rp_non_snoop_latency_override_mode),
  1616. .propname = "fsps,pcie-rp-non-snoop-latency-override-mode",
  1617. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1618. pcie_rp_non_snoop_latency_override_mode),
  1619. }, {
  1620. .type = FSP_UINT8,
  1621. .offset = offsetof(struct fsp_s_config, tco_timer_halt_lock),
  1622. .propname = "fsps,tco-timer-halt-lock",
  1623. }, {
  1624. .type = FSP_UINT8,
  1625. .offset = offsetof(struct fsp_s_config, pwr_btn_override_period),
  1626. .propname = "fsps,pwr-btn-override-period",
  1627. }, {
  1628. .type = FSP_UINT16,
  1629. .offset = offsetof(struct fsp_s_config,
  1630. pcie_rp_non_snoop_latency_override_value),
  1631. .propname = "fsps,pcie-rp-non-snoop-latency-override-value",
  1632. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1633. pcie_rp_non_snoop_latency_override_value),
  1634. }, {
  1635. .type = FSP_UINT8,
  1636. .offset = offsetof(struct fsp_s_config,
  1637. pcie_rp_non_snoop_latency_override_multiplier),
  1638. .propname = "fsps,pcie-rp-non-snoop-latency-override-multiplier",
  1639. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1640. pcie_rp_non_snoop_latency_override_multiplier),
  1641. }, {
  1642. .type = FSP_UINT8,
  1643. .offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_scale),
  1644. .propname = "fsps,pcie-rp-slot-power-limit-scale",
  1645. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1646. pcie_rp_slot_power_limit_scale),
  1647. }, {
  1648. .type = FSP_UINT8,
  1649. .offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_value),
  1650. .propname = "fsps,pcie-rp-slot-power-limit-value",
  1651. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1652. pcie_rp_slot_power_limit_value),
  1653. }, {
  1654. .type = FSP_UINT8,
  1655. .offset = offsetof(struct fsp_s_config, disable_native_power_button),
  1656. .propname = "fsps,disable-native-power-button",
  1657. }, {
  1658. .type = FSP_UINT8,
  1659. .offset = offsetof(struct fsp_s_config, power_butter_debounce_mode),
  1660. .propname = "fsps,power-butter-debounce-mode",
  1661. }, {
  1662. .type = FSP_UINT32,
  1663. .offset = offsetof(struct fsp_s_config, sdio_tx_cmd_cntl),
  1664. .propname = "fsps,sdio-tx-cmd-cntl",
  1665. }, {
  1666. .type = FSP_UINT32,
  1667. .offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl1),
  1668. .propname = "fsps,sdio-tx-data-cntl1",
  1669. }, {
  1670. .type = FSP_UINT32,
  1671. .offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl2),
  1672. .propname = "fsps,sdio-tx-data-cntl2",
  1673. }, {
  1674. .type = FSP_UINT32,
  1675. .offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl1),
  1676. .propname = "fsps,sdio-rx-cmd-data-cntl1",
  1677. }, {
  1678. .type = FSP_UINT32,
  1679. .offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl2),
  1680. .propname = "fsps,sdio-rx-cmd-data-cntl2",
  1681. }, {
  1682. .type = FSP_UINT32,
  1683. .offset = offsetof(struct fsp_s_config, sdcard_tx_cmd_cntl),
  1684. .propname = "fsps,sdcard-tx-cmd-cntl",
  1685. }, {
  1686. .type = FSP_UINT32,
  1687. .offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl1),
  1688. .propname = "fsps,sdcard-tx-data-cntl1",
  1689. }, {
  1690. .type = FSP_UINT32,
  1691. .offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl2),
  1692. .propname = "fsps,sdcard-tx-data-cntl2",
  1693. }, {
  1694. .type = FSP_UINT32,
  1695. .offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl1),
  1696. .propname = "fsps,sdcard-rx-cmd-data-cntl1",
  1697. }, {
  1698. .type = FSP_UINT32,
  1699. .offset = offsetof(struct fsp_s_config, sdcard_rx_strobe_cntl),
  1700. .propname = "fsps,sdcard-rx-strobe-cntl",
  1701. }, {
  1702. .type = FSP_UINT32,
  1703. .offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl2),
  1704. .propname = "fsps,sdcard-rx-cmd-data-cntl2",
  1705. }, {
  1706. .type = FSP_UINT32,
  1707. .offset = offsetof(struct fsp_s_config, emmc_tx_cmd_cntl),
  1708. .propname = "fsps,emmc-tx-cmd-cntl",
  1709. }, {
  1710. .type = FSP_UINT32,
  1711. .offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl1),
  1712. .propname = "fsps,emmc-tx-data-cntl1",
  1713. }, {
  1714. .type = FSP_UINT32,
  1715. .offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl2),
  1716. .propname = "fsps,emmc-tx-data-cntl2",
  1717. }, {
  1718. .type = FSP_UINT32,
  1719. .offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl1),
  1720. .propname = "fsps,emmc-rx-cmd-data-cntl1",
  1721. }, {
  1722. .type = FSP_UINT32,
  1723. .offset = offsetof(struct fsp_s_config, emmc_rx_strobe_cntl),
  1724. .propname = "fsps,emmc-rx-strobe-cntl",
  1725. }, {
  1726. .type = FSP_UINT32,
  1727. .offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl2),
  1728. .propname = "fsps,emmc-rx-cmd-data-cntl2",
  1729. }, {
  1730. .type = FSP_UINT32,
  1731. .offset = offsetof(struct fsp_s_config, emmc_master_sw_cntl),
  1732. .propname = "fsps,emmc-master-sw-cntl",
  1733. }, {
  1734. .type = FSP_UINT8,
  1735. .offset = offsetof(struct fsp_s_config, pcie_rp_selectable_deemphasis),
  1736. .propname = "fsps,pcie-rp-selectable-deemphasis",
  1737. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1738. pcie_rp_selectable_deemphasis),
  1739. }, {
  1740. .type = FSP_UINT8,
  1741. .offset = offsetof(struct fsp_s_config, monitor_mwait_enable),
  1742. .propname = "fsps,monitor-mwait-enable",
  1743. }, {
  1744. .type = FSP_UINT8,
  1745. .offset = offsetof(struct fsp_s_config, hd_audio_dsp_uaa_compliance),
  1746. .propname = "fsps,hd-audio-dsp-uaa-compliance",
  1747. }, {
  1748. .type = FSP_UINT32,
  1749. .offset = offsetof(struct fsp_s_config, ipc),
  1750. .propname = "fsps,ipc",
  1751. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ipc),
  1752. }, {
  1753. .type = FSP_UINT8,
  1754. .offset = offsetof(struct fsp_s_config, sata_ports_disable_dynamic_pg),
  1755. .propname = "fsps,sata-ports-disable-dynamic-pg",
  1756. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1757. sata_ports_disable_dynamic_pg),
  1758. }, {
  1759. .type = FSP_UINT8,
  1760. .offset = offsetof(struct fsp_s_config, init_s3_cpu),
  1761. .propname = "fsps,init-s3-cpu",
  1762. }, {
  1763. .type = FSP_UINT8,
  1764. .offset = offsetof(struct fsp_s_config, skip_punit_init),
  1765. .propname = "fsps,skip-punit-init",
  1766. }, {
  1767. .type = FSP_UINT8,
  1768. .offset = offsetof(struct fsp_s_config, port_usb20_per_port_tx_pe_half),
  1769. .propname = "fsps,port-usb20-per-port-tx-pe-half",
  1770. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1771. port_usb20_per_port_tx_pe_half),
  1772. }, {
  1773. .type = FSP_UINT8,
  1774. .offset = offsetof(struct fsp_s_config, port_usb20_per_port_pe_txi_set),
  1775. .propname = "fsps,port-usb20-per-port-pe-txi-set",
  1776. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1777. port_usb20_per_port_pe_txi_set),
  1778. }, {
  1779. .type = FSP_UINT8,
  1780. .offset = offsetof(struct fsp_s_config, port_usb20_per_port_txi_set),
  1781. .propname = "fsps,port-usb20-per-port-txi-set",
  1782. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1783. port_usb20_per_port_txi_set),
  1784. }, {
  1785. .type = FSP_UINT8,
  1786. .offset = offsetof(struct fsp_s_config, port_usb20_hs_skew_sel),
  1787. .propname = "fsps,port-usb20-hs-skew-sel",
  1788. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1789. port_usb20_hs_skew_sel),
  1790. }, {
  1791. .type = FSP_UINT8,
  1792. .offset = offsetof(struct fsp_s_config,
  1793. port_usb20_i_usb_tx_emphasis_en),
  1794. .propname = "fsps,port-usb20-i-usb-tx-emphasis-en",
  1795. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1796. port_usb20_i_usb_tx_emphasis_en),
  1797. }, {
  1798. .type = FSP_UINT8,
  1799. .offset = offsetof(struct fsp_s_config,
  1800. port_usb20_per_port_rxi_set),
  1801. .propname = "fsps,port-usb20-per-port-rxi-set",
  1802. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1803. port_usb20_per_port_rxi_set),
  1804. }, {
  1805. .type = FSP_UINT8,
  1806. .offset = offsetof(struct fsp_s_config, port_usb20_hs_npre_drv_sel),
  1807. .propname = "fsps,port-usb20-hs-npre-drv-sel",
  1808. .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
  1809. port_usb20_hs_npre_drv_sel),
  1810. }, {
  1811. .type = FSP_UINT8,
  1812. .offset = offsetof(struct fsp_s_config, os_selection),
  1813. .propname = "fsps,os-selection",
  1814. }, {
  1815. .type = FSP_UINT8,
  1816. .offset = offsetof(struct fsp_s_config, dptf_enabled),
  1817. .propname = "fsps,dptf-enabled",
  1818. }, {
  1819. .type = FSP_UINT8,
  1820. .offset = offsetof(struct fsp_s_config, pwm_enabled),
  1821. .propname = "fsps,pwm-enabled",
  1822. }, {
  1823. .propname = NULL
  1824. }
  1825. };
  1826. int fsp_s_update_config_from_dtb(ofnode node, struct fsp_s_config *cfg)
  1827. {
  1828. return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_s_bindings);
  1829. }
  1830. #endif