altera.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2003
  4. * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
  5. *
  6. * (C) Copyright 2002
  7. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  8. */
  9. /*
  10. * Altera FPGA support
  11. */
  12. #include <common.h>
  13. #include <errno.h>
  14. #include <ACEX1K.h>
  15. #include <log.h>
  16. #include <stratixII.h>
  17. /* Define FPGA_DEBUG to 1 to get debug printf's */
  18. #define FPGA_DEBUG 0
  19. static const struct altera_fpga {
  20. enum altera_family family;
  21. const char *name;
  22. int (*load)(Altera_desc *, const void *, size_t);
  23. int (*dump)(Altera_desc *, const void *, size_t);
  24. int (*info)(Altera_desc *);
  25. } altera_fpga[] = {
  26. #if defined(CONFIG_FPGA_ACEX1K)
  27. { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
  28. { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
  29. #elif defined(CONFIG_FPGA_CYCLON2)
  30. { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
  31. { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
  32. #endif
  33. #if defined(CONFIG_FPGA_STRATIX_II)
  34. { Altera_StratixII, "StratixII", StratixII_load,
  35. StratixII_dump, StratixII_info },
  36. #endif
  37. #if defined(CONFIG_FPGA_STRATIX_V)
  38. { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
  39. #endif
  40. #if defined(CONFIG_FPGA_STRATIX10)
  41. { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL, NULL },
  42. #endif
  43. #if defined(CONFIG_FPGA_SOCFPGA)
  44. { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
  45. #endif
  46. };
  47. static int altera_validate(Altera_desc *desc, const char *fn)
  48. {
  49. if (!desc) {
  50. printf("%s: NULL descriptor!\n", fn);
  51. return -EINVAL;
  52. }
  53. if ((desc->family < min_altera_type) ||
  54. (desc->family > max_altera_type)) {
  55. printf("%s: Invalid family type, %d\n", fn, desc->family);
  56. return -EINVAL;
  57. }
  58. if ((desc->iface < min_altera_iface_type) ||
  59. (desc->iface > max_altera_iface_type)) {
  60. printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
  61. return -EINVAL;
  62. }
  63. if (!desc->size) {
  64. printf("%s: NULL part size\n", fn);
  65. return -EINVAL;
  66. }
  67. return 0;
  68. }
  69. static const struct altera_fpga *
  70. altera_desc_to_fpga(Altera_desc *desc, const char *fn)
  71. {
  72. int i;
  73. if (altera_validate(desc, fn)) {
  74. printf("%s: Invalid device descriptor\n", fn);
  75. return NULL;
  76. }
  77. for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
  78. if (desc->family == altera_fpga[i].family)
  79. break;
  80. }
  81. if (i == ARRAY_SIZE(altera_fpga)) {
  82. printf("%s: Unsupported family type, %d\n", fn, desc->family);
  83. return NULL;
  84. }
  85. return &altera_fpga[i];
  86. }
  87. int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
  88. {
  89. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  90. if (!fpga)
  91. return FPGA_FAIL;
  92. debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
  93. __func__, fpga->name);
  94. if (fpga->load)
  95. return fpga->load(desc, buf, bsize);
  96. return 0;
  97. }
  98. int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
  99. {
  100. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  101. if (!fpga)
  102. return FPGA_FAIL;
  103. debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
  104. __func__, fpga->name);
  105. if (fpga->dump)
  106. return fpga->dump(desc, buf, bsize);
  107. return 0;
  108. }
  109. int altera_info(Altera_desc *desc)
  110. {
  111. const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
  112. if (!fpga)
  113. return FPGA_FAIL;
  114. printf("Family: \t%s\n", fpga->name);
  115. printf("Interface type:\t");
  116. switch (desc->iface) {
  117. case passive_serial:
  118. printf("Passive Serial (PS)\n");
  119. break;
  120. case passive_parallel_synchronous:
  121. printf("Passive Parallel Synchronous (PPS)\n");
  122. break;
  123. case passive_parallel_asynchronous:
  124. printf("Passive Parallel Asynchronous (PPA)\n");
  125. break;
  126. case passive_serial_asynchronous:
  127. printf("Passive Serial Asynchronous (PSA)\n");
  128. break;
  129. case altera_jtag_mode: /* Not used */
  130. printf("JTAG Mode\n");
  131. break;
  132. case fast_passive_parallel:
  133. printf("Fast Passive Parallel (FPP)\n");
  134. break;
  135. case fast_passive_parallel_security:
  136. printf("Fast Passive Parallel with Security (FPPS)\n");
  137. break;
  138. case secure_device_manager_mailbox:
  139. puts("Secure Device Manager (SDM) Mailbox\n");
  140. break;
  141. /* Add new interface types here */
  142. default:
  143. printf("Unsupported interface type, %d\n", desc->iface);
  144. }
  145. printf("Device Size: \t%zd bytes\n"
  146. "Cookie: \t0x%x (%d)\n",
  147. desc->size, desc->cookie, desc->cookie);
  148. if (desc->iface_fns) {
  149. printf("Device Function Table @ 0x%p\n", desc->iface_fns);
  150. if (fpga->info)
  151. fpga->info(desc);
  152. } else {
  153. printf("No Device Function Table.\n");
  154. }
  155. return FPGA_SUCCESS;
  156. }