regs-timrot.h 11 KB

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  1. /*
  2. * Freescale i.MX28 TIMROT Register Definitions
  3. *
  4. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  5. *
  6. * Based on code from LTIB:
  7. * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #ifndef __MX28_REGS_TIMROT_H__
  25. #define __MX28_REGS_TIMROT_H__
  26. #include <asm/arch/regs-common.h>
  27. #ifndef __ASSEMBLY__
  28. struct mxs_timrot_regs {
  29. mxs_reg_32(hw_timrot_rotctrl)
  30. mxs_reg_32(hw_timrot_rotcount)
  31. #if defined(CONFIG_MX23)
  32. mxs_reg_32(hw_timrot_timctrl0)
  33. mxs_reg_32(hw_timrot_timcount0)
  34. mxs_reg_32(hw_timrot_timctrl1)
  35. mxs_reg_32(hw_timrot_timcount1)
  36. mxs_reg_32(hw_timrot_timctrl2)
  37. mxs_reg_32(hw_timrot_timcount2)
  38. mxs_reg_32(hw_timrot_timctrl3)
  39. mxs_reg_32(hw_timrot_timcount3)
  40. #elif defined(CONFIG_MX28)
  41. mxs_reg_32(hw_timrot_timctrl0)
  42. mxs_reg_32(hw_timrot_running_count0)
  43. mxs_reg_32(hw_timrot_fixed_count0)
  44. mxs_reg_32(hw_timrot_match_count0)
  45. mxs_reg_32(hw_timrot_timctrl1)
  46. mxs_reg_32(hw_timrot_running_count1)
  47. mxs_reg_32(hw_timrot_fixed_count1)
  48. mxs_reg_32(hw_timrot_match_count1)
  49. mxs_reg_32(hw_timrot_timctrl2)
  50. mxs_reg_32(hw_timrot_running_count2)
  51. mxs_reg_32(hw_timrot_fixed_count2)
  52. mxs_reg_32(hw_timrot_match_count2)
  53. mxs_reg_32(hw_timrot_timctrl3)
  54. mxs_reg_32(hw_timrot_running_count3)
  55. mxs_reg_32(hw_timrot_fixed_count3)
  56. mxs_reg_32(hw_timrot_match_count3)
  57. #endif
  58. mxs_reg_32(hw_timrot_version)
  59. };
  60. #endif
  61. #define TIMROT_ROTCTRL_SFTRST (1 << 31)
  62. #define TIMROT_ROTCTRL_CLKGATE (1 << 30)
  63. #define TIMROT_ROTCTRL_ROTARY_PRESENT (1 << 29)
  64. #define TIMROT_ROTCTRL_TIM3_PRESENT (1 << 28)
  65. #define TIMROT_ROTCTRL_TIM2_PRESENT (1 << 27)
  66. #define TIMROT_ROTCTRL_TIM1_PRESENT (1 << 26)
  67. #define TIMROT_ROTCTRL_TIM0_PRESENT (1 << 25)
  68. #define TIMROT_ROTCTRL_STATE_MASK (0x7 << 22)
  69. #define TIMROT_ROTCTRL_STATE_OFFSET 22
  70. #define TIMROT_ROTCTRL_DIVIDER_MASK (0x3f << 16)
  71. #define TIMROT_ROTCTRL_DIVIDER_OFFSET 16
  72. #define TIMROT_ROTCTRL_RELATIVE (1 << 12)
  73. #define TIMROT_ROTCTRL_OVERSAMPLE_MASK (0x3 << 10)
  74. #define TIMROT_ROTCTRL_OVERSAMPLE_OFFSET 10
  75. #define TIMROT_ROTCTRL_OVERSAMPLE_8X (0x0 << 10)
  76. #define TIMROT_ROTCTRL_OVERSAMPLE_4X (0x1 << 10)
  77. #define TIMROT_ROTCTRL_OVERSAMPLE_2X (0x2 << 10)
  78. #define TIMROT_ROTCTRL_OVERSAMPLE_1X (0x3 << 10)
  79. #define TIMROT_ROTCTRL_POLARITY_B (1 << 9)
  80. #define TIMROT_ROTCTRL_POLARITY_A (1 << 8)
  81. #if defined(CONFIG_MX23)
  82. #define TIMROT_ROTCTRL_SELECT_B_MASK (0x7 << 4)
  83. #elif defined(CONFIG_MX28)
  84. #define TIMROT_ROTCTRL_SELECT_B_MASK (0xf << 4)
  85. #endif
  86. #define TIMROT_ROTCTRL_SELECT_B_OFFSET 4
  87. #define TIMROT_ROTCTRL_SELECT_B_NEVER_TICK (0x0 << 4)
  88. #define TIMROT_ROTCTRL_SELECT_B_PWM0 (0x1 << 4)
  89. #define TIMROT_ROTCTRL_SELECT_B_PWM1 (0x2 << 4)
  90. #define TIMROT_ROTCTRL_SELECT_B_PWM2 (0x3 << 4)
  91. #define TIMROT_ROTCTRL_SELECT_B_PWM3 (0x4 << 4)
  92. #define TIMROT_ROTCTRL_SELECT_B_PWM4 (0x5 << 4)
  93. #if defined(CONFIG_MX23)
  94. #define TIMROT_ROTCTRL_SELECT_B_ROTARYA (0x6 << 4)
  95. #define TIMROT_ROTCTRL_SELECT_B_ROTARYB (0x7 << 4)
  96. #elif defined(CONFIG_MX28)
  97. #define TIMROT_ROTCTRL_SELECT_B_PWM5 (0x6 << 4)
  98. #define TIMROT_ROTCTRL_SELECT_B_PWM6 (0x7 << 4)
  99. #define TIMROT_ROTCTRL_SELECT_B_PWM7 (0x8 << 4)
  100. #define TIMROT_ROTCTRL_SELECT_B_ROTARYA (0x9 << 4)
  101. #define TIMROT_ROTCTRL_SELECT_B_ROTARYB (0xa << 4)
  102. #endif
  103. #if defined(CONFIG_MX23)
  104. #define TIMROT_ROTCTRL_SELECT_A_MASK 0x7
  105. #elif defined(CONFIG_MX28)
  106. #define TIMROT_ROTCTRL_SELECT_A_MASK 0xf
  107. #endif
  108. #define TIMROT_ROTCTRL_SELECT_A_OFFSET 0
  109. #define TIMROT_ROTCTRL_SELECT_A_NEVER_TICK 0x0
  110. #define TIMROT_ROTCTRL_SELECT_A_PWM0 0x1
  111. #define TIMROT_ROTCTRL_SELECT_A_PWM1 0x2
  112. #define TIMROT_ROTCTRL_SELECT_A_PWM2 0x3
  113. #define TIMROT_ROTCTRL_SELECT_A_PWM3 0x4
  114. #define TIMROT_ROTCTRL_SELECT_A_PWM4 0x5
  115. #if defined(CONFIG_MX23)
  116. #define TIMROT_ROTCTRL_SELECT_A_ROTARYA 0x6
  117. #define TIMROT_ROTCTRL_SELECT_A_ROTARYB 0x7
  118. #elif defined(CONFIG_MX28)
  119. #define TIMROT_ROTCTRL_SELECT_A_PWM5 0x6
  120. #define TIMROT_ROTCTRL_SELECT_A_PWM6 0x7
  121. #define TIMROT_ROTCTRL_SELECT_A_PWM7 0x8
  122. #define TIMROT_ROTCTRL_SELECT_A_ROTARYA 0x9
  123. #define TIMROT_ROTCTRL_SELECT_A_ROTARYB 0xa
  124. #endif
  125. #define TIMROT_ROTCOUNT_UPDOWN_MASK 0xffff
  126. #define TIMROT_ROTCOUNT_UPDOWN_OFFSET 0
  127. #define TIMROT_TIMCTRLn_IRQ (1 << 15)
  128. #define TIMROT_TIMCTRLn_IRQ_EN (1 << 14)
  129. #if defined(CONFIG_MX28)
  130. #define TIMROT_TIMCTRLn_MATCH_MODE (1 << 11)
  131. #endif
  132. #define TIMROT_TIMCTRLn_POLARITY (1 << 8)
  133. #define TIMROT_TIMCTRLn_UPDATE (1 << 7)
  134. #define TIMROT_TIMCTRLn_RELOAD (1 << 6)
  135. #define TIMROT_TIMCTRLn_PRESCALE_MASK (0x3 << 4)
  136. #define TIMROT_TIMCTRLn_PRESCALE_OFFSET 4
  137. #define TIMROT_TIMCTRLn_PRESCALE_DIV_BY_1 (0x0 << 4)
  138. #define TIMROT_TIMCTRLn_PRESCALE_DIV_BY_2 (0x1 << 4)
  139. #define TIMROT_TIMCTRLn_PRESCALE_DIV_BY_4 (0x2 << 4)
  140. #define TIMROT_TIMCTRLn_PRESCALE_DIV_BY_8 (0x3 << 4)
  141. #define TIMROT_TIMCTRLn_SELECT_MASK 0xf
  142. #define TIMROT_TIMCTRLn_SELECT_OFFSET 0
  143. #define TIMROT_TIMCTRLn_SELECT_NEVER_TICK 0x0
  144. #define TIMROT_TIMCTRLn_SELECT_PWM0 0x1
  145. #define TIMROT_TIMCTRLn_SELECT_PWM1 0x2
  146. #define TIMROT_TIMCTRLn_SELECT_PWM2 0x3
  147. #define TIMROT_TIMCTRLn_SELECT_PWM3 0x4
  148. #define TIMROT_TIMCTRLn_SELECT_PWM4 0x5
  149. #if defined(CONFIG_MX23)
  150. #define TIMROT_TIMCTRLn_SELECT_ROTARYA 0x6
  151. #define TIMROT_TIMCTRLn_SELECT_ROTARYB 0x7
  152. #define TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL 0x8
  153. #define TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL 0x9
  154. #define TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL 0xa
  155. #define TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL 0xb
  156. #define TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS 0xc
  157. #elif defined(CONFIG_MX28)
  158. #define TIMROT_TIMCTRLn_SELECT_PWM5 0x6
  159. #define TIMROT_TIMCTRLn_SELECT_PWM6 0x7
  160. #define TIMROT_TIMCTRLn_SELECT_PWM7 0x8
  161. #define TIMROT_TIMCTRLn_SELECT_ROTARYA 0x9
  162. #define TIMROT_TIMCTRLn_SELECT_ROTARYB 0xa
  163. #define TIMROT_TIMCTRLn_SELECT_32KHZ_XTAL 0xb
  164. #define TIMROT_TIMCTRLn_SELECT_8KHZ_XTAL 0xc
  165. #define TIMROT_TIMCTRLn_SELECT_4KHZ_XTAL 0xd
  166. #define TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL 0xe
  167. #define TIMROT_TIMCTRLn_SELECT_TICK_ALWAYS 0xf
  168. #endif
  169. #if defined(CONFIG_MX23)
  170. #define TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK (0xffff << 16)
  171. #define TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET 16
  172. #elif defined(CONFIG_MX28)
  173. #define TIMROT_RUNNING_COUNTn_RUNNING_COUNT_MASK 0xffffffff
  174. #define TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET 0
  175. #endif
  176. #if defined(CONFIG_MX23)
  177. #define TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK 0xffff
  178. #define TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET 0
  179. #elif defined(CONFIG_MX28)
  180. #define TIMROT_FIXED_COUNTn_FIXED_COUNT_MASK 0xffffffff
  181. #define TIMROT_FIXED_COUNTn_FIXED_COUNT_OFFSET 0
  182. #endif
  183. #if defined(CONFIG_MX28)
  184. #define TIMROT_MATCH_COUNTn_MATCH_COUNT_MASK 0xffffffff
  185. #define TIMROT_MATCH_COUNTn_MATCH_COUNT_OFFSET 0
  186. #endif
  187. #define TIMROT_TIMCTRL3_TEST_SIGNAL_MASK (0xf << 16)
  188. #define TIMROT_TIMCTRL3_TEST_SIGNAL_OFFSET 16
  189. #define TIMROT_TIMCTRL3_TEST_SIGNAL_NEVER_TICK (0x0 << 16)
  190. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM0 (0x1 << 16)
  191. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM1 (0x2 << 16)
  192. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM2 (0x3 << 16)
  193. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM3 (0x4 << 16)
  194. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM4 (0x5 << 16)
  195. #if defined(CONFIG_MX23)
  196. #define TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA (0x6 << 16)
  197. #define TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB (0x7 << 16)
  198. #define TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL (0x8 << 16)
  199. #define TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL (0x9 << 16)
  200. #define TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL (0xa << 16)
  201. #define TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL (0xb << 16)
  202. #define TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS (0xc << 16)
  203. #elif defined(CONFIG_MX28)
  204. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM5 (0x6 << 16)
  205. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM6 (0x7 << 16)
  206. #define TIMROT_TIMCTRL3_TEST_SIGNAL_PWM7 (0x8 << 16)
  207. #define TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYA (0x9 << 16)
  208. #define TIMROT_TIMCTRL3_TEST_SIGNAL_ROTARYB (0xa << 16)
  209. #define TIMROT_TIMCTRL3_TEST_SIGNAL_32KHZ_XTAL (0xb << 16)
  210. #define TIMROT_TIMCTRL3_TEST_SIGNAL_8KHZ_XTAL (0xc << 16)
  211. #define TIMROT_TIMCTRL3_TEST_SIGNAL_4KHZ_XTAL (0xd << 16)
  212. #define TIMROT_TIMCTRL3_TEST_SIGNAL_1KHZ_XTAL (0xe << 16)
  213. #define TIMROT_TIMCTRL3_TEST_SIGNAL_TICK_ALWAYS (0xf << 16)
  214. #endif
  215. #if defined(CONFIG_MX23)
  216. #define TIMROT_TIMCTRL3_IRQ (1 << 15)
  217. #define TIMROT_TIMCTRL3_IRQ_EN (1 << 14)
  218. #define TIMROT_TIMCTRL3_DUTU_VALID (1 << 10)
  219. #endif
  220. #define TIMROT_TIMCTRL3_DUTY_CYCLE (1 << 9)
  221. #if defined(CONFIG_MX23)
  222. #define TIMROT_TIMCTRL3_POLARITY_MASK (0x1 << 8)
  223. #define TIMROT_TIMCTRL3_POLARITY_OFFSET 8
  224. #define TIMROT_TIMCTRL3_POLARITY_POSITIVE (0x0 << 8)
  225. #define TIMROT_TIMCTRL3_POLARITY_NEGATIVE (0x1 << 8)
  226. #define TIMROT_TIMCTRL3_UPDATE (1 << 7)
  227. #define TIMROT_TIMCTRL3_RELOAD (1 << 6)
  228. #define TIMROT_TIMCTRL3_PRESCALE_MASK (0x3 << 4)
  229. #define TIMROT_TIMCTRL3_PRESCALE_OFFSET 4
  230. #define TIMROT_TIMCTRL3_PRESCALE_DIV_BY_1 (0x0 << 4)
  231. #define TIMROT_TIMCTRL3_PRESCALE_DIV_BY_2 (0x1 << 4)
  232. #define TIMROT_TIMCTRL3_PRESCALE_DIV_BY_4 (0x2 << 4)
  233. #define TIMROT_TIMCTRL3_PRESCALE_DIV_BY_8 (0x3 << 4)
  234. #define TIMROT_TIMCTRL3_SELECT_MASK 0xf
  235. #define TIMROT_TIMCTRL3_SELECT_OFFSET 0
  236. #define TIMROT_TIMCTRL3_SELECT_NEVER_TICK 0x0
  237. #define TIMROT_TIMCTRL3_SELECT_PWM0 0x1
  238. #define TIMROT_TIMCTRL3_SELECT_PWM1 0x2
  239. #define TIMROT_TIMCTRL3_SELECT_PWM2 0x3
  240. #define TIMROT_TIMCTRL3_SELECT_PWM3 0x4
  241. #define TIMROT_TIMCTRL3_SELECT_PWM4 0x5
  242. #define TIMROT_TIMCTRL3_SELECT_ROTARYA 0x6
  243. #define TIMROT_TIMCTRL3_SELECT_ROTARYB 0x7
  244. #define TIMROT_TIMCTRL3_SELECT_32KHZ_XTAL 0x8
  245. #define TIMROT_TIMCTRL3_SELECT_8KHZ_XTAL 0x9
  246. #define TIMROT_TIMCTRL3_SELECT_4KHZ_XTAL 0xa
  247. #define TIMROT_TIMCTRL3_SELECT_1KHZ_XTAL 0xb
  248. #define TIMROT_TIMCTRL3_SELECT_TICK_ALWAYS 0xc
  249. #define TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_MASK (0xffff << 16)
  250. #define TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT_OFFSET 16
  251. #define TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_MASK 0xffff
  252. #define TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT_OFFSET 0
  253. #endif
  254. #define TIMROT_VERSION_MAJOR_MASK (0xff << 24)
  255. #define TIMROT_VERSION_MAJOR_OFFSET 24
  256. #define TIMROT_VERSION_MINOR_MASK (0xff << 16)
  257. #define TIMROT_VERSION_MINOR_OFFSET 16
  258. #define TIMROT_VERSION_STEP_MASK 0xffff
  259. #define TIMROT_VERSION_STEP_OFFSET 0
  260. #endif /* __MX28_REGS_TIMROT_H__ */