usb_ohci.c 40 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the PPC440EP.
  3. *
  4. * (C) Copyright 2003-2004
  5. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  6. *
  7. * (C) Copyright 2004
  8. * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
  9. *
  10. * Note: Much of this code has been derived from Linux 2.4
  11. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  12. * (C) Copyright 2000-2002 David Brownell
  13. *
  14. * SPDX-License-Identifier: GPL-2.0+
  15. */
  16. /*
  17. * IMPORTANT NOTES
  18. * 1 - this driver is intended for use with USB Mass Storage Devices
  19. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  20. */
  21. #include <common.h>
  22. #ifdef CONFIG_USB_OHCI
  23. #include <malloc.h>
  24. #include <usb.h>
  25. #include "usb_ohci.h"
  26. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  27. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  28. #undef DEBUG
  29. #undef SHOW_INFO
  30. #undef OHCI_FILL_TRACE
  31. /* For initializing controller (mask in an HCFS mode too) */
  32. #define OHCI_CONTROL_INIT \
  33. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  34. #define readl(a) (*((volatile u32 *)(a)))
  35. #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  36. #ifdef DEBUG
  37. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  38. #else
  39. #define dbg(format, arg...) do {} while(0)
  40. #endif /* DEBUG */
  41. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  42. #ifdef SHOW_INFO
  43. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  44. #else
  45. #define info(format, arg...) do {} while(0)
  46. #endif
  47. #define m16_swap(x) swap_16(x)
  48. #define m32_swap(x) swap_32(x)
  49. #if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
  50. #define ohci_cpu_to_le16(x) (x)
  51. #define ohci_cpu_to_le32(x) (x)
  52. #else
  53. #define ohci_cpu_to_le16(x) swap_16(x)
  54. #define ohci_cpu_to_le32(x) swap_32(x)
  55. #endif
  56. /* global ohci_t */
  57. static ohci_t gohci;
  58. /* this must be aligned to a 256 byte boundary */
  59. struct ohci_hcca ghcca[1];
  60. /* a pointer to the aligned storage */
  61. struct ohci_hcca *phcca;
  62. /* this allocates EDs for all possible endpoints */
  63. struct ohci_device ohci_dev;
  64. /* urb_priv */
  65. urb_priv_t urb_priv;
  66. /* RHSC flag */
  67. int got_rhsc;
  68. /* device which was disconnected */
  69. struct usb_device *devgone;
  70. /* flag guarding URB transation */
  71. int urb_finished = 0;
  72. /*-------------------------------------------------------------------------*/
  73. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  74. * The erratum (#4) description is incorrect. AMD's workaround waits
  75. * till some bits (mostly reserved) are clear; ok for all revs.
  76. */
  77. #define OHCI_QUIRK_AMD756 0xabcd
  78. #define read_roothub(hc, register, mask) ({ \
  79. u32 temp = readl (&hc->regs->roothub.register); \
  80. if (hc->flags & OHCI_QUIRK_AMD756) \
  81. while (temp & mask) \
  82. temp = readl (&hc->regs->roothub.register); \
  83. temp; })
  84. static u32 roothub_a (struct ohci *hc)
  85. { return read_roothub (hc, a, 0xfc0fe000); }
  86. static inline u32 roothub_b (struct ohci *hc)
  87. { return readl (&hc->regs->roothub.b); }
  88. static inline u32 roothub_status (struct ohci *hc)
  89. { return readl (&hc->regs->roothub.status); }
  90. static u32 roothub_portstatus (struct ohci *hc, int i)
  91. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  92. /* forward declaration */
  93. static int hc_interrupt (void);
  94. static void
  95. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  96. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  97. /*-------------------------------------------------------------------------*
  98. * URB support functions
  99. *-------------------------------------------------------------------------*/
  100. /* free HCD-private data associated with this URB */
  101. static void urb_free_priv (urb_priv_t * urb)
  102. {
  103. int i;
  104. int last;
  105. struct td * td;
  106. last = urb->length - 1;
  107. if (last >= 0) {
  108. for (i = 0; i <= last; i++) {
  109. td = urb->td[i];
  110. if (td) {
  111. td->usb_dev = NULL;
  112. urb->td[i] = NULL;
  113. }
  114. }
  115. }
  116. }
  117. /*-------------------------------------------------------------------------*/
  118. #ifdef DEBUG
  119. static int sohci_get_current_frame_number (struct usb_device * dev);
  120. /* debug| print the main components of an URB
  121. * small: 0) header + data packets 1) just header */
  122. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  123. int transfer_len, struct devrequest * setup, char * str, int small)
  124. {
  125. urb_priv_t * purb = &urb_priv;
  126. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  127. str,
  128. sohci_get_current_frame_number (dev),
  129. usb_pipedevice (pipe),
  130. usb_pipeendpoint (pipe),
  131. usb_pipeout (pipe)? 'O': 'I',
  132. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  133. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  134. purb->actual_length,
  135. transfer_len, dev->status);
  136. #ifdef OHCI_VERBOSE_DEBUG
  137. if (!small) {
  138. int i, len;
  139. if (usb_pipecontrol (pipe)) {
  140. printf (__FILE__ ": cmd(8):");
  141. for (i = 0; i < 8 ; i++)
  142. printf (" %02x", ((__u8 *) setup) [i]);
  143. printf ("\n");
  144. }
  145. if (transfer_len > 0 && buffer) {
  146. printf (__FILE__ ": data(%d/%d):",
  147. purb->actual_length,
  148. transfer_len);
  149. len = usb_pipeout (pipe)?
  150. transfer_len: purb->actual_length;
  151. for (i = 0; i < 16 && i < len; i++)
  152. printf (" %02x", ((__u8 *) buffer) [i]);
  153. printf ("%s\n", i < len? "...": "");
  154. }
  155. }
  156. #endif
  157. }
  158. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  159. void ep_print_int_eds (ohci_t *ohci, char * str) {
  160. int i, j;
  161. __u32 * ed_p;
  162. for (i= 0; i < 32; i++) {
  163. j = 5;
  164. ed_p = &(ohci->hcca->int_table [i]);
  165. if (*ed_p == 0)
  166. continue;
  167. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  168. while (*ed_p != 0 && j--) {
  169. ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
  170. printf (" ed: %4x;", ed->hwINFO);
  171. ed_p = &ed->hwNextED;
  172. }
  173. printf ("\n");
  174. }
  175. }
  176. static void ohci_dump_intr_mask (char *label, __u32 mask)
  177. {
  178. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  179. label,
  180. mask,
  181. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  182. (mask & OHCI_INTR_OC) ? " OC" : "",
  183. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  184. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  185. (mask & OHCI_INTR_UE) ? " UE" : "",
  186. (mask & OHCI_INTR_RD) ? " RD" : "",
  187. (mask & OHCI_INTR_SF) ? " SF" : "",
  188. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  189. (mask & OHCI_INTR_SO) ? " SO" : ""
  190. );
  191. }
  192. static void maybe_print_eds (char *label, __u32 value)
  193. {
  194. ed_t *edp = (ed_t *)value;
  195. if (value) {
  196. dbg ("%s %08x", label, value);
  197. dbg ("%08x", edp->hwINFO);
  198. dbg ("%08x", edp->hwTailP);
  199. dbg ("%08x", edp->hwHeadP);
  200. dbg ("%08x", edp->hwNextED);
  201. }
  202. }
  203. static char * hcfs2string (int state)
  204. {
  205. switch (state) {
  206. case OHCI_USB_RESET: return "reset";
  207. case OHCI_USB_RESUME: return "resume";
  208. case OHCI_USB_OPER: return "operational";
  209. case OHCI_USB_SUSPEND: return "suspend";
  210. }
  211. return "?";
  212. }
  213. /* dump control and status registers */
  214. static void ohci_dump_status (ohci_t *controller)
  215. {
  216. struct ohci_regs *regs = controller->regs;
  217. __u32 temp;
  218. temp = readl (&regs->revision) & 0xff;
  219. if (temp != 0x10)
  220. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  221. temp = readl (&regs->control);
  222. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  223. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  224. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  225. (temp & OHCI_CTRL_IR) ? " IR" : "",
  226. hcfs2string (temp & OHCI_CTRL_HCFS),
  227. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  228. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  229. (temp & OHCI_CTRL_IE) ? " IE" : "",
  230. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  231. temp & OHCI_CTRL_CBSR
  232. );
  233. temp = readl (&regs->cmdstatus);
  234. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  235. (temp & OHCI_SOC) >> 16,
  236. (temp & OHCI_OCR) ? " OCR" : "",
  237. (temp & OHCI_BLF) ? " BLF" : "",
  238. (temp & OHCI_CLF) ? " CLF" : "",
  239. (temp & OHCI_HCR) ? " HCR" : ""
  240. );
  241. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  242. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  243. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  244. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  245. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  246. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  247. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  248. maybe_print_eds ("donehead", readl (&regs->donehead));
  249. }
  250. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  251. {
  252. __u32 temp, ndp, i;
  253. temp = roothub_a (controller);
  254. ndp = (temp & RH_A_NDP);
  255. if (verbose) {
  256. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  257. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  258. (temp & RH_A_NOCP) ? " NOCP" : "",
  259. (temp & RH_A_OCPM) ? " OCPM" : "",
  260. (temp & RH_A_DT) ? " DT" : "",
  261. (temp & RH_A_NPS) ? " NPS" : "",
  262. (temp & RH_A_PSM) ? " PSM" : "",
  263. ndp
  264. );
  265. temp = roothub_b (controller);
  266. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  267. temp,
  268. (temp & RH_B_PPCM) >> 16,
  269. (temp & RH_B_DR)
  270. );
  271. temp = roothub_status (controller);
  272. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  273. temp,
  274. (temp & RH_HS_CRWE) ? " CRWE" : "",
  275. (temp & RH_HS_OCIC) ? " OCIC" : "",
  276. (temp & RH_HS_LPSC) ? " LPSC" : "",
  277. (temp & RH_HS_DRWE) ? " DRWE" : "",
  278. (temp & RH_HS_OCI) ? " OCI" : "",
  279. (temp & RH_HS_LPS) ? " LPS" : ""
  280. );
  281. }
  282. for (i = 0; i < ndp; i++) {
  283. temp = roothub_portstatus (controller, i);
  284. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  285. i,
  286. temp,
  287. (temp & RH_PS_PRSC) ? " PRSC" : "",
  288. (temp & RH_PS_OCIC) ? " OCIC" : "",
  289. (temp & RH_PS_PSSC) ? " PSSC" : "",
  290. (temp & RH_PS_PESC) ? " PESC" : "",
  291. (temp & RH_PS_CSC) ? " CSC" : "",
  292. (temp & RH_PS_LSDA) ? " LSDA" : "",
  293. (temp & RH_PS_PPS) ? " PPS" : "",
  294. (temp & RH_PS_PRS) ? " PRS" : "",
  295. (temp & RH_PS_POCI) ? " POCI" : "",
  296. (temp & RH_PS_PSS) ? " PSS" : "",
  297. (temp & RH_PS_PES) ? " PES" : "",
  298. (temp & RH_PS_CCS) ? " CCS" : ""
  299. );
  300. }
  301. }
  302. static void ohci_dump (ohci_t *controller, int verbose)
  303. {
  304. dbg ("OHCI controller usb-%s state", controller->slot_name);
  305. /* dumps some of the state we know about */
  306. ohci_dump_status (controller);
  307. if (verbose)
  308. ep_print_int_eds (controller, "hcca");
  309. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  310. ohci_dump_roothub (controller, 1);
  311. }
  312. #endif /* DEBUG */
  313. /*-------------------------------------------------------------------------*
  314. * Interface functions (URB)
  315. *-------------------------------------------------------------------------*/
  316. /* get a transfer request */
  317. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  318. int transfer_len, struct devrequest *setup, int interval)
  319. {
  320. ohci_t *ohci;
  321. ed_t * ed;
  322. urb_priv_t *purb_priv;
  323. int i, size = 0;
  324. ohci = &gohci;
  325. /* when controller's hung, permit only roothub cleanup attempts
  326. * such as powering down ports */
  327. if (ohci->disabled) {
  328. err("sohci_submit_job: EPIPE");
  329. return -1;
  330. }
  331. /* if we have an unfinished URB from previous transaction let's
  332. * fail and scream as quickly as possible so as not to corrupt
  333. * further communication */
  334. if (!urb_finished) {
  335. err("sohci_submit_job: URB NOT FINISHED");
  336. return -1;
  337. }
  338. /* we're about to begin a new transaction here so mark the URB unfinished */
  339. urb_finished = 0;
  340. /* every endpoint has a ed, locate and fill it */
  341. if (!(ed = ep_add_ed (dev, pipe))) {
  342. err("sohci_submit_job: ENOMEM");
  343. return -1;
  344. }
  345. /* for the private part of the URB we need the number of TDs (size) */
  346. switch (usb_pipetype (pipe)) {
  347. case PIPE_BULK: /* one TD for every 4096 Byte */
  348. size = (transfer_len - 1) / 4096 + 1;
  349. break;
  350. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  351. size = (transfer_len == 0)? 2:
  352. (transfer_len - 1) / 4096 + 3;
  353. break;
  354. }
  355. if (size >= (N_URB_TD - 1)) {
  356. err("need %d TDs, only have %d", size, N_URB_TD);
  357. return -1;
  358. }
  359. purb_priv = &urb_priv;
  360. purb_priv->pipe = pipe;
  361. /* fill the private part of the URB */
  362. purb_priv->length = size;
  363. purb_priv->ed = ed;
  364. purb_priv->actual_length = 0;
  365. /* allocate the TDs */
  366. /* note that td[0] was allocated in ep_add_ed */
  367. for (i = 0; i < size; i++) {
  368. purb_priv->td[i] = td_alloc (dev);
  369. if (!purb_priv->td[i]) {
  370. purb_priv->length = i;
  371. urb_free_priv (purb_priv);
  372. err("sohci_submit_job: ENOMEM");
  373. return -1;
  374. }
  375. }
  376. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  377. urb_free_priv (purb_priv);
  378. err("sohci_submit_job: EINVAL");
  379. return -1;
  380. }
  381. /* link the ed into a chain if is not already */
  382. if (ed->state != ED_OPER)
  383. ep_link (ohci, ed);
  384. /* fill the TDs and link it to the ed */
  385. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  386. return 0;
  387. }
  388. /*-------------------------------------------------------------------------*/
  389. #ifdef DEBUG
  390. /* tell us the current USB frame number */
  391. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  392. {
  393. ohci_t *ohci = &gohci;
  394. return ohci_cpu_to_le16 (ohci->hcca->frame_no);
  395. }
  396. #endif
  397. /*-------------------------------------------------------------------------*
  398. * ED handling functions
  399. *-------------------------------------------------------------------------*/
  400. /* link an ed into one of the HC chains */
  401. static int ep_link (ohci_t *ohci, ed_t *edi)
  402. {
  403. volatile ed_t *ed = edi;
  404. ed->state = ED_OPER;
  405. switch (ed->type) {
  406. case PIPE_CONTROL:
  407. ed->hwNextED = 0;
  408. if (ohci->ed_controltail == NULL) {
  409. writel (ed, &ohci->regs->ed_controlhead);
  410. } else {
  411. ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  412. }
  413. ed->ed_prev = ohci->ed_controltail;
  414. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  415. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  416. ohci->hc_control |= OHCI_CTRL_CLE;
  417. writel (ohci->hc_control, &ohci->regs->control);
  418. }
  419. ohci->ed_controltail = edi;
  420. break;
  421. case PIPE_BULK:
  422. ed->hwNextED = 0;
  423. if (ohci->ed_bulktail == NULL) {
  424. writel (ed, &ohci->regs->ed_bulkhead);
  425. } else {
  426. ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  427. }
  428. ed->ed_prev = ohci->ed_bulktail;
  429. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  430. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  431. ohci->hc_control |= OHCI_CTRL_BLE;
  432. writel (ohci->hc_control, &ohci->regs->control);
  433. }
  434. ohci->ed_bulktail = edi;
  435. break;
  436. }
  437. return 0;
  438. }
  439. /*-------------------------------------------------------------------------*/
  440. /* unlink an ed from one of the HC chains.
  441. * just the link to the ed is unlinked.
  442. * the link from the ed still points to another operational ed or 0
  443. * so the HC can eventually finish the processing of the unlinked ed */
  444. static int ep_unlink (ohci_t *ohci, ed_t *edi)
  445. {
  446. volatile ed_t *ed = edi;
  447. ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
  448. switch (ed->type) {
  449. case PIPE_CONTROL:
  450. if (ed->ed_prev == NULL) {
  451. if (!ed->hwNextED) {
  452. ohci->hc_control &= ~OHCI_CTRL_CLE;
  453. writel (ohci->hc_control, &ohci->regs->control);
  454. }
  455. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  456. } else {
  457. ed->ed_prev->hwNextED = ed->hwNextED;
  458. }
  459. if (ohci->ed_controltail == ed) {
  460. ohci->ed_controltail = ed->ed_prev;
  461. } else {
  462. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  463. }
  464. break;
  465. case PIPE_BULK:
  466. if (ed->ed_prev == NULL) {
  467. if (!ed->hwNextED) {
  468. ohci->hc_control &= ~OHCI_CTRL_BLE;
  469. writel (ohci->hc_control, &ohci->regs->control);
  470. }
  471. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  472. } else {
  473. ed->ed_prev->hwNextED = ed->hwNextED;
  474. }
  475. if (ohci->ed_bulktail == ed) {
  476. ohci->ed_bulktail = ed->ed_prev;
  477. } else {
  478. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  479. }
  480. break;
  481. }
  482. ed->state = ED_UNLINK;
  483. return 0;
  484. }
  485. /*-------------------------------------------------------------------------*/
  486. /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
  487. * but the USB stack is a little bit stateless so we do it at every transaction
  488. * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
  489. * in all other cases the state is left unchanged
  490. * the ed info fields are setted anyway even though most of them should not change */
  491. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  492. {
  493. td_t *td;
  494. ed_t *ed_ret;
  495. volatile ed_t *ed;
  496. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  497. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  498. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  499. err("ep_add_ed: pending delete");
  500. /* pending delete request */
  501. return NULL;
  502. }
  503. if (ed->state == ED_NEW) {
  504. ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
  505. /* dummy td; end of td list for ed */
  506. td = td_alloc (usb_dev);
  507. ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
  508. ed->hwHeadP = ed->hwTailP;
  509. ed->state = ED_UNLINK;
  510. ed->type = usb_pipetype (pipe);
  511. ohci_dev.ed_cnt++;
  512. }
  513. ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
  514. | usb_pipeendpoint (pipe) << 7
  515. | (usb_pipeisoc (pipe)? 0x8000: 0)
  516. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  517. | (usb_dev->speed == USB_SPEED_LOW) << 13
  518. | usb_maxpacket (usb_dev, pipe) << 16);
  519. return ed_ret;
  520. }
  521. /*-------------------------------------------------------------------------*
  522. * TD handling functions
  523. *-------------------------------------------------------------------------*/
  524. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  525. static void td_fill (ohci_t *ohci, unsigned int info,
  526. void *data, int len,
  527. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  528. {
  529. volatile td_t *td, *td_pt;
  530. #ifdef OHCI_FILL_TRACE
  531. int i;
  532. #endif
  533. if (index > urb_priv->length) {
  534. err("index > length");
  535. return;
  536. }
  537. /* use this td as the next dummy */
  538. td_pt = urb_priv->td [index];
  539. td_pt->hwNextTD = 0;
  540. /* fill the old dummy TD */
  541. td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
  542. td->ed = urb_priv->ed;
  543. td->next_dl_td = NULL;
  544. td->index = index;
  545. td->data = (__u32)data;
  546. #ifdef OHCI_FILL_TRACE
  547. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  548. for (i = 0; i < len; i++)
  549. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  550. printf("\n");
  551. }
  552. #endif
  553. if (!len)
  554. data = 0;
  555. td->hwINFO = ohci_cpu_to_le32 (info);
  556. td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
  557. if (data)
  558. td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
  559. else
  560. td->hwBE = 0;
  561. td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
  562. /* append to queue */
  563. td->ed->hwTailP = td->hwNextTD;
  564. }
  565. /*-------------------------------------------------------------------------*/
  566. /* prepare all TDs of a transfer */
  567. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  568. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  569. {
  570. ohci_t *ohci = &gohci;
  571. int data_len = transfer_len;
  572. void *data;
  573. int cnt = 0;
  574. __u32 info = 0;
  575. unsigned int toggle = 0;
  576. /* OHCI handles the DATA-toggles itself, we just use the
  577. USB-toggle bits for resetting */
  578. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  579. toggle = TD_T_TOGGLE;
  580. } else {
  581. toggle = TD_T_DATA0;
  582. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  583. }
  584. urb->td_cnt = 0;
  585. if (data_len)
  586. data = buffer;
  587. else
  588. data = 0;
  589. switch (usb_pipetype (pipe)) {
  590. case PIPE_BULK:
  591. info = usb_pipeout (pipe)?
  592. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  593. while(data_len > 4096) {
  594. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  595. data += 4096; data_len -= 4096; cnt++;
  596. }
  597. info = usb_pipeout (pipe)?
  598. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  599. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  600. cnt++;
  601. if (!ohci->sleeping)
  602. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  603. break;
  604. case PIPE_CONTROL:
  605. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  606. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  607. if (data_len > 0) {
  608. info = usb_pipeout (pipe)?
  609. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  610. /* NOTE: mishandles transfers >8K, some >4K */
  611. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  612. }
  613. info = usb_pipeout (pipe)?
  614. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  615. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  616. if (!ohci->sleeping)
  617. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  618. break;
  619. }
  620. if (urb->length != cnt)
  621. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  622. }
  623. /*-------------------------------------------------------------------------*
  624. * Done List handling functions
  625. *-------------------------------------------------------------------------*/
  626. /* calculate the transfer length and update the urb */
  627. static void dl_transfer_length(td_t * td)
  628. {
  629. __u32 tdBE, tdCBP;
  630. urb_priv_t *lurb_priv = &urb_priv;
  631. tdBE = ohci_cpu_to_le32 (td->hwBE);
  632. tdCBP = ohci_cpu_to_le32 (td->hwCBP);
  633. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  634. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  635. if (tdBE != 0) {
  636. if (td->hwCBP == 0)
  637. lurb_priv->actual_length += tdBE - td->data + 1;
  638. else
  639. lurb_priv->actual_length += tdCBP - td->data;
  640. }
  641. }
  642. }
  643. /*-------------------------------------------------------------------------*/
  644. /* replies to the request have to be on a FIFO basis so
  645. * we reverse the reversed done-list */
  646. static td_t * dl_reverse_done_list (ohci_t *ohci)
  647. {
  648. __u32 td_list_hc;
  649. td_t *td_rev = NULL;
  650. td_t *td_list = NULL;
  651. urb_priv_t *lurb_priv = NULL;
  652. td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
  653. ohci->hcca->done_head = 0;
  654. while (td_list_hc) {
  655. td_list = (td_t *)td_list_hc;
  656. if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
  657. lurb_priv = &urb_priv;
  658. dbg(" USB-error/status: %x : %p",
  659. TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
  660. if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
  661. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  662. td_list->ed->hwHeadP =
  663. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
  664. (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
  665. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  666. } else
  667. td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
  668. }
  669. }
  670. td_list->next_dl_td = td_rev;
  671. td_rev = td_list;
  672. td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
  673. }
  674. return td_list;
  675. }
  676. /*-------------------------------------------------------------------------*/
  677. /* td done list */
  678. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  679. {
  680. td_t *td_list_next = NULL;
  681. ed_t *ed;
  682. int cc = 0;
  683. int stat = 0;
  684. /* urb_t *urb; */
  685. urb_priv_t *lurb_priv;
  686. __u32 tdINFO, edHeadP, edTailP;
  687. while (td_list) {
  688. td_list_next = td_list->next_dl_td;
  689. lurb_priv = &urb_priv;
  690. tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
  691. ed = td_list->ed;
  692. dl_transfer_length(td_list);
  693. /* error code of transfer */
  694. cc = TD_CC_GET (tdINFO);
  695. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  696. if ((ed->state & (ED_OPER | ED_UNLINK))
  697. && (lurb_priv->state != URB_DEL)) {
  698. dbg("ConditionCode %#x", cc);
  699. stat = cc_to_error[cc];
  700. urb_finished = 1;
  701. }
  702. }
  703. if (ed->state != ED_NEW) {
  704. edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
  705. edTailP = ohci_cpu_to_le32 (ed->hwTailP);
  706. /* unlink eds if they are not busy */
  707. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  708. ep_unlink (ohci, ed);
  709. }
  710. td_list = td_list_next;
  711. }
  712. return stat;
  713. }
  714. /*-------------------------------------------------------------------------*
  715. * Virtual Root Hub
  716. *-------------------------------------------------------------------------*/
  717. #include <usbroothubdes.h>
  718. /* Hub class-specific descriptor is constructed dynamically */
  719. /*-------------------------------------------------------------------------*/
  720. #define OK(x) len = (x); break
  721. #ifdef DEBUG
  722. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  723. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  724. #else
  725. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  726. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  727. #endif
  728. #define RD_RH_STAT roothub_status(&gohci)
  729. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  730. /* request to virtual root hub */
  731. int rh_check_port_status(ohci_t *controller)
  732. {
  733. __u32 temp, ndp, i;
  734. int res;
  735. res = -1;
  736. temp = roothub_a (controller);
  737. ndp = (temp & RH_A_NDP);
  738. for (i = 0; i < ndp; i++) {
  739. temp = roothub_portstatus (controller, i);
  740. /* check for a device disconnect */
  741. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  742. (RH_PS_PESC | RH_PS_CSC)) &&
  743. ((temp & RH_PS_CCS) == 0)) {
  744. res = i;
  745. break;
  746. }
  747. }
  748. return res;
  749. }
  750. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  751. void *buffer, int transfer_len, struct devrequest *cmd)
  752. {
  753. void * data = buffer;
  754. int leni = transfer_len;
  755. int len = 0;
  756. int stat = 0;
  757. __u32 datab[4];
  758. __u8 *data_buf = (__u8 *)datab;
  759. __u16 bmRType_bReq;
  760. __u16 wValue;
  761. __u16 wIndex;
  762. __u16 wLength;
  763. #ifdef DEBUG
  764. urb_priv.actual_length = 0;
  765. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  766. #endif
  767. if (usb_pipeint(pipe)) {
  768. info("Root-Hub submit IRQ: NOT implemented");
  769. return 0;
  770. }
  771. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  772. wValue = m16_swap (cmd->value);
  773. wIndex = m16_swap (cmd->index);
  774. wLength = m16_swap (cmd->length);
  775. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  776. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  777. switch (bmRType_bReq) {
  778. /* Request Destination:
  779. without flags: Device,
  780. RH_INTERFACE: interface,
  781. RH_ENDPOINT: endpoint,
  782. RH_CLASS means HUB here,
  783. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  784. */
  785. case RH_GET_STATUS:
  786. *(__u16 *) data_buf = m16_swap (1); OK (2);
  787. case RH_GET_STATUS | RH_INTERFACE:
  788. *(__u16 *) data_buf = m16_swap (0); OK (2);
  789. case RH_GET_STATUS | RH_ENDPOINT:
  790. *(__u16 *) data_buf = m16_swap (0); OK (2);
  791. case RH_GET_STATUS | RH_CLASS:
  792. *(__u32 *) data_buf = m32_swap (
  793. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  794. OK (4);
  795. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  796. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  797. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  798. switch (wValue) {
  799. case (RH_ENDPOINT_STALL): OK (0);
  800. }
  801. break;
  802. case RH_CLEAR_FEATURE | RH_CLASS:
  803. switch (wValue) {
  804. case RH_C_HUB_LOCAL_POWER:
  805. OK(0);
  806. case (RH_C_HUB_OVER_CURRENT):
  807. WR_RH_STAT(RH_HS_OCIC); OK (0);
  808. }
  809. break;
  810. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  811. switch (wValue) {
  812. case (RH_PORT_ENABLE):
  813. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  814. case (RH_PORT_SUSPEND):
  815. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  816. case (RH_PORT_POWER):
  817. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  818. case (RH_C_PORT_CONNECTION):
  819. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  820. case (RH_C_PORT_ENABLE):
  821. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  822. case (RH_C_PORT_SUSPEND):
  823. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  824. case (RH_C_PORT_OVER_CURRENT):
  825. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  826. case (RH_C_PORT_RESET):
  827. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  828. }
  829. break;
  830. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  831. switch (wValue) {
  832. case (RH_PORT_SUSPEND):
  833. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  834. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  835. if (RD_RH_PORTSTAT & RH_PS_CCS)
  836. WR_RH_PORTSTAT (RH_PS_PRS);
  837. OK (0);
  838. case (RH_PORT_POWER):
  839. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  840. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  841. if (RD_RH_PORTSTAT & RH_PS_CCS)
  842. WR_RH_PORTSTAT (RH_PS_PES );
  843. OK (0);
  844. }
  845. break;
  846. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  847. case RH_GET_DESCRIPTOR:
  848. switch ((wValue & 0xff00) >> 8) {
  849. case (0x01): /* device descriptor */
  850. len = min_t(unsigned int,
  851. leni,
  852. min_t(unsigned int,
  853. sizeof (root_hub_dev_des),
  854. wLength));
  855. data_buf = root_hub_dev_des; OK(len);
  856. case (0x02): /* configuration descriptor */
  857. len = min_t(unsigned int,
  858. leni,
  859. min_t(unsigned int,
  860. sizeof (root_hub_config_des),
  861. wLength));
  862. data_buf = root_hub_config_des; OK(len);
  863. case (0x03): /* string descriptors */
  864. if(wValue==0x0300) {
  865. len = min_t(unsigned int,
  866. leni,
  867. min_t(unsigned int,
  868. sizeof (root_hub_str_index0),
  869. wLength));
  870. data_buf = root_hub_str_index0;
  871. OK(len);
  872. }
  873. if(wValue==0x0301) {
  874. len = min_t(unsigned int,
  875. leni,
  876. min_t(unsigned int,
  877. sizeof (root_hub_str_index1),
  878. wLength));
  879. data_buf = root_hub_str_index1;
  880. OK(len);
  881. }
  882. default:
  883. stat = USB_ST_STALLED;
  884. }
  885. break;
  886. case RH_GET_DESCRIPTOR | RH_CLASS:
  887. {
  888. __u32 temp = roothub_a (&gohci);
  889. data_buf [0] = 9; /* min length; */
  890. data_buf [1] = 0x29;
  891. data_buf [2] = temp & RH_A_NDP;
  892. data_buf [3] = 0;
  893. if (temp & RH_A_PSM) /* per-port power switching? */
  894. data_buf [3] |= 0x1;
  895. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  896. data_buf [3] |= 0x10;
  897. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  898. data_buf [3] |= 0x8;
  899. /* corresponds to data_buf[4-7] */
  900. datab [1] = 0;
  901. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  902. temp = roothub_b (&gohci);
  903. data_buf [7] = temp & RH_B_DR;
  904. if (data_buf [2] < 7) {
  905. data_buf [8] = 0xff;
  906. } else {
  907. data_buf [0] += 2;
  908. data_buf [8] = (temp & RH_B_DR) >> 8;
  909. data_buf [10] = data_buf [9] = 0xff;
  910. }
  911. len = min_t(unsigned int, leni,
  912. min_t(unsigned int, data_buf [0], wLength));
  913. OK (len);
  914. }
  915. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  916. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  917. default:
  918. dbg ("unsupported root hub command");
  919. stat = USB_ST_STALLED;
  920. }
  921. #ifdef DEBUG
  922. ohci_dump_roothub (&gohci, 1);
  923. #endif
  924. len = min_t(int, len, leni);
  925. if (data != data_buf)
  926. memcpy (data, data_buf, len);
  927. dev->act_len = len;
  928. dev->status = stat;
  929. #ifdef DEBUG
  930. if (transfer_len)
  931. urb_priv.actual_length = transfer_len;
  932. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  933. #endif
  934. return stat;
  935. }
  936. /*-------------------------------------------------------------------------*/
  937. /* common code for handling submit messages - used for all but root hub */
  938. /* accesses. */
  939. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  940. int transfer_len, struct devrequest *setup, int interval)
  941. {
  942. int stat = 0;
  943. int maxsize = usb_maxpacket(dev, pipe);
  944. int timeout;
  945. /* device pulled? Shortcut the action. */
  946. if (devgone == dev) {
  947. dev->status = USB_ST_CRC_ERR;
  948. return 0;
  949. }
  950. #ifdef DEBUG
  951. urb_priv.actual_length = 0;
  952. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  953. #endif
  954. if (!maxsize) {
  955. err("submit_common_message: pipesize for pipe %lx is zero",
  956. pipe);
  957. return -1;
  958. }
  959. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  960. err("sohci_submit_job failed");
  961. return -1;
  962. }
  963. /* allow more time for a BULK device to react - some are slow */
  964. #define BULK_TO 5000 /* timeout in milliseconds */
  965. if (usb_pipebulk(pipe))
  966. timeout = BULK_TO;
  967. else
  968. timeout = 100;
  969. /* wait for it to complete */
  970. for (;;) {
  971. /* check whether the controller is done */
  972. stat = hc_interrupt();
  973. if (stat < 0) {
  974. stat = USB_ST_CRC_ERR;
  975. break;
  976. }
  977. /* NOTE: since we are not interrupt driven in U-Boot and always
  978. * handle only one URB at a time, we cannot assume the
  979. * transaction finished on the first successful return from
  980. * hc_interrupt().. unless the flag for current URB is set,
  981. * meaning that all TD's to/from device got actually
  982. * transferred and processed. If the current URB is not
  983. * finished we need to re-iterate this loop so as
  984. * hc_interrupt() gets called again as there needs to be some
  985. * more TD's to process still */
  986. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  987. /* 0xff is returned for an SF-interrupt */
  988. break;
  989. }
  990. if (--timeout) {
  991. mdelay(1);
  992. if (!urb_finished)
  993. dbg("\%");
  994. } else {
  995. err("CTL:TIMEOUT ");
  996. dbg("submit_common_msg: TO status %x\n", stat);
  997. stat = USB_ST_CRC_ERR;
  998. urb_finished = 1;
  999. break;
  1000. }
  1001. }
  1002. #if 0
  1003. /* we got an Root Hub Status Change interrupt */
  1004. if (got_rhsc) {
  1005. #ifdef DEBUG
  1006. ohci_dump_roothub (&gohci, 1);
  1007. #endif
  1008. got_rhsc = 0;
  1009. /* abuse timeout */
  1010. timeout = rh_check_port_status(&gohci);
  1011. if (timeout >= 0) {
  1012. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1013. /* the called routine adds 1 to the passed value */
  1014. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1015. #endif
  1016. /*
  1017. * XXX
  1018. * This is potentially dangerous because it assumes
  1019. * that only one device is ever plugged in!
  1020. */
  1021. devgone = dev;
  1022. }
  1023. }
  1024. #endif
  1025. dev->status = stat;
  1026. dev->act_len = transfer_len;
  1027. #ifdef DEBUG
  1028. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1029. #endif
  1030. /* free TDs in urb_priv */
  1031. urb_free_priv (&urb_priv);
  1032. return 0;
  1033. }
  1034. /* submit routines called from usb.c */
  1035. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1036. int transfer_len)
  1037. {
  1038. info("submit_bulk_msg");
  1039. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1040. }
  1041. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1042. int transfer_len, struct devrequest *setup)
  1043. {
  1044. int maxsize = usb_maxpacket(dev, pipe);
  1045. info("submit_control_msg");
  1046. #ifdef DEBUG
  1047. urb_priv.actual_length = 0;
  1048. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1049. #endif
  1050. if (!maxsize) {
  1051. err("submit_control_message: pipesize for pipe %lx is zero",
  1052. pipe);
  1053. return -1;
  1054. }
  1055. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1056. gohci.rh.dev = dev;
  1057. /* root hub - redirect */
  1058. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1059. setup);
  1060. }
  1061. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1062. }
  1063. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1064. int transfer_len, int interval)
  1065. {
  1066. info("submit_int_msg");
  1067. return -1;
  1068. }
  1069. /*-------------------------------------------------------------------------*
  1070. * HC functions
  1071. *-------------------------------------------------------------------------*/
  1072. /* reset the HC and BUS */
  1073. static int hc_reset (ohci_t *ohci)
  1074. {
  1075. int timeout = 30;
  1076. int smm_timeout = 50; /* 0,5 sec */
  1077. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1078. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1079. info("USB HC TakeOver from SMM");
  1080. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1081. mdelay (10);
  1082. if (--smm_timeout == 0) {
  1083. err("USB HC TakeOver failed!");
  1084. return -1;
  1085. }
  1086. }
  1087. }
  1088. /* Disable HC interrupts */
  1089. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1090. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1091. ohci->slot_name,
  1092. readl (&ohci->regs->control));
  1093. /* Reset USB (needed by some controllers) */
  1094. ohci->hc_control = 0;
  1095. writel (ohci->hc_control, &ohci->regs->control);
  1096. /* HC Reset requires max 10 us delay */
  1097. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1098. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1099. if (--timeout == 0) {
  1100. err("USB HC reset timed out!");
  1101. return -1;
  1102. }
  1103. udelay (1);
  1104. }
  1105. return 0;
  1106. }
  1107. /*-------------------------------------------------------------------------*/
  1108. /* Start an OHCI controller, set the BUS operational
  1109. * enable interrupts
  1110. * connect the virtual root hub */
  1111. static int hc_start (ohci_t * ohci)
  1112. {
  1113. __u32 mask;
  1114. unsigned int fminterval;
  1115. ohci->disabled = 1;
  1116. /* Tell the controller where the control and bulk lists are
  1117. * The lists are empty now. */
  1118. writel (0, &ohci->regs->ed_controlhead);
  1119. writel (0, &ohci->regs->ed_bulkhead);
  1120. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1121. fminterval = 0x2edf;
  1122. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1123. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1124. writel (fminterval, &ohci->regs->fminterval);
  1125. writel (0x628, &ohci->regs->lsthresh);
  1126. /* start controller operations */
  1127. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1128. ohci->disabled = 0;
  1129. writel (ohci->hc_control, &ohci->regs->control);
  1130. /* disable all interrupts */
  1131. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1132. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1133. OHCI_INTR_OC | OHCI_INTR_MIE);
  1134. writel (mask, &ohci->regs->intrdisable);
  1135. /* clear all interrupts */
  1136. mask &= ~OHCI_INTR_MIE;
  1137. writel (mask, &ohci->regs->intrstatus);
  1138. /* Choose the interrupts we care about now - but w/o MIE */
  1139. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1140. writel (mask, &ohci->regs->intrenable);
  1141. #ifdef OHCI_USE_NPS
  1142. /* required for AMD-756 and some Mac platforms */
  1143. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1144. &ohci->regs->roothub.a);
  1145. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1146. #endif /* OHCI_USE_NPS */
  1147. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1148. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1149. /* connect the virtual root hub */
  1150. ohci->rh.devnum = 0;
  1151. return 0;
  1152. }
  1153. /*-------------------------------------------------------------------------*/
  1154. /* an interrupt happens */
  1155. static int
  1156. hc_interrupt (void)
  1157. {
  1158. ohci_t *ohci = &gohci;
  1159. struct ohci_regs *regs = ohci->regs;
  1160. int ints;
  1161. int stat = -1;
  1162. if ((ohci->hcca->done_head != 0) &&
  1163. !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
  1164. ints = OHCI_INTR_WDH;
  1165. } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
  1166. ohci->disabled++;
  1167. err ("%s device removed!", ohci->slot_name);
  1168. return -1;
  1169. } else if ((ints &= readl (&regs->intrenable)) == 0) {
  1170. dbg("hc_interrupt: returning..\n");
  1171. return 0xff;
  1172. }
  1173. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1174. if (ints & OHCI_INTR_RHSC) {
  1175. got_rhsc = 1;
  1176. stat = 0xff;
  1177. }
  1178. if (ints & OHCI_INTR_UE) {
  1179. ohci->disabled++;
  1180. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1181. ohci->slot_name);
  1182. /* e.g. due to PCI Master/Target Abort */
  1183. #ifdef DEBUG
  1184. ohci_dump (ohci, 1);
  1185. #endif
  1186. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1187. /* Make some non-interrupt context restart the controller. */
  1188. /* Count and limit the retries though; either hardware or */
  1189. /* software errors can go forever... */
  1190. hc_reset (ohci);
  1191. return -1;
  1192. }
  1193. if (ints & OHCI_INTR_WDH) {
  1194. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1195. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1196. writel (OHCI_INTR_WDH, &regs->intrenable);
  1197. }
  1198. if (ints & OHCI_INTR_SO) {
  1199. dbg("USB Schedule overrun\n");
  1200. writel (OHCI_INTR_SO, &regs->intrenable);
  1201. stat = -1;
  1202. }
  1203. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1204. if (ints & OHCI_INTR_SF) {
  1205. unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
  1206. mdelay(1);
  1207. writel (OHCI_INTR_SF, &regs->intrdisable);
  1208. if (ohci->ed_rm_list[frame] != NULL)
  1209. writel (OHCI_INTR_SF, &regs->intrenable);
  1210. stat = 0xff;
  1211. }
  1212. writel (ints, &regs->intrstatus);
  1213. return stat;
  1214. }
  1215. /*-------------------------------------------------------------------------*/
  1216. /*-------------------------------------------------------------------------*/
  1217. /* De-allocate all resources.. */
  1218. static void hc_release_ohci (ohci_t *ohci)
  1219. {
  1220. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1221. if (!ohci->disabled)
  1222. hc_reset (ohci);
  1223. }
  1224. /*-------------------------------------------------------------------------*/
  1225. /*
  1226. * low level initalisation routine, called from usb.c
  1227. */
  1228. static char ohci_inited = 0;
  1229. int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
  1230. {
  1231. memset (&gohci, 0, sizeof (ohci_t));
  1232. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1233. /* align the storage */
  1234. if ((__u32)&ghcca[0] & 0xff) {
  1235. err("HCCA not aligned!!");
  1236. return -1;
  1237. }
  1238. phcca = &ghcca[0];
  1239. info("aligned ghcca %p", phcca);
  1240. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1241. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1242. err("EDs not aligned!!");
  1243. return -1;
  1244. }
  1245. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1246. if ((__u32)gtd & 0x7) {
  1247. err("TDs not aligned!!");
  1248. return -1;
  1249. }
  1250. ptd = gtd;
  1251. gohci.hcca = phcca;
  1252. memset (phcca, 0, sizeof (struct ohci_hcca));
  1253. gohci.disabled = 1;
  1254. gohci.sleeping = 0;
  1255. gohci.irq = -1;
  1256. #if defined(CONFIG_440EP)
  1257. gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
  1258. #elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
  1259. gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
  1260. #endif
  1261. gohci.flags = 0;
  1262. gohci.slot_name = "ppc440";
  1263. if (hc_reset (&gohci) < 0) {
  1264. hc_release_ohci (&gohci);
  1265. return -1;
  1266. }
  1267. if (hc_start (&gohci) < 0) {
  1268. err ("can't start usb-%s", gohci.slot_name);
  1269. hc_release_ohci (&gohci);
  1270. return -1;
  1271. }
  1272. #ifdef DEBUG
  1273. ohci_dump (&gohci, 1);
  1274. #endif
  1275. ohci_inited = 1;
  1276. urb_finished = 1;
  1277. return 0;
  1278. }
  1279. int usb_lowlevel_stop(int index)
  1280. {
  1281. /* this gets called really early - before the controller has */
  1282. /* even been initialized! */
  1283. if (!ohci_inited)
  1284. return 0;
  1285. /* TODO release any interrupts, etc. */
  1286. /* call hc_release_ohci() here ? */
  1287. hc_reset (&gohci);
  1288. return 0;
  1289. }
  1290. #endif /* CONFIG_USB_OHCI */