timer.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG
  4. * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
  5. *
  6. * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
  7. * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
  8. *
  9. * (C) Copyright 2008
  10. * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  11. *
  12. * (C) Copyright 2004
  13. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  14. *
  15. * (C) Copyright 2002-2004
  16. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  17. *
  18. * (C) Copyright 2003
  19. * Texas Instruments <www.ti.com>
  20. *
  21. * (C) Copyright 2002
  22. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  23. * Marius Groeger <mgroeger@sysgo.de>
  24. *
  25. * (C) Copyright 2002
  26. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  27. * Alex Zuepke <azu@sysgo.de>
  28. */
  29. #include <clk.h>
  30. #include <common.h>
  31. #include <div64.h>
  32. #include <dm.h>
  33. #include <time.h>
  34. #include <asm/io.h>
  35. #include <asm/arch/hardware.h>
  36. #include <asm/arch/clk.h>
  37. DECLARE_GLOBAL_DATA_PTR;
  38. struct scu_timer {
  39. u32 load; /* Timer Load Register */
  40. u32 counter; /* Timer Counter Register */
  41. u32 control; /* Timer Control Register */
  42. };
  43. static struct scu_timer *timer_base =
  44. (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR;
  45. #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
  46. #define SCUTIMER_CONTROL_PRESCALER_SHIFT 8
  47. #define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
  48. #define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
  49. #define TIMER_LOAD_VAL 0xFFFFFFFF
  50. #define TIMER_PRESCALE 255
  51. int timer_init(void)
  52. {
  53. const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
  54. (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
  55. SCUTIMER_CONTROL_ENABLE_MASK;
  56. struct udevice *dev;
  57. struct clk clk;
  58. int ret;
  59. ret = uclass_get_device_by_driver(UCLASS_CLK,
  60. DM_GET_DRIVER(zynq_clk), &dev);
  61. if (ret)
  62. return ret;
  63. clk.id = cpu_6or4x_clk;
  64. ret = clk_request(dev, &clk);
  65. if (ret < 0)
  66. return ret;
  67. gd->cpu_clk = clk_get_rate(&clk);
  68. clk_free(&clk);
  69. gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1);
  70. /* Load the timer counter register */
  71. writel(0xFFFFFFFF, &timer_base->load);
  72. /*
  73. * Start the A9Timer device
  74. * Enable Auto reload mode, Clear prescaler control bits
  75. * Set prescaler value, Enable the decrementer
  76. */
  77. clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK,
  78. emask);
  79. /* Reset time */
  80. gd->arch.lastinc = readl(&timer_base->counter) /
  81. (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
  82. gd->arch.tbl = 0;
  83. return 0;
  84. }
  85. /*
  86. * This function is derived from PowerPC code (timebase clock frequency).
  87. * On ARM it returns the number of timer ticks per second.
  88. */
  89. ulong get_tbclk(void)
  90. {
  91. return gd->arch.timer_rate_hz;
  92. }