Makefile.build 16 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. # Modified for U-Boot
  5. ifeq ($(CONFIG_TPL_BUILD),y)
  6. src := $(patsubst tpl/%,%,$(obj))
  7. else
  8. ifeq ($(CONFIG_SPL_BUILD),y)
  9. src := $(patsubst spl/%,%,$(obj))
  10. else
  11. src := $(obj)
  12. endif
  13. endif
  14. PHONY := __build
  15. __build:
  16. # Init all relevant variables used in kbuild files so
  17. # 1) they have correct type
  18. # 2) they do not inherit any value from the environment
  19. obj-y :=
  20. obj-m :=
  21. lib-y :=
  22. lib-m :=
  23. always :=
  24. targets :=
  25. subdir-y :=
  26. subdir-m :=
  27. EXTRA_AFLAGS :=
  28. EXTRA_CFLAGS :=
  29. EXTRA_CPPFLAGS :=
  30. EXTRA_LDFLAGS :=
  31. asflags-y :=
  32. ccflags-y :=
  33. cppflags-y :=
  34. ldflags-y :=
  35. subdir-asflags-y :=
  36. subdir-ccflags-y :=
  37. # Read auto.conf if it exists, otherwise ignore
  38. -include include/config/auto.conf
  39. # Added for U-Boot: Load U-Boot configuration
  40. ifeq ($(CONFIG_TPL_BUILD),y)
  41. -include include/tpl-autoconf.mk
  42. else
  43. ifeq ($(CONFIG_SPL_BUILD),y)
  44. -include include/spl-autoconf.mk
  45. else
  46. -include include/autoconf.mk
  47. endif
  48. endif
  49. include scripts/Kbuild.include
  50. # Added for U-Boot
  51. # We must include config.mk after Kbuild.include
  52. # so that some config.mk can use cc-option.
  53. include config.mk
  54. # For backward compatibility check that these variables do not change
  55. save-cflags := $(CFLAGS)
  56. # The filename Kbuild has precedence over Makefile
  57. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  58. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  59. include $(kbuild-file)
  60. # If the save-* variables changed error out
  61. ifeq ($(KBUILD_NOPEDANTIC),)
  62. ifneq ("$(save-cflags)","$(CFLAGS)")
  63. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  64. endif
  65. endif
  66. #
  67. # make W=... settings
  68. #
  69. # W=1 - warnings that may be relevant and does not occur too often
  70. # W=2 - warnings that occur quite often but may still be relevant
  71. # W=3 - the more obscure warnings, can most likely be ignored
  72. #
  73. # $(call cc-option, -W...) handles gcc -W.. options which
  74. # are not supported by all versions of the compiler
  75. ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
  76. warning- := $(empty)
  77. warning-1 := -Wextra -Wunused -Wno-unused-parameter
  78. warning-1 += -Wmissing-declarations
  79. warning-1 += -Wmissing-format-attribute
  80. warning-1 += -Wmissing-prototypes
  81. warning-1 += -Wold-style-definition
  82. warning-1 += $(call cc-option, -Wmissing-include-dirs)
  83. warning-1 += $(call cc-option, -Wunused-but-set-variable)
  84. warning-1 += $(call cc-disable-warning, missing-field-initializers)
  85. warning-2 := -Waggregate-return
  86. warning-2 += -Wcast-align
  87. warning-2 += -Wdisabled-optimization
  88. warning-2 += -Wnested-externs
  89. warning-2 += -Wshadow
  90. warning-2 += $(call cc-option, -Wlogical-op)
  91. warning-2 += $(call cc-option, -Wmissing-field-initializers)
  92. warning-3 := -Wbad-function-cast
  93. warning-3 += -Wcast-qual
  94. warning-3 += -Wconversion
  95. warning-3 += -Wpacked
  96. warning-3 += -Wpadded
  97. warning-3 += -Wpointer-arith
  98. warning-3 += -Wredundant-decls
  99. warning-3 += -Wswitch-default
  100. warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
  101. warning-3 += $(call cc-option, -Wvla)
  102. warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  103. warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  104. warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  105. ifeq ("$(strip $(warning))","")
  106. $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
  107. endif
  108. KBUILD_CFLAGS += $(warning)
  109. endif
  110. include scripts/Makefile.lib
  111. ifdef host-progs
  112. ifneq ($(hostprogs-y),$(host-progs))
  113. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  114. hostprogs-y += $(host-progs)
  115. endif
  116. endif
  117. # Do not include host rules unless needed
  118. ifneq ($(hostprogs-y)$(hostprogs-m),)
  119. include scripts/Makefile.host
  120. endif
  121. # Uncommented for U-Boot
  122. # We need to create output dicrectory for SPL and TPL even for in-tree build
  123. #ifneq ($(KBUILD_SRC),)
  124. # Create output directory if not already present
  125. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  126. # Create directories for object files if directory does not exist
  127. # Needed when obj-y := dir/file.o syntax is used
  128. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  129. #endif
  130. ifndef obj
  131. $(warning kbuild: Makefile.build is included improperly)
  132. endif
  133. # ===========================================================================
  134. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  135. lib-target := $(obj)/lib.a
  136. endif
  137. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
  138. builtin-target := $(obj)/built-in.o
  139. endif
  140. modorder-target := $(obj)/modules.order
  141. # We keep a list of all modules in $(MODVERDIR)
  142. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  143. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  144. $(subdir-ym) $(always)
  145. @:
  146. # Linus' kernel sanity checking tool
  147. ifneq ($(KBUILD_CHECKSRC),0)
  148. ifeq ($(KBUILD_CHECKSRC),2)
  149. quiet_cmd_force_checksrc = CHECK $<
  150. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  151. else
  152. quiet_cmd_checksrc = CHECK $<
  153. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  154. endif
  155. endif
  156. # Do section mismatch analysis for each module/built-in.o
  157. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  158. cmd_secanalysis = ; scripts/mod/modpost $@
  159. endif
  160. # Compile C sources (.c)
  161. # ---------------------------------------------------------------------------
  162. # Default is built-in, unless we know otherwise
  163. modkern_cflags = \
  164. $(if $(part-of-module), \
  165. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  166. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  167. quiet_modtag := $(empty) $(empty)
  168. $(real-objs-m) : part-of-module := y
  169. $(real-objs-m:.o=.i) : part-of-module := y
  170. $(real-objs-m:.o=.s) : part-of-module := y
  171. $(real-objs-m:.o=.lst): part-of-module := y
  172. $(real-objs-m) : quiet_modtag := [M]
  173. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  174. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  175. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  176. $(obj-m) : quiet_modtag := [M]
  177. # Default for not multi-part modules
  178. modname = $(basetarget)
  179. $(multi-objs-m) : modname = $(modname-multi)
  180. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  181. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  182. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  183. $(multi-objs-y) : modname = $(modname-multi)
  184. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  185. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  186. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  187. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  188. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  189. $(obj)/%.s: $(src)/%.c FORCE
  190. $(call if_changed_dep,cc_s_c)
  191. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  192. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  193. $(obj)/%.i: $(src)/%.c FORCE
  194. $(call if_changed_dep,cc_i_c)
  195. cmd_gensymtypes = \
  196. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  197. $(GENKSYMS) $(if $(1), -T $(2)) \
  198. $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
  199. $(if $(KBUILD_PRESERVE),-p) \
  200. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  201. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  202. cmd_cc_symtypes_c = \
  203. set -e; \
  204. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  205. test -s $@ || rm -f $@
  206. $(obj)/%.symtypes : $(src)/%.c FORCE
  207. $(call cmd,cc_symtypes_c)
  208. # C (.c) files
  209. # The C file is compiled and updated dependency information is generated.
  210. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  211. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  212. ifndef CONFIG_MODVERSIONS
  213. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  214. else
  215. # When module versioning is enabled the following steps are executed:
  216. # o compile a .tmp_<file>.o from <file>.c
  217. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  218. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  219. # are done.
  220. # o otherwise, we calculate symbol versions using the good old
  221. # genksyms on the preprocessed source and postprocess them in a way
  222. # that they are usable as a linker script
  223. # o generate <file>.o from .tmp_<file>.o using the linker to
  224. # replace the unresolved symbols __crc_exported_symbol with
  225. # the actual value of the checksum generated by genksyms
  226. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  227. cmd_modversions = \
  228. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  229. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  230. > $(@D)/.tmp_$(@F:.o=.ver); \
  231. \
  232. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  233. -T $(@D)/.tmp_$(@F:.o=.ver); \
  234. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  235. else \
  236. mv -f $(@D)/.tmp_$(@F) $@; \
  237. fi;
  238. endif
  239. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  240. ifdef BUILD_C_RECORDMCOUNT
  241. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  242. RECORDMCOUNT_FLAGS = -w
  243. endif
  244. # Due to recursion, we must skip empty.o.
  245. # The empty.o file is created in the make process in order to determine
  246. # the target endianness and word size. It is made before all other C
  247. # files, including recordmcount.
  248. sub_cmd_record_mcount = \
  249. if [ $(@) != "scripts/mod/empty.o" ]; then \
  250. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  251. fi;
  252. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  253. $(srctree)/scripts/recordmcount.h
  254. else
  255. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  256. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  257. "$(if $(CONFIG_64BIT),64,32)" \
  258. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  259. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  260. "$(if $(part-of-module),1,0)" "$(@)";
  261. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  262. endif
  263. cmd_record_mcount = \
  264. if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
  265. $(sub_cmd_record_mcount) \
  266. fi;
  267. endif
  268. define rule_cc_o_c
  269. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  270. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  271. $(cmd_modversions) \
  272. $(call echo-cmd,record_mcount) \
  273. $(cmd_record_mcount) \
  274. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  275. $(dot-target).tmp; \
  276. rm -f $(depfile); \
  277. mv -f $(dot-target).tmp $(dot-target).cmd
  278. endef
  279. # Built-in and composite module parts
  280. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  281. $(call cmd,force_checksrc)
  282. $(call if_changed_rule,cc_o_c)
  283. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  284. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  285. $(call cmd,force_checksrc)
  286. $(call if_changed_rule,cc_o_c)
  287. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  288. quiet_cmd_cc_lst_c = MKLST $@
  289. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  290. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  291. System.map $(OBJDUMP) > $@
  292. $(obj)/%.lst: $(src)/%.c FORCE
  293. $(call if_changed_dep,cc_lst_c)
  294. # Compile assembler sources (.S)
  295. # ---------------------------------------------------------------------------
  296. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  297. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  298. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  299. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  300. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  301. $(obj)/%.s: $(src)/%.S FORCE
  302. $(call if_changed_dep,as_s_S)
  303. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  304. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  305. $(obj)/%.o: $(src)/%.S FORCE
  306. $(call if_changed_dep,as_o_S)
  307. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  308. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  309. # Linker scripts preprocessor (.lds.S -> .lds)
  310. # ---------------------------------------------------------------------------
  311. quiet_cmd_cpp_lds_S = LDS $@
  312. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  313. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  314. $(obj)/%.lds: $(src)/%.lds.S FORCE
  315. $(call if_changed_dep,cpp_lds_S)
  316. # ASN.1 grammar
  317. # ---------------------------------------------------------------------------
  318. quiet_cmd_asn1_compiler = ASN.1 $@
  319. cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
  320. $(subst .h,.c,$@) $(subst .c,.h,$@)
  321. .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
  322. $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
  323. $(call cmd,asn1_compiler)
  324. # Build the compiled-in targets
  325. # ---------------------------------------------------------------------------
  326. # To build objects in subdirs, we need to descend into the directories
  327. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  328. #
  329. # Rule to compile a set of .o files into one .o file
  330. #
  331. ifdef builtin-target
  332. quiet_cmd_link_o_target = LD $@
  333. # If the list of objects to link is empty, just create an empty built-in.o
  334. cmd_link_o_target = $(if $(strip $(obj-y)),\
  335. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  336. $(cmd_secanalysis),\
  337. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  338. $(builtin-target): $(obj-y) FORCE
  339. $(call if_changed,link_o_target)
  340. targets += $(builtin-target)
  341. endif # builtin-target
  342. #
  343. # Rule to create modules.order file
  344. #
  345. # Create commands to either record .ko file or cat modules.order from
  346. # a subdirectory
  347. modorder-cmds = \
  348. $(foreach m, $(modorder), \
  349. $(if $(filter %/modules.order, $m), \
  350. cat $m;, echo kernel/$m;))
  351. $(modorder-target): $(subdir-ym) FORCE
  352. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  353. #
  354. # Rule to compile a set of .o files into one .a file
  355. #
  356. ifdef lib-target
  357. quiet_cmd_link_l_target = AR $@
  358. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  359. $(lib-target): $(lib-y) FORCE
  360. $(call if_changed,link_l_target)
  361. targets += $(lib-target)
  362. endif
  363. #
  364. # Rule to link composite objects
  365. #
  366. # Composite objects are specified in kbuild makefile as follows:
  367. # <composite-object>-objs := <list of .o files>
  368. # or
  369. # <composite-object>-y := <list of .o files>
  370. link_multi_deps = \
  371. $(filter $(addprefix $(obj)/, \
  372. $($(subst $(obj)/,,$(@:.o=-objs))) \
  373. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  374. quiet_cmd_link_multi-y = LD $@
  375. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  376. quiet_cmd_link_multi-m = LD [M] $@
  377. cmd_link_multi-m = $(cmd_link_multi-y)
  378. # We would rather have a list of rules like
  379. # foo.o: $(foo-objs)
  380. # but that's not so easy, so we rather make all composite objects depend
  381. # on the set of all their parts
  382. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  383. $(call if_changed,link_multi-y)
  384. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  385. $(call if_changed,link_multi-m)
  386. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  387. targets += $(multi-used-y) $(multi-used-m)
  388. # Descending
  389. # ---------------------------------------------------------------------------
  390. PHONY += $(subdir-ym)
  391. $(subdir-ym):
  392. $(Q)$(MAKE) $(build)=$@
  393. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  394. # ---------------------------------------------------------------------------
  395. PHONY += FORCE
  396. FORCE:
  397. # Read all saved command lines and dependencies for the $(targets) we
  398. # may be building above, using $(if_changed{,_dep}). As an
  399. # optimization, we don't need to read them if the target does not
  400. # exist, we will rebuild anyway in that case.
  401. targets := $(wildcard $(sort $(targets)))
  402. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  403. ifneq ($(cmd_files),)
  404. include $(cmd_files)
  405. endif
  406. # Declare the contents of the .PHONY variable as phony. We keep that
  407. # information in a variable se we can use it in if_changed and friends.
  408. .PHONY: $(PHONY)