// SPDX-License-Identifier: GPL-2.0+ /* * ABB PGGA TEGR1 Device Tree Source * * Copyright (C) 2020 Heiko Schocher * */ /dts-v1/; / { model = "KMTEGR1"; compatible = "ABB,kmpbec8309"; #address-cells = <1>; #size-cells = <1>; aliases { ethernet0 = &enet_zynq; ethernet1 = &enet_piggy2; serial0 = &serial0; }; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8309@0 { device_type = "cpu"; reg = <0x0>; d-cache-line-size = <32>; // 32 bytes i-cache-line-size = <32>; // 32 bytes d-cache-size = <16384>; // L1, 16K i-cache-size = <16384>; // L1, 16K timebase-frequency = <66000000>; bus-frequency = <264000000>; clock-frequency = <264000000>; }; }; memory { device_type = "memory"; reg = <0x00000000 0x10000000>; }; soc: soc8309@e0000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; ranges = <0x0 0xe0000000 0x00100000>; reg = <0xe0000000 0x00000200>; bus-frequency = <264000000>; i2c@3000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl,mpc8313-i2c","fsl-i2c"; reg = <0x3000 0x100>; interrupts = <14 0x8>; interrupt-parent = <&ipic>; clock-frequency = <400000>; mux@70 { compatible = "nxp,pca9547"; reg = <0x70>; #address-cells = <1>; #size-cells = <0>; i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; /* * Inventory EEPROM of the * unit itself */ ivm@50 { label = "MAIN_CTRL"; compatible = "dummy"; reg = <0x50>; }; }; i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; /* Temperature sensors */ temp@48 { label = "front"; compatible = "national,lm75"; reg = <0x48>; }; temp@49 { label = "board"; compatible = "national,lm75"; reg = <0x49>; }; temp@4a { label = "power"; compatible = "national,lm75"; reg = <0x4a>; }; temp@4b { label = "bottom"; compatible = "national,lm75"; reg = <0x4b>; }; }; i2c@6 { reg = <6>; #address-cells = <1>; #size-cells = <0>; }; i2c@5 { reg = <5>; #address-cells = <1>; #size-cells = <0>; }; i2c@7 { reg = <7>; #address-cells = <1>; #size-cells = <0>; }; i2c@3 { reg = <3>; #address-cells = <1>; #size-cells = <0>; }; }; }; serial0: serial@4500 { cell-index = <0>; device_type = "serial"; compatible = "fsl,ns16550", "ns16550"; reg = <0x4500 0x100>; clock-frequency = <264000000>; interrupts = <9 0x8>; interrupt-parent = <&ipic>; }; dma@82a8 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8309-dma", "fsl,elo-dma"; reg = <0x82a8 4>; ranges = <0 0x8100 0x1a8>; interrupt-parent = <&ipic>; interrupts = <71 8>; cell-index = <0>; dma-channel@0 { compatible = "fsl,mpc8309-dma-channel", "fsl,elo-dma-channel"; reg = <0 0x80>; interrupt-parent = <&ipic>; interrupts = <71 8>; }; dma-channel@80 { compatible = "fsl,mpc8309-dma-channel", "fsl,elo-dma-channel"; reg = <0x80 0x80>; interrupt-parent = <&ipic>; interrupts = <71 8>; }; dma-channel@100 { compatible = "fsl,mpc8309-dma-channel", "fsl,elo-dma-channel"; reg = <0x100 0x80>; interrupt-parent = <&ipic>; interrupts = <71 8>; }; dma-channel@180 { compatible = "fsl,mpc8309-dma-channel", "fsl,elo-dma-channel"; reg = <0x180 0x28>; interrupt-parent = <&ipic>; interrupts = <71 8>; }; }; ipic: pic@700 { #address-cells = <0>; #interrupt-cells = <2>; compatible = "fsl,pq2pro-pic", "fsl,ipic"; interrupt-controller; reg = <0x700 0x100>; device_type = "ipic"; }; gpio1: gpio-controller@c00 { #gpio-cells = <2>; compatible = "fsl,mpc8309-gpio", "fsl,mpc8349-gpio"; reg = <0xc00 0x100>; interrupts = <75 0x8>; interrupt-parent = <&ipic>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; }; gpio2: gpio-controller@d00 { #gpio-cells = <2>; compatible = "fsl,mpc8309-gpio", "fsl,mpc8349-gpio"; reg = <0xd00 0x100>; interrupts = <75 0x8>; interrupt-parent = <&ipic>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; }; spi@7000 { cell-index = <0>; compatible = "fsl,spi"; reg = <0x7000 0x1000>; interrupts = <16 0x8>; interrupt-parent = <&ipic>; mode = "cpu"; #address-cells = <1>; #size-cells = <0>; /* GPIO_15 chipselect for ZYNQ flash */ gpios = <&gpio1 15 0>; zynq_flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spansion,m25p80"; reg = <0>; spi-max-frequency = <4000000>; m25p,fast-read; partition@0 { label = "bootloader"; reg = <0x0 0x01000000>; }; }; }; }; qe: qe@e0100000 { #address-cells = <1>; #size-cells = <1>; device_type = "qe"; compatible = "fsl,qe"; ranges = <0x0 0xe0100000 0x00100000>; reg = <0xe0100000 0x480>; brg-frequency = <0>; bus-frequency = <396000000>; fsl,qe-num-snums = <32>; muram@10000 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,qe-muram", "fsl,cpm-muram"; ranges = <0x0 0x00010000 0x00004000>; data-only@0 { compatible = "fsl,qe-muram-data", "fsl,cpm-muram-data"; reg = <0x0 0x4000>; }; }; /* ZYNQ (UCC1, MDIO 0x10, MII) */ enet_zynq: ethernet@2000 { device_type = "network"; compatible = "ucc_geth"; cell-index = <1>; reg = <0x2000 0x200>; interrupts = <32>; interrupt-parent = <&qeic>; local-mac-address = [ 00 00 00 00 00 00 ]; /*id=0, full-dup, 100M, no-pause, no-asym_p*/ fixed-link = <0 1 100 0 0>; rx-clock-name = "clk9"; tx-clock-name = "clk10"; phy-connection-type = "mii"; }; /* Piggy2 (UCC3, MDIO 0x00, RMII) */ enet_piggy2: ucc@2200 { device_type = "network"; compatible = "ucc_geth"; cell-index = <3>; reg = <0x2200 0x200>; interrupts = <34>; interrupt-parent = <&qeic>; local-mac-address = [ 00 00 00 00 00 00 ]; rx-clock-name = "none"; tx-clock-name = "clk12"; phy-handle = <&phy_piggy2>; phy-connection-type = "rmii"; }; mdio@2320 { #address-cells = <1>; #size-cells = <0>; reg = <0x2320 0x38>; compatible = "fsl,ucc-mdio"; /* Piggy2 (UCC3, MDIO 0x00, RMII) */ phy_piggy2: ethernet-phy@0 { reg = <0x0>; device_type = "ethernet-phy"; }; /* Explicitly set the tbi-phy to a non-zero address * so that it does not conflict with phy_piggy2 that * is unfortunately at address 0 */ tbi1: tbi-phy@1 { reg = <0x1>; device_type = "tbi-phy"; }; }; qeic: interrupt-controller@80 { interrupt-controller; compatible = "fsl,qe-ic"; #address-cells = <0>; #interrupt-cells = <1>; reg = <0x80 0x80>; big-endian; interrupts = <32 8 33 8>; interrupt-parent = <&ipic>; }; bootcount@0x13ff8 { device_type = "bootcount"; compatible = "u-boot,bootcount"; reg = <0x13ff8 0x08>; }; }; localbus@e0005000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,mpc8309-localbus", "fsl,pq2pro-localbus", "simple-bus"; reg = <0xe0005000 0xd8>; ranges = <0 0 0xf0000000 0x04000000 1 0 0xe8000000 0x01000000 2 0 0xe0000000 0x10000000 3 0 0xb0000000 0x10000000>; flash@0,0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x04000000>; bank-width = <2>; nornand = "nor"; #address-cells = <1>; #size-cells = <1>; use-advanced-sector-protection; partition@0 { /* 768KB */ label = "u-boot"; reg = <0 0xc0000>; }; partition@c0000 { /* 256KB */ label = "qe-fw"; reg = <0xc0000 0x40000>; }; partition@100000 { /* 128KB */ label = "env"; reg = <0x100000 0x20000>; }; partition@120000 { /* 128KB */ label = "envred"; reg = <0x120000 0x20000>; }; partition@140000 { /* 64256KB */ label = "ubi0"; reg = <0x140000 0x3EC0000>; }; }; }; }; #include "km8309-uboot.dtsi"