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@@ -25,8 +25,7 @@
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reg = <0x0 0x400>;
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clocks = <&rcc GPIOA>;
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st,bank-name = "GPIOA";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 0 16>;
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+ status = "disabled";
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};
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gpiob: gpio@50003000 {
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@@ -37,8 +36,7 @@
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reg = <0x1000 0x400>;
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clocks = <&rcc GPIOB>;
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st,bank-name = "GPIOB";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 16 16>;
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+ status = "disabled";
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};
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gpioc: gpio@50004000 {
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@@ -49,8 +47,7 @@
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reg = <0x2000 0x400>;
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clocks = <&rcc GPIOC>;
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st,bank-name = "GPIOC";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 32 16>;
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+ status = "disabled";
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};
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gpiod: gpio@50005000 {
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@@ -61,8 +58,7 @@
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reg = <0x3000 0x400>;
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clocks = <&rcc GPIOD>;
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st,bank-name = "GPIOD";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 48 16>;
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+ status = "disabled";
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};
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gpioe: gpio@50006000 {
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@@ -73,8 +69,7 @@
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reg = <0x4000 0x400>;
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clocks = <&rcc GPIOE>;
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st,bank-name = "GPIOE";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 64 16>;
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+ status = "disabled";
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};
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gpiof: gpio@50007000 {
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@@ -85,8 +80,7 @@
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reg = <0x5000 0x400>;
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clocks = <&rcc GPIOF>;
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st,bank-name = "GPIOF";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 80 16>;
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+ status = "disabled";
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};
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gpiog: gpio@50008000 {
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@@ -97,8 +91,7 @@
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reg = <0x6000 0x400>;
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clocks = <&rcc GPIOG>;
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st,bank-name = "GPIOG";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 96 16>;
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+ status = "disabled";
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};
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gpioh: gpio@50009000 {
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@@ -109,8 +102,7 @@
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reg = <0x7000 0x400>;
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clocks = <&rcc GPIOH>;
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st,bank-name = "GPIOH";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 112 16>;
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+ status = "disabled";
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};
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gpioi: gpio@5000a000 {
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@@ -121,8 +113,7 @@
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reg = <0x8000 0x400>;
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clocks = <&rcc GPIOI>;
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st,bank-name = "GPIOI";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 128 16>;
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+ status = "disabled";
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};
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gpioj: gpio@5000b000 {
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@@ -133,8 +124,7 @@
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reg = <0x9000 0x400>;
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clocks = <&rcc GPIOJ>;
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st,bank-name = "GPIOJ";
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- ngpios = <16>;
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- gpio-ranges = <&pinctrl 0 144 16>;
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+ status = "disabled";
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};
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gpiok: gpio@5000c000 {
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@@ -145,8 +135,7 @@
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reg = <0xa000 0x400>;
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clocks = <&rcc GPIOK>;
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st,bank-name = "GPIOK";
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- ngpios = <8>;
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- gpio-ranges = <&pinctrl 0 160 8>;
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+ status = "disabled";
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};
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adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 {
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@@ -186,6 +175,47 @@
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};
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};
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+ dcmi_pins_a: dcmi-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
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+ <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
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+ <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
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+ <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
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+ <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
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+ <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
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+ <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
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+ <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
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+ <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
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+ <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
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+ <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
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+ <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
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+ <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
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+ <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
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+ <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
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+ bias-disable;
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+ };
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+ };
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+
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+ dcmi_sleep_pins_a: dcmi-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
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+ <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
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+ <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
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+ <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
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+ <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
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+ <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
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+ <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
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+ <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
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+ <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
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+ <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
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+ <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
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+ <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
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+ <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
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+ <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
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+ <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
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+ };
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+ };
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+
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ethernet0_rgmii_pins_a: rgmii-0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
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@@ -308,6 +338,13 @@
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};
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};
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+ i2c1_pins_sleep_b: i2c1-3 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
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+ <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
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+ };
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+ };
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+
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i2c2_pins_a: i2c2-0 {
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pins {
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pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
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@@ -325,16 +362,21 @@
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};
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};
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- i2c2_pins_b: i2c2-2 {
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+ i2c2_pins_b1: i2c2-2 {
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pins {
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- pinmux = <STM32_PINMUX('Z', 0, AF3)>, /* I2C2_SCL */
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- <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
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+ pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
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bias-disable;
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drive-open-drain;
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slew-rate = <0>;
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};
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};
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+ i2c2_pins_sleep_b1: i2c2-3 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
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+ };
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+ };
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+
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i2c5_pins_a: i2c5-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
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@@ -353,6 +395,25 @@
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};
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};
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+ i2s2_pins_a: i2s2-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
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+ <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
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+ <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
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+ slew-rate = <1>;
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+ drive-push-pull;
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+ bias-disable;
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+ };
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+ };
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+
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+ i2s2_pins_sleep_a: i2s2-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
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+ <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
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+ <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
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+ };
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+ };
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+
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ltdc_pins_a: ltdc-a-0 {
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pins {
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pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
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@@ -547,6 +608,12 @@
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};
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};
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+ qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
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+ };
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+ };
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+
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qspi_bk1_pins_a: qspi-bk1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
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@@ -565,6 +632,16 @@
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};
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};
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+ qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
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+ <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
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+ <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
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+ <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
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+ <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
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+ };
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+ };
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+
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qspi_bk2_pins_a: qspi-bk2-0 {
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pins1 {
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pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
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@@ -583,6 +660,89 @@
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};
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};
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+ qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
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+ <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
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+ <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
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+ <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
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+ <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
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+ };
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+ };
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+
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+ sai2a_pins_a: sai2a-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
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+ <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
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+ <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
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+ <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
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+ slew-rate = <0>;
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+ drive-push-pull;
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+ bias-disable;
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+ };
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+ };
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+
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+ sai2a_sleep_pins_a: sai2a-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
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+ <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
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+ <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
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+ <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
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+ };
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+ };
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+
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+ sai2b_pins_a: sai2b-0 {
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+ pins1 {
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+ pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
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+ <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
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+ <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
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+ slew-rate = <0>;
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+ drive-push-pull;
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+ bias-disable;
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+ };
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+ pins2 {
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+ pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
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+ bias-disable;
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+ };
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+ };
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+
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+ sai2b_sleep_pins_a: sai2b-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
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+ <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
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+ <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
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+ <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
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+ };
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+ };
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+
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+ sai2b_pins_b: sai2b-2 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
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+ bias-disable;
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+ };
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+ };
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+
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+ sai2b_sleep_pins_b: sai2b-3 {
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+ pins {
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+ pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
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+ };
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+ };
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+
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+ sai4a_pins_a: sai4a-0 {
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+ pins {
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+ pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
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+ slew-rate = <0>;
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+ drive-push-pull;
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+ bias-disable;
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+ };
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+ };
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+
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+ sai4a_sleep_pins_a: sai4a-1 {
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+ pins {
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+ pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
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+ };
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+ };
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+
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sdmmc1_b4_pins_a: sdmmc1-b4-0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
|
|
@@ -752,12 +912,6 @@
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bias-disable;
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};
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};
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-
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- usbotg_hs_pins_a: usbotg_hs-0 {
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- pins {
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- pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
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- };
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- };
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};
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pinctrl_z: pin-controller-z@54004000 {
|
|
@@ -779,8 +933,22 @@
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|
|
clocks = <&rcc GPIOZ>;
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|
|
st,bank-name = "GPIOZ";
|
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|
st,bank-ioport = <11>;
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- ngpios = <8>;
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- gpio-ranges = <&pinctrl_z 0 400 8>;
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+ status = "disabled";
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+ };
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+
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+ i2c2_pins_b2: i2c2-0 {
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+ pins {
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|
+ pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
|
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|
+ bias-disable;
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|
+ drive-open-drain;
|
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|
+ slew-rate = <0>;
|
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+ };
|
|
|
+ };
|
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+
|
|
|
+ i2c2_pins_sleep_b2: i2c2-1 {
|
|
|
+ pins {
|
|
|
+ pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
|
|
|
+ };
|
|
|
};
|
|
|
|
|
|
i2c4_pins_a: i2c4-0 {
|