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@@ -0,0 +1,226 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright 2019 Google LLC
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+ */
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+
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+#include <common.h>
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+#include <dm.h>
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+#include <i2c.h>
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+#include <log.h>
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+#include <acpi/acpi_device.h>
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+#include <acpi/acpigen.h>
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+#include <acpi/acpi_dp.h>
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+#ifdef CONFIG_X86
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+#include <asm/intel_pinctrl_defs.h>
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+#endif
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+#include <asm-generic/gpio.h>
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+#include <dm/acpi.h>
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+
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+static bool acpi_i2c_add_gpios_to_crs(struct acpi_i2c_priv *priv)
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+{
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+ /*
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+ * Return false if:
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+ * 1. Request to explicitly disable export of GPIOs in CRS, or
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+ * 2. Both reset and enable GPIOs are not provided.
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+ */
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+ if (priv->disable_gpio_export_in_crs ||
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+ (!dm_gpio_is_valid(&priv->reset_gpio) &&
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+ !dm_gpio_is_valid(&priv->enable_gpio)))
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+ return false;
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+
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+ return true;
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+}
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+
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+static int acpi_i2c_write_gpio(struct acpi_ctx *ctx, struct gpio_desc *gpio,
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+ int *curindex)
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+{
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+ int ret;
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+
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+ if (!dm_gpio_is_valid(gpio))
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+ return -ENOENT;
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+
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+ acpi_device_write_gpio_desc(ctx, gpio);
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+ ret = *curindex;
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+ (*curindex)++;
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+
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+ return ret;
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+}
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+
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+int acpi_i2c_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
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+{
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+ int reset_gpio_index = -1, enable_gpio_index = -1, irq_gpio_index = -1;
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+ enum i2c_device_t type = dev_get_driver_data(dev);
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+ struct acpi_i2c_priv *priv = dev_get_priv(dev);
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+ struct acpi_dp *dsd = NULL;
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+ char scope[ACPI_PATH_MAX];
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+ char name[ACPI_NAME_MAX];
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+ int tx_state_val;
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+ int curindex = 0;
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+ int ret;
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+
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+#ifdef CONFIG_X86
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+ tx_state_val = PAD_CFG0_TX_STATE;
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+#elif defined(CONFIG_SANDBOX)
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+ tx_state_val = BIT(7); /* test value */
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+#else
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+#error "Not supported on this architecture"
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+#endif
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+ ret = acpi_get_name(dev, name);
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+ if (ret)
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+ return log_msg_ret("name", ret);
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+ ret = acpi_device_scope(dev, scope, sizeof(scope));
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+ if (ret)
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+ return log_msg_ret("scope", ret);
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+
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+ /* Device */
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+ acpigen_write_scope(ctx, scope);
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+ acpigen_write_device(ctx, name);
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+ acpigen_write_name_string(ctx, "_HID", priv->hid);
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+ if (type == I2C_DEVICE_HID_OVER_I2C)
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+ acpigen_write_name_string(ctx, "_CID", "PNP0C50");
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+ acpigen_write_name_integer(ctx, "_UID", priv->uid);
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+ acpigen_write_name_string(ctx, "_DDN", priv->desc);
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+ acpigen_write_sta(ctx, acpi_device_status(dev));
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+
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+ /* Resources */
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+ acpigen_write_name(ctx, "_CRS");
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+ acpigen_write_resourcetemplate_header(ctx);
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+ acpi_device_write_i2c_dev(ctx, dev);
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+
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+ /* Use either Interrupt() or GpioInt() */
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+ if (dm_gpio_is_valid(&priv->irq_gpio)) {
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+ irq_gpio_index = acpi_i2c_write_gpio(ctx, &priv->irq_gpio,
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+ &curindex);
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+ } else {
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+ ret = acpi_device_write_interrupt_irq(ctx, &priv->irq);
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+ if (ret < 0)
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+ return log_msg_ret("irq", ret);
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+ }
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+
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+ if (acpi_i2c_add_gpios_to_crs(priv)) {
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+ reset_gpio_index = acpi_i2c_write_gpio(ctx, &priv->reset_gpio,
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+ &curindex);
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+ enable_gpio_index = acpi_i2c_write_gpio(ctx, &priv->enable_gpio,
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+ &curindex);
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+ }
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+ acpigen_write_resourcetemplate_footer(ctx);
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+
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+ /* Wake capabilities */
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+ if (priv->wake) {
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+ acpigen_write_name_integer(ctx, "_S0W", 4);
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+ acpigen_write_prw(ctx, priv->wake, 3);
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+ }
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+
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+ /* DSD */
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+ if (priv->probed || priv->property_count || priv->compat_string ||
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+ reset_gpio_index >= 0 || enable_gpio_index >= 0 ||
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+ irq_gpio_index >= 0) {
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+ char path[ACPI_PATH_MAX];
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+
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+ ret = acpi_device_path(dev, path, sizeof(path));
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+ if (ret)
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+ return log_msg_ret("path", ret);
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+
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+ dsd = acpi_dp_new_table("_DSD");
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+ if (priv->compat_string)
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+ acpi_dp_add_string(dsd, "compatible",
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+ priv->compat_string);
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+ if (priv->probed)
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+ acpi_dp_add_integer(dsd, "linux,probed", 1);
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+ if (irq_gpio_index >= 0)
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+ acpi_dp_add_gpio(dsd, "irq-gpios", path,
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+ irq_gpio_index, 0,
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+ priv->irq_gpio.flags &
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+ GPIOD_ACTIVE_LOW ?
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+ ACPI_GPIO_ACTIVE_LOW : 0);
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+ if (reset_gpio_index >= 0)
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+ acpi_dp_add_gpio(dsd, "reset-gpios", path,
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+ reset_gpio_index, 0,
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+ priv->reset_gpio.flags &
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+ GPIOD_ACTIVE_LOW ?
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+ ACPI_GPIO_ACTIVE_LOW : 0);
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+ if (enable_gpio_index >= 0)
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+ acpi_dp_add_gpio(dsd, "enable-gpios", path,
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+ enable_gpio_index, 0,
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+ priv->enable_gpio.flags &
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+ GPIOD_ACTIVE_LOW ?
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+ ACPI_GPIO_ACTIVE_LOW : 0);
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+ /* Generic property list is not supported */
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+ acpi_dp_write(ctx, dsd);
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+ }
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+
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+ /* Power Resource */
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+ if (priv->has_power_resource) {
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+ ret = acpi_device_add_power_res(ctx, tx_state_val,
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+ "\\_SB.GPC0", "\\_SB.SPC0",
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+ &priv->reset_gpio, priv->reset_delay_ms,
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+ priv->reset_off_delay_ms, &priv->enable_gpio,
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+ priv->enable_delay_ms, priv->enable_off_delay_ms,
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+ &priv->stop_gpio, priv->stop_delay_ms,
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+ priv->stop_off_delay_ms);
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+ if (ret)
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+ return log_msg_ret("power", ret);
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+ }
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+ if (priv->hid_desc_reg_offset) {
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+ ret = acpi_device_write_dsm_i2c_hid(ctx,
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+ priv->hid_desc_reg_offset);
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+ if (ret)
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+ return log_msg_ret("dsm", ret);
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+ }
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+
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+ acpigen_pop_len(ctx); /* Device */
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+ acpigen_pop_len(ctx); /* Scope */
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+
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+ return 0;
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+}
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+
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+int acpi_i2c_ofdata_to_platdata(struct udevice *dev)
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+{
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+ struct acpi_i2c_priv *priv = dev_get_priv(dev);
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+
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+ gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset_gpio,
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+ GPIOD_IS_OUT);
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+ gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable_gpio,
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+ GPIOD_IS_OUT);
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+ gpio_request_by_name(dev, "irq-gpios", 0, &priv->irq_gpio, GPIOD_IS_IN);
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+ gpio_request_by_name(dev, "stop-gpios", 0, &priv->stop_gpio,
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+ GPIOD_IS_OUT);
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+ irq_get_by_index(dev, 0, &priv->irq);
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+ priv->hid = dev_read_string(dev, "acpi,hid");
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+ if (!priv->hid)
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+ return log_msg_ret("hid", -EINVAL);
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+ dev_read_u32(dev, "acpi,uid", &priv->uid);
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+ priv->desc = dev_read_string(dev, "acpi,ddn");
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+ dev_read_u32(dev, "acpi,wake", &priv->wake);
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+ priv->probed = dev_read_bool(dev, "linux,probed");
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+ priv->compat_string = dev_read_string(dev, "acpi,compatible");
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+ priv->has_power_resource = dev_read_bool(dev,
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+ "acpi,has-power-resource");
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+ dev_read_u32(dev, "hid-descr-addr", &priv->hid_desc_reg_offset);
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+ dev_read_u32(dev, "reset-delay-ms", &priv->reset_delay_ms);
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+ dev_read_u32(dev, "reset-off-delay-ms", &priv->reset_off_delay_ms);
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+ dev_read_u32(dev, "enable-delay-ms", &priv->enable_delay_ms);
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+ dev_read_u32(dev, "enable-off-delay-ms", &priv->enable_off_delay_ms);
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+ dev_read_u32(dev, "stop-delay-ms", &priv->stop_delay_ms);
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+ dev_read_u32(dev, "stop-off-delay-ms", &priv->stop_off_delay_ms);
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+
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+ return 0;
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+}
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+
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+/* Use name specified in priv or build one from I2C address */
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+static int acpi_i2c_get_name(const struct udevice *dev, char *out_name)
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+{
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+ struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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+ struct acpi_i2c_priv *priv = dev_get_priv(dev);
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+
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+ snprintf(out_name, ACPI_NAME_MAX,
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+ priv->hid_desc_reg_offset ? "H%03X" : "D%03X",
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+ chip->chip_addr);
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+
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+ return 0;
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+}
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+
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+struct acpi_ops acpi_i2c_ops = {
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+ .fill_ssdt = acpi_i2c_fill_ssdt,
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+ .get_name = acpi_i2c_get_name,
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+};
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