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@@ -17,64 +17,19 @@
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*/
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#include <common.h>
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+#include <dm.h>
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#include <mpc8xx.h>
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+#include <spi.h>
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+
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#include <asm/cpm_8xx.h>
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-#include <linux/ctype.h>
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-#include <malloc.h>
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-#include <post.h>
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-#include <serial.h>
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-
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-#define SPI_EEPROM_WREN 0x06
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-#define SPI_EEPROM_RDSR 0x05
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-#define SPI_EEPROM_READ 0x03
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-#define SPI_EEPROM_WRITE 0x02
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-
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-/* ---------------------------------------------------------------
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- * Offset for initial SPI buffers in DPRAM:
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- * We need a 520 byte scratch DPRAM area to use at an early stage.
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- * It is used between the two initialization calls (spi_init_f()
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- * and spi_init_r()).
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- * The value 0xb00 makes it far enough from the start of the data
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- * area (as well as from the stack pointer).
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- * --------------------------------------------------------------- */
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-#ifndef CONFIG_SYS_SPI_INIT_OFFSET
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-#define CONFIG_SYS_SPI_INIT_OFFSET 0xB00
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-#endif
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+#include <asm/io.h>
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#define CPM_SPI_BASE_RX CPM_SPI_BASE
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#define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t))
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-/* -------------------
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- * Function prototypes
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- * ------------------- */
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-ssize_t spi_xfer(size_t);
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-
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-/* -------------------
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- * Variables
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- * ------------------- */
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-
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#define MAX_BUFFER 0x104
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-/* ----------------------------------------------------------------------
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- * Initially we place the RX and TX buffers at a fixed location in DPRAM!
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- * ---------------------------------------------------------------------- */
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-static uchar *rxbuf =
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- (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem
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- [CONFIG_SYS_SPI_INIT_OFFSET];
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-static uchar *txbuf =
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- (uchar *)&((cpm8xx_t *)&((immap_t *)CONFIG_SYS_IMMR)->im_cpm)->cp_dpmem
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- [CONFIG_SYS_SPI_INIT_OFFSET+MAX_BUFFER];
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-
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-/* **************************************************************************
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- *
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- * Function: spi_init_f
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- *
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- * Description: Init SPI-Controller (ROM part)
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- *
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- * return: ---
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- *
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- * *********************************************************************** */
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-void spi_init_f(void)
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+static int mpc8xx_spi_probe(struct udevice *dev)
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{
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immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
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cpm8xx_t __iomem *cp = &immr->im_cpm;
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@@ -180,117 +135,24 @@ void spi_init_f(void)
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clrbits_be16(&tbdf->cbd_sc, BD_SC_READY);
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clrbits_be16(&rbdf->cbd_sc, BD_SC_EMPTY);
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- /* Set the bd's rx and tx buffer address pointers */
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- out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf);
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- out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf);
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-
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/* 10 + 11 */
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out_8(&cp->cp_spim, 0); /* Mask all SPI events */
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out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */
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- return;
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+ return 0;
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}
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-/* **************************************************************************
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- *
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- * Function: spi_init_r
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- *
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- * Description: Init SPI-Controller (RAM part) -
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- * The malloc engine is ready and we can move our buffers to
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- * normal RAM
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- *
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- * return: ---
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- *
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- * *********************************************************************** */
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-void spi_init_r(void)
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+static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
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+ const void *dout, void *din, unsigned long flags)
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{
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immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
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cpm8xx_t __iomem *cp = &immr->im_cpm;
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- spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI];
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- cbd_t __iomem *tbdf, *rbdf;
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-
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- /* Disable relocation */
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- out_be16(&spi->spi_rpbase, 0);
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-
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- /* tx and rx buffer descriptors */
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- tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX];
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- rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX];
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-
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- /* Allocate memory for RX and TX buffers */
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- rxbuf = (uchar *)malloc(MAX_BUFFER);
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- txbuf = (uchar *)malloc(MAX_BUFFER);
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-
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- out_be32(&rbdf->cbd_bufaddr, (ulong)rxbuf);
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- out_be32(&tbdf->cbd_bufaddr, (ulong)txbuf);
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-
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- return;
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-}
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-
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-/****************************************************************************
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- * Function: spi_write
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- **************************************************************************** */
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-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
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-{
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- int i;
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-
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- memset(rxbuf, 0, MAX_BUFFER);
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- memset(txbuf, 0, MAX_BUFFER);
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- *txbuf = SPI_EEPROM_WREN; /* write enable */
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- spi_xfer(1);
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- memcpy(txbuf, addr, alen);
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- *txbuf = SPI_EEPROM_WRITE; /* WRITE memory array */
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- memcpy(alen + txbuf, buffer, len);
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- spi_xfer(alen + len);
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- /* ignore received data */
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- for (i = 0; i < 1000; i++) {
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- *txbuf = SPI_EEPROM_RDSR; /* read status */
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- txbuf[1] = 0;
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- spi_xfer(2);
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- if (!(rxbuf[1] & 1))
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- break;
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- udelay(1000);
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- }
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- if (i >= 1000)
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- printf("*** spi_write: Time out while writing!\n");
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-
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- return len;
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-}
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-
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-/****************************************************************************
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- * Function: spi_read
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- **************************************************************************** */
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-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
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-{
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- memset(rxbuf, 0, MAX_BUFFER);
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- memset(txbuf, 0, MAX_BUFFER);
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- memcpy(txbuf, addr, alen);
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- *txbuf = SPI_EEPROM_READ; /* READ memory array */
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-
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- /*
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- * There is a bug in 860T (?) that cuts the last byte of input
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- * if we're reading into DPRAM. The solution we choose here is
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- * to always read len+1 bytes (we have one extra byte at the
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- * end of the buffer).
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- */
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- spi_xfer(alen + len + 1);
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- memcpy(buffer, alen + rxbuf, len);
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-
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- return len;
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-}
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-
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-/****************************************************************************
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- * Function: spi_xfer
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- **************************************************************************** */
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-ssize_t spi_xfer(size_t count)
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-{
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- immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
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- cpm8xx_t __iomem *cp = &immr->im_cpm;
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- spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI];
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cbd_t __iomem *tbdf, *rbdf;
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int tm;
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+ size_t count = (bitlen + 7) / 8;
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- /* Disable relocation */
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- out_be16(&spi->spi_rpbase, 0);
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+ if (count > MAX_BUFFER)
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+ return -EINVAL;
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tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX];
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rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX];
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@@ -299,10 +161,12 @@ ssize_t spi_xfer(size_t count)
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clrbits_be32(&cp->cp_pbdat, 0x0001);
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/* Setting tx bd status and data length */
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+ out_be32(&tbdf->cbd_bufaddr, (ulong)dout);
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out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP);
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out_be16(&tbdf->cbd_datlen, count);
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/* Setting rx bd status and data length */
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+ out_be32(&rbdf->cbd_bufaddr, (ulong)din);
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out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
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out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */
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@@ -333,3 +197,20 @@ ssize_t spi_xfer(size_t count)
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return count;
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}
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+
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+static const struct dm_spi_ops mpc8xx_spi_ops = {
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+ .xfer = mpc8xx_spi_xfer,
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+};
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+
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+static const struct udevice_id mpc8xx_spi_ids[] = {
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+ { .compatible = "fsl,mpc8xx-spi" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(mpc8xx_spi) = {
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+ .name = "mpc8xx_spi",
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+ .id = UCLASS_SPI,
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+ .of_match = mpc8xx_spi_ids,
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+ .ops = &mpc8xx_spi_ops,
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+ .probe = mpc8xx_spi_probe,
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+};
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