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@@ -269,7 +269,7 @@ fix_rela_dyn:
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/*
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* skip first reserved entry: address, type, addend
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*/
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- bne t1, t2, 7f
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+ j 10f
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6:
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LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */
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@@ -280,9 +280,7 @@ fix_rela_dyn:
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add t5, t5, t6 /* t5 <-- location to fix up in RAM */
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add t3, t3, t6 /* t3 <-- location to fix up in RAM */
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SREG t5, 0(t3)
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-7:
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- addi t1, t1, (REGBYTES*3)
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- ble t1, t2, 6b
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+ j 10f
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8:
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la t4, __dyn_sym_start
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@@ -299,13 +297,15 @@ fix_rela_dyn:
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li t5, SYM_SIZE
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mul t0, t0, t5
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add s5, t4, t0
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+ LREG t0, -(REGBYTES)(t1) /* t0 <-- addend */
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LREG t5, REGBYTES(s5)
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+ add t5, t5, t0
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add t5, t5, t6 /* t5 <-- location to fix up in RAM */
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add t3, t3, t6 /* t3 <-- location to fix up in RAM */
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SREG t5, 0(t3)
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10:
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addi t1, t1, (REGBYTES*3)
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- ble t1, t2, 9b
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+ ble t1, t2, 6b
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/*
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* trap update
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