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@@ -12,6 +12,7 @@
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#include <irq.h>
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#include <log.h>
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#include <malloc.h>
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+#include <p2sb.h>
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#include <acpi/acpi_s3.h>
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#include <asm/intel_pinctrl.h>
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#include <asm/io.h>
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@@ -21,10 +22,11 @@
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#include <asm/pci.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/systemagent.h>
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+#include <asm/arch/fsp_bindings.h>
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#include <asm/arch/fsp/fsp_configs.h>
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#include <asm/arch/fsp/fsp_s_upd.h>
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+#include <dm/uclass-internal.h>
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#include <linux/bitops.h>
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-#include <asm/arch/fsp_bindings.h>
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#define PCH_P2SB_E0 0xe0
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#define HIDE_BIT BIT(0)
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@@ -59,12 +61,6 @@ int fsps_update_config(struct udevice *dev, ulong rom_offset,
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return fsp_s_update_config_from_dtb(node, cfg);
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}
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-static void p2sb_set_hide_bit(pci_dev_t dev, int hide)
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-{
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- pci_x86_clrset_config(dev, PCH_P2SB_E0 + 1, HIDE_BIT,
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- hide ? HIDE_BIT : 0, PCI_SIZE_8);
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-}
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-
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/* Configure package power limits */
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static int set_power_limits(struct udevice *dev)
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{
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@@ -137,15 +133,15 @@ static int set_power_limits(struct udevice *dev)
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int p2sb_unhide(void)
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{
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- pci_dev_t dev = PCI_BDF(0, 0xd, 0);
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- ulong val;
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-
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- p2sb_set_hide_bit(dev, 0);
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-
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- pci_x86_read_config(dev, PCI_VENDOR_ID, &val, PCI_SIZE_16);
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+ struct udevice *dev;
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+ int ret;
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- if (val != PCI_VENDOR_ID_INTEL)
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- return log_msg_ret("p2sb unhide", -EIO);
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+ ret = uclass_find_first_device(UCLASS_P2SB, &dev);
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+ if (ret)
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+ return log_msg_ret("p2sb", ret);
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+ ret = p2sb_set_hide(dev, false);
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+ if (ret)
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+ return log_msg_ret("hide", ret);
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return 0;
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}
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