|
@@ -150,56 +150,3 @@ int board_late_init(void)
|
|
|
return 0;
|
|
|
}
|
|
|
#endif
|
|
|
-
|
|
|
-#if !defined(CONFIG_DM_ETH) && defined(CONFIG_DRIVER_TI_CPSW) && \
|
|
|
- !defined(CONFIG_SPL_BUILD)
|
|
|
-static void cpsw_control(int enabled)
|
|
|
-{
|
|
|
- /* VTP can be added here */
|
|
|
-
|
|
|
- return;
|
|
|
-}
|
|
|
-
|
|
|
-static struct cpsw_slave_data cpsw_slaves[] = {
|
|
|
- {
|
|
|
- .slave_reg_ofs = 0x208,
|
|
|
- .sliver_reg_ofs = 0xd80,
|
|
|
- .phy_addr = 0,
|
|
|
- }
|
|
|
-};
|
|
|
-
|
|
|
-static struct cpsw_platform_data cpsw_data = {
|
|
|
- .mdio_base = CPSW_MDIO_BASE,
|
|
|
- .cpsw_base = CPSW_BASE,
|
|
|
- .mdio_div = 0xff,
|
|
|
- .channels = 8,
|
|
|
- .cpdma_reg_ofs = 0x800,
|
|
|
- .slaves = 1,
|
|
|
- .slave_data = cpsw_slaves,
|
|
|
- .ale_reg_ofs = 0xd00,
|
|
|
- .ale_entries = 1024,
|
|
|
- .host_port_reg_ofs = 0x108,
|
|
|
- .hw_stats_reg_ofs = 0x900,
|
|
|
- .bd_ram_ofs = 0x2000,
|
|
|
- .mac_control = (1 << 5),
|
|
|
- .control = cpsw_control,
|
|
|
- .host_port_num = 0,
|
|
|
- .version = CPSW_CTRL_VERSION_2,
|
|
|
-};
|
|
|
-
|
|
|
-int board_eth_init(bd_t *bis)
|
|
|
-{
|
|
|
- int rv, n = 0;
|
|
|
-
|
|
|
- writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
|
|
|
- cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
|
|
-
|
|
|
- rv = cpsw_register(&cpsw_data);
|
|
|
- if (rv < 0)
|
|
|
- printf("Error %d registering CPSW switch\n", rv);
|
|
|
- else
|
|
|
- n += rv;
|
|
|
-
|
|
|
- return n;
|
|
|
-}
|
|
|
-#endif
|