|
@@ -618,7 +618,7 @@ int setup_bdinfo(void)
|
|
|
return arch_setup_bdinfo();
|
|
|
}
|
|
|
|
|
|
-#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
|
|
|
+#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
|
|
|
defined(CONFIG_SH)
|
|
|
static int setup_board_part1(void)
|
|
|
{
|
|
@@ -627,9 +627,6 @@ static int setup_board_part1(void)
|
|
|
#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
|
|
|
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
|
|
|
#endif
|
|
|
-#if defined(CONFIG_M68K)
|
|
|
- bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
|
|
|
-#endif
|
|
|
#if defined(CONFIG_MPC83xx)
|
|
|
bd->bi_immrbar = CONFIG_SYS_IMMR;
|
|
|
#endif
|
|
@@ -638,7 +635,7 @@ static int setup_board_part1(void)
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
|
+#if defined(CONFIG_PPC)
|
|
|
static int setup_board_part2(void)
|
|
|
{
|
|
|
struct bd_info *bd = gd->bd;
|
|
@@ -651,14 +648,6 @@ static int setup_board_part2(void)
|
|
|
bd->bi_sccfreq = gd->arch.scc_clk;
|
|
|
bd->bi_vco = gd->arch.vco_out;
|
|
|
#endif /* CONFIG_CPM2 */
|
|
|
-#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
|
|
|
- bd->bi_pcifreq = gd->pci_clk;
|
|
|
-#endif
|
|
|
-#if defined(CONFIG_EXTRA_CLOCK)
|
|
|
- bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
|
|
|
- bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
|
|
|
- bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
|
|
|
-#endif
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -985,11 +974,11 @@ static const init_fnc_t init_sequence_f[] = {
|
|
|
dram_init_banksize,
|
|
|
show_dram_config,
|
|
|
setup_bdinfo,
|
|
|
-#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
|
|
|
+#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
|
|
|
defined(CONFIG_SH)
|
|
|
setup_board_part1,
|
|
|
#endif
|
|
|
-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
|
|
|
+#if defined(CONFIG_PPC)
|
|
|
INIT_FUNC_WATCHDOG_RESET
|
|
|
setup_board_part2,
|
|
|
#endif
|