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@@ -6,6 +6,7 @@
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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+#include <panel.h>
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#include <pwm.h>
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#include <video.h>
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#include <asm/system.h>
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@@ -21,28 +22,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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-/* These are the stages we go throuh in enabling the LCD */
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-enum stage_t {
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- STAGE_START,
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- STAGE_PANEL_VDD,
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- STAGE_LVDS,
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- STAGE_BACKLIGHT_VDD,
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- STAGE_PWM,
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- STAGE_BACKLIGHT_EN,
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- STAGE_DONE,
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-};
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-
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-#define FDT_LCD_TIMINGS 4
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-
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-enum {
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- FDT_LCD_TIMING_REF_TO_SYNC,
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- FDT_LCD_TIMING_SYNC_WIDTH,
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- FDT_LCD_TIMING_BACK_PORCH,
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- FDT_LCD_TIMING_FRONT_PORCH,
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-
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- FDT_LCD_TIMING_COUNT,
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-};
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-
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enum lcd_cache_t {
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FDT_LCD_CACHE_OFF = 0,
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FDT_LCD_CACHE_WRITE_THROUGH = 1 << 0,
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@@ -54,37 +33,15 @@ enum lcd_cache_t {
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/* Information about the display controller */
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struct tegra_lcd_priv {
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- enum stage_t stage; /* Current stage we are at */
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- unsigned long timer_next; /* Time we can move onto next stage */
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int width; /* width in pixels */
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int height; /* height in pixels */
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-
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- /*
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- * log2 of number of bpp, in general, unless it bpp is 24 in which
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- * case this field holds 24 also! This is a U-Boot thing.
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- */
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- int log2_bpp;
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+ enum video_log2_bpp log2_bpp; /* colour depth */
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+ struct display_timing timing;
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+ struct udevice *panel;
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struct disp_ctlr *disp; /* Display controller to use */
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fdt_addr_t frame_buffer; /* Address of frame buffer */
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unsigned pixel_clock; /* Pixel clock in Hz */
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- uint horiz_timing[FDT_LCD_TIMING_COUNT]; /* Horizontal timing */
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- uint vert_timing[FDT_LCD_TIMING_COUNT]; /* Vertical timing */
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- struct udevice *pwm;
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- int pwm_channel; /* PWM channel to use for backlight */
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enum lcd_cache_t cache_type;
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-
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- struct gpio_desc backlight_en; /* GPIO for backlight enable */
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- struct gpio_desc lvds_shutdown; /* GPIO for lvds shutdown */
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- struct gpio_desc backlight_vdd; /* GPIO for backlight vdd */
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- struct gpio_desc panel_vdd; /* GPIO for panel vdd */
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- /*
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- * Panel required timings
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- * Timing 1: delay between panel_vdd-rise and data-rise
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- * Timing 2: delay between data-rise and backlight_vdd-rise
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- * Timing 3: delay between backlight_vdd and pwm-rise
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- * Timing 4: delay between pwm-rise and backlight_en-rise
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- */
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- uint panel_timings[FDT_LCD_TIMINGS];
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};
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enum {
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@@ -150,26 +107,23 @@ static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)
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writel(val, &dc->cmd.state_ctrl);
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}
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-static void write_pair(struct tegra_lcd_priv *priv, int item, u32 *reg)
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-{
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- writel(priv->horiz_timing[item] |
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- (priv->vert_timing[item] << 16), reg);
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-}
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-
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static int update_display_mode(struct dc_disp_reg *disp,
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struct tegra_lcd_priv *priv)
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{
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+ struct display_timing *dt = &priv->timing;
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unsigned long val;
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unsigned long rate;
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unsigned long div;
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writel(0x0, &disp->disp_timing_opt);
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- write_pair(priv, FDT_LCD_TIMING_REF_TO_SYNC, &disp->ref_to_sync);
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- write_pair(priv, FDT_LCD_TIMING_SYNC_WIDTH, &disp->sync_width);
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- write_pair(priv, FDT_LCD_TIMING_BACK_PORCH, &disp->back_porch);
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- write_pair(priv, FDT_LCD_TIMING_FRONT_PORCH, &disp->front_porch);
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- writel(priv->width | (priv->height << 16), &disp->disp_active);
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+ writel(1 | 1 << 16, &disp->ref_to_sync);
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+ writel(dt->hsync_len.typ | dt->vsync_len.typ << 16, &disp->sync_width);
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+ writel(dt->hback_porch.typ | dt->vback_porch.typ << 16,
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+ &disp->back_porch);
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+ writel((dt->hfront_porch.typ - 1) | (dt->vfront_porch.typ - 1) << 16,
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+ &disp->front_porch);
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+ writel(dt->hactive.typ | (dt->vactive.typ << 16), &disp->disp_active);
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val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT;
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val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT;
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@@ -287,12 +241,11 @@ static int setup_window(struct disp_ctl_win *win,
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win->stride = priv->width * (1 << priv->log2_bpp) / 8;
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debug("%s: depth = %d\n", __func__, priv->log2_bpp);
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switch (priv->log2_bpp) {
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- case 5:
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- case 24:
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+ case VIDEO_BPP32:
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win->fmt = COLOR_DEPTH_R8G8B8A8;
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win->bpp = 32;
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break;
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- case 4:
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+ case VIDEO_BPP16:
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win->fmt = COLOR_DEPTH_B5G6R5;
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win->bpp = 16;
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break;
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@@ -305,18 +258,6 @@ static int setup_window(struct disp_ctl_win *win,
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return 0;
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}
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-static void debug_timing(const char *name, unsigned int timing[])
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-{
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-#ifdef DEBUG
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- int i;
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-
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- debug("%s timing: ", name);
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- for (i = 0; i < FDT_LCD_TIMING_COUNT; i++)
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- debug("%d ", timing[i]);
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- debug("\n");
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-#endif
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-}
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-
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/**
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* Register a new display based on device tree configuration.
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*
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@@ -363,112 +304,6 @@ static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv,
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return 0;
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}
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-/**
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- * Handle the next stage of device init
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- */
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-static int handle_stage(const void *blob, struct tegra_lcd_priv *priv)
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-{
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- debug("%s: stage %d\n", __func__, priv->stage);
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-
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- /* do the things for this stage */
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- switch (priv->stage) {
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- case STAGE_START:
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- /*
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- * It is possible that the FDT has requested that the LCD be
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- * disabled. We currently don't support this. It would require
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- * changes to U-Boot LCD subsystem to have LCD support
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- * compiled in but not used. An easier option might be to
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- * still have a frame buffer, but leave the backlight off and
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- * remove all mention of lcd in the stdout environment
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- * variable.
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- */
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-
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- funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
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- break;
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- case STAGE_PANEL_VDD:
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- if (dm_gpio_is_valid(&priv->panel_vdd))
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- dm_gpio_set_value(&priv->panel_vdd, 1);
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- break;
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- case STAGE_LVDS:
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- if (dm_gpio_is_valid(&priv->lvds_shutdown))
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- dm_gpio_set_value(&priv->lvds_shutdown, 1);
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- break;
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- case STAGE_BACKLIGHT_VDD:
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- if (dm_gpio_is_valid(&priv->backlight_vdd))
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- dm_gpio_set_value(&priv->backlight_vdd, 1);
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- break;
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- case STAGE_PWM:
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- /* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
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- pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
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- pinmux_tristate_disable(PMUX_PINGRP_GPU);
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-
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- pwm_set_config(priv->pwm, priv->pwm_channel, 0xdf, 0xff);
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- pwm_set_enable(priv->pwm, priv->pwm_channel, true);
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- break;
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- case STAGE_BACKLIGHT_EN:
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- if (dm_gpio_is_valid(&priv->backlight_en))
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- dm_gpio_set_value(&priv->backlight_en, 1);
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- break;
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- case STAGE_DONE:
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- break;
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- }
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-
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- /* set up timer for next stage */
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- priv->timer_next = timer_get_us();
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- if (priv->stage < FDT_LCD_TIMINGS)
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- priv->timer_next += priv->panel_timings[priv->stage] * 1000;
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-
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- /* move to next stage */
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- priv->stage++;
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- return 0;
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-}
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-
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-/**
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- * Perform the next stage of the LCD init if it is time to do so.
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- *
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- * LCD init can be time-consuming because of the number of delays we need
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- * while waiting for the backlight power supply, etc. This function can
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- * be called at various times during U-Boot operation to advance the
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- * initialization of the LCD to the next stage if sufficient time has
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- * passed since the last stage. It keeps track of what stage it is up to
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- * and the time that it is permitted to move to the next stage.
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- *
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- * The final call should have wait=1 to complete the init.
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- *
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- * @param blob fdt blob containing LCD information
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- * @param wait 1 to wait until all init is complete, and then return
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- * 0 to return immediately, potentially doing nothing if it is
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- * not yet time for the next init.
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- */
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-static int tegra_lcd_check_next_stage(const void *blob,
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- struct tegra_lcd_priv *priv, int wait)
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-{
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- if (priv->stage == STAGE_DONE)
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- return 0;
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-
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- do {
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- /* wait if we need to */
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- debug("%s: stage %d\n", __func__, priv->stage);
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- if (priv->stage != STAGE_START) {
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- int delay = priv->timer_next - timer_get_us();
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-
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- if (delay > 0) {
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- if (wait)
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- udelay(delay);
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- else
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- return 0;
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- }
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- }
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-
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- if (handle_stage(blob, priv))
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- return -1;
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- } while (wait && priv->stage != STAGE_DONE);
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- if (priv->stage == STAGE_DONE)
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- debug("%s: LCD init complete\n", __func__);
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-
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- return 0;
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-}
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-
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static int tegra_lcd_probe(struct udevice *dev)
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{
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struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
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@@ -476,14 +311,23 @@ static int tegra_lcd_probe(struct udevice *dev)
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struct tegra_lcd_priv *priv = dev_get_priv(dev);
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const void *blob = gd->fdt_blob;
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int type = DCACHE_OFF;
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+ int ret;
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/* Initialize the Tegra display controller */
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+ funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
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if (tegra_display_probe(blob, priv, (void *)plat->base)) {
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printf("%s: Failed to probe display driver\n", __func__);
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return -1;
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}
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- tegra_lcd_check_next_stage(blob, priv, 1);
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+ pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
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+ pinmux_tristate_disable(PMUX_PINGRP_GPU);
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+
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+ ret = panel_enable_backlight(priv->panel);
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+ if (ret) {
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+ debug("%s: Cannot enable backlight, ret=%d\n", __func__, ret);
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+ return ret;
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+ }
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/* Set up the LCD caching as requested */
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if (priv->cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
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@@ -507,13 +351,11 @@ static int tegra_lcd_probe(struct udevice *dev)
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static int tegra_lcd_ofdata_to_platdata(struct udevice *dev)
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{
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struct tegra_lcd_priv *priv = dev_get_priv(dev);
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- struct fdtdec_phandle_args args;
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const void *blob = gd->fdt_blob;
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+ struct display_timing *timing;
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int node = dev->of_offset;
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- int front, back, ref;
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int panel_node;
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int rgb;
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- int bpp, bit;
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int ret;
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priv->disp = (struct disp_ctlr *)dev_get_addr(dev);
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@@ -523,96 +365,40 @@ static int tegra_lcd_ofdata_to_platdata(struct udevice *dev)
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}
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rgb = fdt_subnode_offset(blob, node, "rgb");
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-
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- panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel");
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- if (panel_node < 0) {
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- debug("%s: Cannot find panel information\n", __func__);
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+ if (rgb < 0) {
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+ debug("%s: Cannot find rgb subnode for '%s' (ret=%d)\n",
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+ __func__, dev->name, rgb);
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return -EINVAL;
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}
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- priv->width = fdtdec_get_int(blob, panel_node, "xres", -1);
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- priv->height = fdtdec_get_int(blob, panel_node, "yres", -1);
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- priv->pixel_clock = fdtdec_get_int(blob, panel_node, "clock", 0);
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- if (!priv->pixel_clock || priv->width == -1 || priv->height == -1) {
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- debug("%s: Pixel parameters missing\n", __func__);
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- return -EINVAL;
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- }
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-
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- back = fdtdec_get_int(blob, panel_node, "left-margin", -1);
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- front = fdtdec_get_int(blob, panel_node, "right-margin", -1);
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- ref = fdtdec_get_int(blob, panel_node, "hsync-len", -1);
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- if ((back | front | ref) == -1) {
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- debug("%s: Horizontal parameters missing\n", __func__);
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- return -EINVAL;
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- }
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-
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- /* Use a ref-to-sync of 1 always, and take this from the front porch */
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- priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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- priv->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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- priv->horiz_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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- priv->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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- priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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- debug_timing("horiz", priv->horiz_timing);
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-
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- back = fdtdec_get_int(blob, panel_node, "upper-margin", -1);
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- front = fdtdec_get_int(blob, panel_node, "lower-margin", -1);
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- ref = fdtdec_get_int(blob, panel_node, "vsync-len", -1);
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- if ((back | front | ref) == -1) {
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- debug("%s: Vertical parameters missing\n", __func__);
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- return -EINVAL;
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- }
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-
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- priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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- priv->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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- priv->vert_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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- priv->vert_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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- priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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- debug_timing("vert", priv->vert_timing);
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-
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- bpp = fdtdec_get_int(blob, panel_node, "nvidia,bits-per-pixel", -1);
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- bit = ffs(bpp) - 1;
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- if (bpp == (1 << bit))
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- priv->log2_bpp = bit;
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- else
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- priv->log2_bpp = bpp;
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- if (bpp == -1) {
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- debug("%s: Pixel bpp parameters missing\n", __func__);
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+ ret = fdtdec_decode_display_timing(blob, rgb, 0, &priv->timing);
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+ if (ret) {
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+ debug("%s: Cannot read display timing for '%s' (ret=%d)\n",
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+ __func__, dev->name, ret);
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return -EINVAL;
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}
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+ timing = &priv->timing;
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+ priv->width = timing->hactive.typ;
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+ priv->height = timing->vactive.typ;
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+ priv->pixel_clock = timing->pixelclock.typ;
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+ priv->log2_bpp = VIDEO_BPP16;
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|
|
|
|
|
- if (fdtdec_parse_phandle_with_args(blob, panel_node, "nvidia,pwm",
|
|
|
- "#pwm-cells", 0, 0, &args)) {
|
|
|
- debug("%s: Unable to decode PWM\n", __func__);
|
|
|
+ /*
|
|
|
+ * Sadly the panel phandle is in an rgb subnode so we cannot use
|
|
|
+ * uclass_get_device_by_phandle().
|
|
|
+ */
|
|
|
+ panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel");
|
|
|
+ if (panel_node < 0) {
|
|
|
+ debug("%s: Cannot find panel information\n", __func__);
|
|
|
return -EINVAL;
|
|
|
}
|
|
|
-
|
|
|
- ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm);
|
|
|
+ ret = uclass_get_device_by_of_offset(UCLASS_PANEL, panel_node,
|
|
|
+ &priv->panel);
|
|
|
if (ret) {
|
|
|
- debug("%s: Unable to find PWM\n", __func__);
|
|
|
- return -EINVAL;
|
|
|
+ debug("%s: Cannot find panel for '%s' (ret=%d)\n", __func__,
|
|
|
+ dev->name, ret);
|
|
|
+ return ret;
|
|
|
}
|
|
|
- priv->pwm_channel = args.args[0];
|
|
|
-
|
|
|
- priv->cache_type = fdtdec_get_int(blob, panel_node, "nvidia,cache-type",
|
|
|
- FDT_LCD_CACHE_WRITE_BACK_FLUSH);
|
|
|
-
|
|
|
- /* These GPIOs are all optional */
|
|
|
- gpio_request_by_name_nodev(blob, panel_node,
|
|
|
- "nvidia,backlight-enable-gpios", 0,
|
|
|
- &priv->backlight_en, GPIOD_IS_OUT);
|
|
|
- gpio_request_by_name_nodev(blob, panel_node,
|
|
|
- "nvidia,lvds-shutdown-gpios", 0,
|
|
|
- &priv->lvds_shutdown, GPIOD_IS_OUT);
|
|
|
- gpio_request_by_name_nodev(blob, panel_node,
|
|
|
- "nvidia,backlight-vdd-gpios", 0,
|
|
|
- &priv->backlight_vdd, GPIOD_IS_OUT);
|
|
|
- gpio_request_by_name_nodev(blob, panel_node,
|
|
|
- "nvidia,panel-vdd-gpios", 0,
|
|
|
- &priv->panel_vdd, GPIOD_IS_OUT);
|
|
|
-
|
|
|
- if (fdtdec_get_int_array(blob, panel_node, "nvidia,panel-timings",
|
|
|
- priv->panel_timings, FDT_LCD_TIMINGS))
|
|
|
- return -EINVAL;
|
|
|
|
|
|
return 0;
|
|
|
}
|