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@@ -333,16 +333,18 @@ void set_chipselect_size(int const cs_size)
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}
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#endif
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-#if defined(CONFIG_MX7)
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+#if defined(CONFIG_MX7) || defined(CONFIG_MX8M)
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/*
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* OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
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* defines a 2-bit SPEED_GRADING
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*/
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#define OCOTP_TESTER3_SPEED_SHIFT 8
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-#define OCOTP_TESTER3_SPEED_800MHZ 0
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-#define OCOTP_TESTER3_SPEED_500MHZ 1
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-#define OCOTP_TESTER3_SPEED_1GHZ 2
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-#define OCOTP_TESTER3_SPEED_1P2GHZ 3
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+enum cpu_speed {
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+ OCOTP_TESTER3_SPEED_GRADE0,
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+ OCOTP_TESTER3_SPEED_GRADE1,
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+ OCOTP_TESTER3_SPEED_GRADE2,
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+ OCOTP_TESTER3_SPEED_GRADE3,
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+};
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u32 get_cpu_speed_grade_hz(void)
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{
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@@ -357,15 +359,16 @@ u32 get_cpu_speed_grade_hz(void)
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val &= 0x3;
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switch(val) {
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- case OCOTP_TESTER3_SPEED_800MHZ:
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+ case OCOTP_TESTER3_SPEED_GRADE0:
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return 800000000;
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- case OCOTP_TESTER3_SPEED_500MHZ:
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- return 500000000;
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- case OCOTP_TESTER3_SPEED_1GHZ:
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- return 1000000000;
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- case OCOTP_TESTER3_SPEED_1P2GHZ:
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- return 1200000000;
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+ case OCOTP_TESTER3_SPEED_GRADE1:
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+ return is_mx7() ? 500000000 : 1000000000;
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+ case OCOTP_TESTER3_SPEED_GRADE2:
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+ return is_mx7() ? 1000000000 : 1300000000;
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+ case OCOTP_TESTER3_SPEED_GRADE3:
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+ return is_mx7() ? 1200000000 : 1500000000;
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}
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+
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return 0;
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}
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