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Merge git://git.denx.de/u-boot-imx

Tom Rini 6 лет назад
Родитель
Сommit
e12546de54

+ 0 - 1
arch/arm/dts/Makefile

@@ -396,7 +396,6 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
 	imx6sx-sdb.dtb \
 	imx6ul-geam-kit.dtb \
 	imx6ul-isiot-emmc.dtb \
-	imx6ul-isiot-mmc.dtb \
 	imx6ul-isiot-nand.dtb \
 	imx6ul-opos6uldev.dtb
 

+ 2 - 0
arch/arm/dts/imx6qdl-icore-rqs.dtsi

@@ -114,6 +114,7 @@
 };
 
 &usdhc4 {
+	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc4>;
 	no-1-8-v;
@@ -183,6 +184,7 @@
 	};
 
 	pinctrl_usdhc4: usdhc4grp {
+		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17070
 			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10070

+ 0 - 50
arch/arm/dts/imx6ul-isiot-mmc.dts

@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2016 Amarula Solutions B.V.
- * Copyright (C) 2016 Engicam S.r.l.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License
- *     version 2 as published by the Free Software Foundation.
- *
- *     This file is distributed in the hope that it will be useful
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-
-#include "imx6ul-isiot.dtsi"
-
-/ {
-	model = "Engicam Is.IoT MX6UL MMC Starterkit";
-	compatible = "engicam,imx6ul-isiot", "fsl,imx6ul";
-};

+ 20 - 7
arch/arm/include/asm/mach-imx/hab.h

@@ -38,6 +38,12 @@ struct ivt {
 	uint32_t reserved2;	/* Reserved should be zero */
 };
 
+struct __packed hab_hdr {
+	u8 tag;              /* Tag field */
+	u8 len[2];           /* Length field in bytes (big-endian) */
+	u8 par;              /* Parameters field */
+};
+
 /* -------- start of HAB API updates ------------*/
 /* The following are taken from HAB4 SIS */
 
@@ -162,7 +168,14 @@ typedef void hapi_clock_init_t(void);
 #ifdef CONFIG_ROM_UNIFIED_SECTIONS
 #define HAB_RVT_BASE			0x00000100
 #else
-#define HAB_RVT_BASE			0x00000094
+#define HAB_RVT_BASE_NEW		0x00000098
+#define HAB_RVT_BASE_OLD		0x00000094
+#define HAB_RVT_BASE ((is_mx6dqp()) ?					\
+			HAB_RVT_BASE_NEW :				\
+			(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?	\
+			HAB_RVT_BASE_NEW :				\
+			(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?	\
+			HAB_RVT_BASE_NEW : HAB_RVT_BASE_OLD)
 #endif
 
 #define HAB_RVT_ENTRY			(*(uint32_t *)(HAB_RVT_BASE + 0x04))
@@ -173,15 +186,15 @@ typedef void hapi_clock_init_t(void);
 #define HAB_RVT_REPORT_STATUS		(*(uint32_t *)(HAB_RVT_BASE + 0x24))
 #define HAB_RVT_FAILSAFE		(*(uint32_t *)(HAB_RVT_BASE + 0x28))
 
-#define HAB_RVT_REPORT_EVENT_NEW               (*(uint32_t *)0x000000B8)
-#define HAB_RVT_REPORT_STATUS_NEW              (*(uint32_t *)0x000000BC)
-#define HAB_RVT_AUTHENTICATE_IMAGE_NEW         (*(uint32_t *)0x000000A8)
-#define HAB_RVT_ENTRY_NEW                      (*(uint32_t *)0x0000009C)
-#define HAB_RVT_EXIT_NEW                       (*(uint32_t *)0x000000A0)
-
 #define HAB_CID_ROM 0 /**< ROM Caller ID */
 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
 
+#define HAB_CMD_HDR          0xD4  /* CSF Header */
+#define HAB_CMD_WRT_DAT      0xCC  /* Write Data command tag */
+#define HAB_CMD_CHK_DAT      0xCF  /* Check Data command tag */
+#define HAB_CMD_SET          0xB1  /* Set command tag */
+#define HAB_PAR_MID          0x01  /* MID parameter value */
+
 #define IVT_SIZE			0x20
 #define CSF_PAD_SIZE			0x2000
 

+ 119 - 101
arch/arm/mach-imx/hab.c

@@ -13,96 +13,6 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/hab.h>
 
-/* -------- start of HAB API updates ------------*/
-
-#define hab_rvt_report_event_p					\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
-	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)	\
-)
-
-#define hab_rvt_report_status_p					\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
-	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)	\
-)
-
-#define hab_rvt_authenticate_image_p				\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
-)
-
-#define hab_rvt_entry_p						\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
-	((hab_rvt_entry_t *)HAB_RVT_ENTRY)			\
-)
-
-#define hab_rvt_exit_p						\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
-	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
-)
-
-static inline void hab_rvt_failsafe_new(void)
-{
-}
-
-#define hab_rvt_failsafe_p				\
-(							\
-	(is_mx6dqp()) ?					\
-	((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) :	\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?	\
-	((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) :	\
-	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?	\
-	((hab_rvt_failsafe_t *)hab_rvt_failsafe_new) :	\
-	((hab_rvt_failsafe_t *)HAB_RVT_FAILSAFE)	\
-)
-
-static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
-						       const void *start,
-						       size_t bytes)
-{
-	return HAB_SUCCESS;
-}
-
-#define hab_rvt_check_target_p					\
-(								\
-	(is_mx6dqp()) ?						\
-	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
-	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
-	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
-	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
-	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
-	((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET)	\
-)
-
 #define ALIGN_SIZE		0x1000
 #define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
 #define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
@@ -344,8 +254,9 @@ static int get_hab_status(void)
 	hab_rvt_report_event_t *hab_rvt_report_event;
 	hab_rvt_report_status_t *hab_rvt_report_status;
 
-	hab_rvt_report_event = hab_rvt_report_event_p;
-	hab_rvt_report_status = hab_rvt_report_status_p;
+	hab_rvt_report_event = (hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT;
+	hab_rvt_report_status =
+			(hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS;
 
 	if (imx_hab_is_enabled())
 		puts("\nSecure boot enabled\n");
@@ -424,7 +335,7 @@ static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc,
 		return 1;
 	}
 
-	hab_rvt_failsafe = hab_rvt_failsafe_p;
+	hab_rvt_failsafe = (hab_rvt_failsafe_t *)HAB_RVT_FAILSAFE;
 	hab_rvt_failsafe();
 
 	return 0;
@@ -453,6 +364,103 @@ U_BOOT_CMD(
 
 #endif /* !defined(CONFIG_SPL_BUILD) */
 
+/* Get CSF Header length */
+static int get_hab_hdr_len(struct hab_hdr *hdr)
+{
+	return (size_t)((hdr->len[0] << 8) + (hdr->len[1]));
+}
+
+/* Check whether addr lies between start and
+ * end and is within the length of the image
+ */
+static int chk_bounds(u8 *addr, size_t bytes, u8 *start, u8 *end)
+{
+	size_t csf_size = (size_t)((end + 1) - addr);
+
+	return (addr && (addr >= start) && (addr <= end) &&
+		(csf_size >= bytes));
+}
+
+/* Get Length of each command in CSF */
+static int get_csf_cmd_hdr_len(u8 *csf_hdr)
+{
+	if (*csf_hdr == HAB_CMD_HDR)
+		return sizeof(struct hab_hdr);
+
+	return get_hab_hdr_len((struct hab_hdr *)csf_hdr);
+}
+
+/* Check if CSF is valid */
+static bool csf_is_valid(struct ivt *ivt, ulong start_addr, size_t bytes)
+{
+	u8 *start = (u8 *)start_addr;
+	u8 *csf_hdr;
+	u8 *end;
+
+	size_t csf_hdr_len;
+	size_t cmd_hdr_len;
+	size_t offset = 0;
+
+	if (bytes != 0)
+		end = start + bytes - 1;
+	else
+		end = start;
+
+	/* Verify if CSF pointer content is zero */
+	if (!ivt->csf) {
+		puts("Error: CSF pointer is NULL\n");
+		return false;
+	}
+
+	csf_hdr = (u8 *)ivt->csf;
+
+	/* Verify if CSF Header exist */
+	if (*csf_hdr != HAB_CMD_HDR) {
+		puts("Error: CSF header command not found\n");
+		return false;
+	}
+
+	csf_hdr_len = get_hab_hdr_len((struct hab_hdr *)csf_hdr);
+
+	/* Check if the CSF lies within the image bounds */
+	if (!chk_bounds(csf_hdr, csf_hdr_len, start, end)) {
+		puts("Error: CSF lies outside the image bounds\n");
+		return false;
+	}
+
+	do {
+		struct hab_hdr *cmd;
+
+		cmd = (struct hab_hdr *)&csf_hdr[offset];
+
+		switch (cmd->tag) {
+		case (HAB_CMD_WRT_DAT):
+			puts("Error: Deprecated write command found\n");
+			return false;
+		case (HAB_CMD_CHK_DAT):
+			puts("Error: Deprecated check command found\n");
+			return false;
+		case (HAB_CMD_SET):
+			if (cmd->par == HAB_PAR_MID) {
+				puts("Error: Deprecated Set MID command found\n");
+				return false;
+			}
+		default:
+			break;
+		}
+
+		cmd_hdr_len = get_csf_cmd_hdr_len(&csf_hdr[offset]);
+		if (!cmd_hdr_len) {
+			puts("Error: Invalid command length\n");
+			return false;
+		}
+		offset += cmd_hdr_len;
+
+	} while (offset < csf_hdr_len);
+
+	return true;
+}
+
 bool imx_hab_is_enabled(void)
 {
 	struct imx_sec_config_fuse_t *fuse =
@@ -485,10 +493,11 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 	struct ivt_header *ivt_hdr;
 	enum hab_status status;
 
-	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
-	hab_rvt_entry = hab_rvt_entry_p;
-	hab_rvt_exit = hab_rvt_exit_p;
-	hab_rvt_check_target = hab_rvt_check_target_p;
+	hab_rvt_authenticate_image =
+		(hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE;
+	hab_rvt_entry = (hab_rvt_entry_t *)HAB_RVT_ENTRY;
+	hab_rvt_exit = (hab_rvt_exit_t *)HAB_RVT_EXIT;
+	hab_rvt_check_target = (hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET;
 
 	if (!imx_hab_is_enabled()) {
 		puts("hab fuse not enabled\n");
@@ -507,18 +516,28 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
 
 	/* Verify IVT header bugging out on error */
 	if (verify_ivt_header(ivt_hdr))
-		goto hab_caam_clock_disable;
+		goto hab_authentication_exit;
 
 	/* Verify IVT body */
 	if (ivt->self != ivt_addr) {
 		printf("ivt->self 0x%08x pointer is 0x%08x\n",
 		       ivt->self, ivt_addr);
-		goto hab_caam_clock_disable;
+		goto hab_authentication_exit;
+	}
+
+	/* Verify if IVT DCD pointer is NULL */
+	if (ivt->dcd) {
+		puts("Error: DCD pointer must be NULL\n");
+		goto hab_authentication_exit;
 	}
 
 	start = ddr_start;
 	bytes = image_size;
 
+	/* Verify CSF */
+	if (!csf_is_valid(ivt, start, bytes))
+		goto hab_authentication_exit;
+
 	if (hab_rvt_entry() != HAB_SUCCESS) {
 		puts("hab entry function fail\n");
 		goto hab_exit_failure_print_status;
@@ -591,8 +610,7 @@ hab_exit_failure_print_status:
 	get_hab_status();
 #endif
 
-hab_caam_clock_disable:
-	hab_caam_clock_enable(0);
+hab_authentication_exit:
 
 	if (load_addr != 0)
 		result = 0;

+ 0 - 1
arch/arm/mach-imx/mx6/Kconfig

@@ -238,7 +238,6 @@ config TARGET_MX6Q_ENGICAM
 	select DM_MMC
 	select DM_THERMAL
 	select SUPPORT_SPL
-	select SPL_LOAD_FIT
 	select SPL_DM if SPL
 	select SPL_OF_CONTROL if SPL
 	select SPL_SEPARATE_BSS if SPL

+ 23 - 0
arch/arm/mach-imx/spl.c

@@ -132,6 +132,29 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 }
 #endif
 
+#if defined(CONFIG_SPL_MMC_SUPPORT)
+/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
+u32 spl_boot_mode(const u32 boot_device)
+{
+	switch (spl_boot_device()) {
+	/* for MMC return either RAW or FAT mode */
+	case BOOT_DEVICE_MMC1:
+	case BOOT_DEVICE_MMC2:
+#if defined(CONFIG_SPL_FAT_SUPPORT)
+		return MMCSD_MODE_FS;
+#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
+		return MMCSD_MODE_EMMCBOOT;
+#else
+		return MMCSD_MODE_RAW;
+#endif
+		break;
+	default:
+		puts("spl: ERROR:  unsupported device\n");
+		hang();
+	}
+}
+#endif
+
 #if defined(CONFIG_SECURE_BOOT)
 
 /*

+ 0 - 2
board/compulab/cm_fx6/spl.c

@@ -107,8 +107,6 @@ static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = {
 	.mif3_mode	= 3,
 	.rst_to_cke	= 0x23,
 	.sde_to_rst	= 0x10,
-	.refsel = 1,		/* Refresh cycles at 32KHz */
-	.refr = 7,		/* 8 refresh commands per refresh cycle */
 };
 
 static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = {

+ 7 - 1
board/engicam/imx6q/MAINTAINERS

@@ -4,11 +4,17 @@ S:	Maintained
 F:	board/engicam/imx6q
 F:	include/configs/imx6-engicam.h
 F:	configs/imx6qdl_icore_mmc_defconfig
-F:	configs/imx6qdl_icore_nand_defconfig
+F:	configs/imx6q_icore_nand_defconfig
+F:	configs/imx6dl_icore_nand_defconfig
 F:	configs/imx6qdl_icore_rqs_defconfig
+F:	configs/imx6qdl_icore_mipi_defconfig
+F:	configs/imx6qdl_icore_nand_defconfig
 F:	arch/arm/dts/imx6qdl-icore.dtsi
 F:	arch/arm/dts/imx6q-icore.dts
 F:	arch/arm/dts/imx6dl-icore.dts
 F:	arch/arm/dts/imx6qdl-icore-rqs.dtsi
 F:	arch/arm/dts/imx6q-icore-rqs.dts
 F:	arch/arm/dts/imx6dl-icore-rqs.dts
+F:	arch/arm/dts/imx6dl-icore-mipi.dts
+F:	arch/arm/dts/imx6q-icore-mipi.dts
+F:	arch/arm/dts/imx6qdl-icore.dtsi

+ 0 - 1
board/engicam/imx6ul/MAINTAINERS

@@ -10,6 +10,5 @@ F:	configs/imx6ul_isiot_mmc_defconfig
 F:	configs/imx6ul_isiot_nand_defconfig
 F:	arch/arm/dts/imx6ul-geam-kit.dts
 F:	arch/arm/dts/imx6ul-isiot.dtsi
-F:	arch/arm/dts/imx6ul-isiot-mmc.dts
 F:	arch/arm/dts/imx6ul-isiot-emmc.dts
 F:	arch/arm/dts/imx6ul-isiot-nand.dts

+ 47 - 0
configs/imx6dl_icore_nand_defconfig

@@ -0,0 +1,47 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x17800000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_MX6Q_ENGICAM=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+# CONFIG_CMD_BMODE is not set
+CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore"
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_SPL=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="icorem6qdl> "
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),8m(kernel),1m(dtb),-(rootfs)"
+CONFIG_CMD_UBI=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
+CONFIG_FEC_MXC=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_MXC_UART=y
+CONFIG_IMX_THERMAL=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_IPUV3=y

+ 13 - 10
configs/imx6ul_isiot_mmc_defconfig → configs/imx6q_icore_nand_defconfig

@@ -1,16 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_MX6UL_ENGICAM=y
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 # CONFIG_CMD_BMODE is not set
-CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-mmc"
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -18,10 +16,9 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_DMA_SUPPORT=y
 CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="isiotmx6ul> "
-CONFIG_CRC32_VERIFY=y
+CONFIG_SYS_PROMPT="icorem6qdl> "
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
@@ -29,13 +26,17 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_MMC=y
+CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),8m(kernel),1m(dtb),-(rootfs)"
+CONFIG_CMD_UBI=y
+CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_NAND=y
+CONFIG_NAND_MXS=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_SMSC=y
 CONFIG_FEC_MXC=y
@@ -43,3 +44,5 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_MXC_UART=y
 CONFIG_IMX_THERMAL=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_IPUV3=y

+ 1 - 1
configs/imx6qdl_icore_mipi_defconfig

@@ -19,7 +19,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl-mipi> "

+ 1 - 1
configs/imx6qdl_icore_mmc_defconfig

@@ -19,7 +19,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl> "

+ 1 - 1
configs/imx6qdl_icore_rqs_defconfig

@@ -18,7 +18,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl-rqs> "

+ 0 - 1
configs/imx6ul_geam_mmc_defconfig

@@ -18,7 +18,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="geam6ul> "
 CONFIG_CRC32_VERIFY=y

+ 2 - 1
configs/imx6ul_isiot_emmc_defconfig

@@ -18,12 +18,12 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
 CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_SPL=y
-CONFIG_SPL_EXT_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="isiotmx6ul> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
@@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_I2C_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_SMSC=y
 CONFIG_FEC_MXC=y

+ 1 - 0
configs/mx6sabresd_defconfig

@@ -49,6 +49,7 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_EFI_PARTITION=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y