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phy: add driver for Qualcomm IPQ40xx USB PHY

Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko il y a 3 ans
Parent
commit
dec042028e
4 fichiers modifiés avec 153 ajouts et 0 suppressions
  1. 1 0
      MAINTAINERS
  2. 6 0
      drivers/phy/Kconfig
  3. 1 0
      drivers/phy/Makefile
  4. 145 0
      drivers/phy/phy-qcom-ipq4019-usb.c

+ 1 - 0
MAINTAINERS

@@ -240,6 +240,7 @@ F:	arch/arm/mach-ipq40xx/
 F:	include/dt-bindings/clock/qcom,ipq4019-gcc.h
 F:	include/dt-bindings/reset/qcom,ipq4019-reset.h
 F:	drivers/reset/reset-ipq4019.c
+F:	drivers/phy/phy-qcom-ipq4019-usb.c
 
 ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
 M:	Stefan Roese <sr@denx.de>

+ 6 - 0
drivers/phy/Kconfig

@@ -125,6 +125,12 @@ config STI_USB_PHY
 	  used by USB2 and USB3 Host controllers available on
 	  STiH407 SoC families.
 
+config PHY_QCOM_IPQ4019_USB
+	tristate "Qualcomm IPQ4019 USB PHY driver"
+	depends on PHY && ARCH_IPQ40XX
+	help
+	  Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
+
 config PHY_RCAR_GEN2
 	tristate "Renesas R-Car Gen2 USB PHY"
 	depends on PHY && RCAR_GEN2

+ 1 - 0
drivers/phy/Makefile

@@ -13,6 +13,7 @@ obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_AM654_PHY) += phy-ti-am654.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
 obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o
 obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o

+ 145 - 0
drivers/phy/phy-qcom-ipq4019-usb.c

@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Sartura Ltd.
+ *
+ * Author: Robert Marko <robert.marko@sartura.hr>
+ *
+ * Based on Linux driver
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <log.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+struct ipq4019_usb_phy {
+	phys_addr_t			base;
+	struct reset_ctl	por_rst;
+	struct reset_ctl	srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	reset_assert(&phy->por_rst);
+	mdelay(10);
+
+	return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	ipq4019_ss_phy_power_off(_phy);
+
+	reset_deassert(&phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+	.power_on = ipq4019_ss_phy_power_on,
+	.power_off = ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_usb_ss_phy_probe(struct udevice *dev)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	phy->base = dev_read_addr(dev);
+	if (phy->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id ipq4019_usb_ss_phy_ids[] = {
+	{ .compatible = "qcom,usb-ss-ipq4019-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_ss_phy) = {
+	.name		= "ipq4019-usb-ss-phy",
+	.id		= UCLASS_PHY,
+	.of_match	= ipq4019_usb_ss_phy_ids,
+	.ops		= &ipq4019_usb_ss_phy_ops,
+	.probe		= ipq4019_usb_ss_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct ipq4019_usb_phy),
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	reset_assert(&phy->por_rst);
+	mdelay(10);
+
+	reset_assert(&phy->srif_rst);
+	mdelay(10);
+
+	return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	ipq4019_hs_phy_power_off(_phy);
+
+	reset_deassert(&phy->srif_rst);
+	mdelay(10);
+
+	reset_deassert(&phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+	.power_on = ipq4019_hs_phy_power_on,
+	.power_off = ipq4019_hs_phy_power_off,
+};
+
+static int ipq4019_usb_hs_phy_probe(struct udevice *dev)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	phy->base = dev_read_addr(dev);
+	if (phy->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+	if (ret)
+		return ret;
+
+	ret = reset_get_by_name(dev, "srif_rst", &phy->srif_rst);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id ipq4019_usb_hs_phy_ids[] = {
+	{ .compatible = "qcom,usb-hs-ipq4019-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_hs_phy) = {
+	.name		= "ipq4019-usb-hs-phy",
+	.id		= UCLASS_PHY,
+	.of_match	= ipq4019_usb_hs_phy_ids,
+	.ops		= &ipq4019_usb_hs_phy_ops,
+	.probe		= ipq4019_usb_hs_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct ipq4019_usb_phy),
+};