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@@ -20,6 +20,7 @@
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*/
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#include <common.h>
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+#include <watchdog.h>
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#include <linux/compat.h>
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#include <linux/mtd/mtd.h>
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#include "linux/mtd/flashchip.h"
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@@ -467,15 +468,18 @@ static int onenand_read_ecc(struct onenand_chip *this)
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static int onenand_wait(struct mtd_info *mtd, int state)
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{
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struct onenand_chip *this = mtd->priv;
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- unsigned int flags = ONENAND_INT_MASTER;
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unsigned int interrupt = 0;
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unsigned int ctrl;
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- while (1) {
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+ /* Wait at most 20ms ... */
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+ u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
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+ u32 time_start = get_timer(0);
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+ do {
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+ WATCHDOG_RESET();
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+ if (get_timer(time_start) > timeo)
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+ return -EIO;
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interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
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- if (interrupt & flags)
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- break;
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- }
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+ } while ((interrupt & ONENAND_INT_MASTER) == 0);
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ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
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@@ -1154,15 +1158,18 @@ int onenand_read_oob(struct mtd_info *mtd, loff_t from,
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static int onenand_bbt_wait(struct mtd_info *mtd, int state)
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{
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struct onenand_chip *this = mtd->priv;
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- unsigned int flags = ONENAND_INT_MASTER;
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unsigned int interrupt;
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unsigned int ctrl;
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- while (1) {
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+ /* Wait at most 20ms ... */
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+ u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
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+ u32 time_start = get_timer(0);
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+ do {
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+ WATCHDOG_RESET();
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+ if (get_timer(time_start) > timeo)
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+ return ONENAND_BBT_READ_FATAL_ERROR;
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interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
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- if (interrupt & flags)
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- break;
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- }
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+ } while ((interrupt & ONENAND_INT_MASTER) == 0);
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/* To get correct interrupt status in timeout case */
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interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
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@@ -2536,7 +2543,8 @@ static int onenand_chip_probe(struct mtd_info *mtd)
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this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
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/* Wait reset */
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- this->wait(mtd, FL_RESETING);
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+ if (this->wait(mtd, FL_RESETING))
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+ return -ENXIO;
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/* Restore system configuration 1 */
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this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
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