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@@ -8,6 +8,7 @@
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#include <ahci.h>
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#include <scsi.h>
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#include <asm/io.h>
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+#include <linux/ioport.h>
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/* Vendor Specific Register Offsets */
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#define AHCI_VEND_PCFG 0xA4
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@@ -88,20 +89,16 @@
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#define LS1021_CEVA_PHY4_CFG 0x064a080b
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#define LS1021_CEVA_PHY5_CFG 0x2aa86470
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-/* for ls1088a */
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-#define LS1088_ECC_DIS_ADDR_CH2 0x100520
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-#define LS1088_ECC_DIS_VAL_CH2 0x40000000
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-
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-/* ecc addr-val pair */
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-#define ECC_DIS_ADDR_CH2 0x20140520
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+/* ecc val pair */
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+#define ECC_DIS_VAL_CH1 0x00020000
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#define ECC_DIS_VAL_CH2 0x80000000
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-#define SATA_ECC_REG_ADDR 0x20220520
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-#define SATA_ECC_DISABLE 0x00020000
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+#define ECC_DIS_VAL_CH3 0x40000000
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enum ceva_soc {
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CEVA_1V84,
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CEVA_LS1012A,
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CEVA_LS1021A,
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+ CEVA_LS1028A,
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CEVA_LS1043A,
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CEVA_LS1046A,
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CEVA_LS1088A,
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@@ -110,12 +107,14 @@ enum ceva_soc {
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struct ceva_sata_priv {
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ulong base;
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+ ulong ecc_base;
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enum ceva_soc soc;
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ulong flag;
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};
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static int ceva_init_sata(struct ceva_sata_priv *priv)
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{
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+ ulong ecc_addr = priv->ecc_base;
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ulong base = priv->base;
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ulong tmp;
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@@ -132,38 +131,42 @@ static int ceva_init_sata(struct ceva_sata_priv *priv)
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break;
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case CEVA_LS1021A:
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- writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR);
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+ if (!ecc_addr)
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+ return -EINVAL;
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+ writel(ECC_DIS_VAL_CH1, ecc_addr);
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writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
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writel(LS1021_CEVA_PHY2_CFG, base + AHCI_VEND_PP2C);
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writel(LS1021_CEVA_PHY3_CFG, base + AHCI_VEND_PP3C);
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writel(LS1021_CEVA_PHY4_CFG, base + AHCI_VEND_PP4C);
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writel(LS1021_CEVA_PHY5_CFG, base + AHCI_VEND_PP5C);
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writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
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- if (priv->flag & FLAG_COHERENT)
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- writel(CEVA_AXICC_CFG, base + LS1021_AHCI_VEND_AXICC);
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break;
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case CEVA_LS1012A:
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case CEVA_LS1043A:
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case CEVA_LS1046A:
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- writel(ECC_DIS_VAL_CH2, ECC_DIS_ADDR_CH2);
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+ if (!ecc_addr)
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+ return -EINVAL;
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+ writel(ECC_DIS_VAL_CH2, ecc_addr);
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/* fallthrough */
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case CEVA_LS2080A:
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writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
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writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
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- if (priv->flag & FLAG_COHERENT)
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- writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);
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break;
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+ case CEVA_LS1028A:
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case CEVA_LS1088A:
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- writel(LS1088_ECC_DIS_VAL_CH2, LS1088_ECC_DIS_ADDR_CH2);
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+ if (!ecc_addr)
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+ return -EINVAL;
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+ writel(ECC_DIS_VAL_CH3, ecc_addr);
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writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
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writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
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- if (priv->flag & FLAG_COHERENT)
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- writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);
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break;
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}
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+ if (priv->flag & FLAG_COHERENT)
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+ writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);
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+
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return 0;
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}
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@@ -187,6 +190,7 @@ static const struct udevice_id sata_ceva_ids[] = {
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{ .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 },
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{ .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A },
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{ .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A },
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+ { .compatible = "fsl,ls1028a-ahci", .data = CEVA_LS1028A },
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{ .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A },
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{ .compatible = "fsl,ls1046a-ahci", .data = CEVA_LS1046A },
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{ .compatible = "fsl,ls1088a-ahci", .data = CEVA_LS1088A },
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@@ -197,6 +201,8 @@ static const struct udevice_id sata_ceva_ids[] = {
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static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
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{
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struct ceva_sata_priv *priv = dev_get_priv(dev);
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+ struct resource res_regs;
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+ int ret;
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if (dev_read_bool(dev, "dma-coherent"))
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priv->flag |= FLAG_COHERENT;
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@@ -205,8 +211,18 @@ static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
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if (priv->base == FDT_ADDR_T_NONE)
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return -EINVAL;
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+ ret = dev_read_resource_byname(dev, "ecc-addr", &res_regs);
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+ if (ret)
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+ priv->ecc_base = 0;
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+ else
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+ priv->ecc_base = res_regs.start;
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+
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priv->soc = dev_get_driver_data(dev);
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+ debug("ccsr-sata-base %lx\t ecc-base %lx\n",
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+ priv->base,
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+ priv->ecc_base);
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+
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return 0;
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}
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